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2015-08-11[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12Jiong Wang7-0/+54
2015-08-11 Jiong Wang <jiong.wang@arm.com> include/elf/ * aarch64.h (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12): Define. bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers "dtprel_lo12". (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12-1.s: New testcase. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-1.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12-ilp32-1.d: Likewise.
2015-08-11[AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NCJiong Wang7-0/+55
2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase. * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise. * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file. * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
2015-08-11[AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21Jiong Wang7-1/+50
2015-08-11 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-tlsldm-page-1.s: New testcase. * gas/aarch64/reloc-tlsldm-page-ilp32-1.s: Likewise. * gas/aarch64/reloc-tlsldm-page-1.d: New expectation file. * gas/aarch64/reloc-tlsldm-page-ilp32-1.d: Likewise.
2015-08-11Fix compile time warning messages about constant expressions where a value ↵Nick Clifton2-5/+13
is being shifted into bit 31. PR gas/18765 * config/tc-arm.c (move_or_literal_pool): Use U suffix to remove compile time warnings about constant expressions being shifted into bit 31. (do_iwmmxt_wldstd): Likewise. (do_iwmmxt_wrwrwr_or_imm5): Likewise. (md_assemble): Likewise.
2015-08-11Convert 'A && (!A || B)' to 'A || B' in various places.Nick Clifton2-10/+15
PR gas/18574 * config/tc-msp430.c (msp430_operands): Rewrite if statements to remove redundant checks. (md_apply_fix): Likewise.
2015-08-11Fix typo checking MMIX operands.Nick Clifton2-2/+6
PR gas/18677 * config/tc-mmix.c (md_assemble): Fix typo checking operands with a numeric constant value.
2015-08-11Fix typo checking number of operands.Nick Clifton2-1/+4
PR gas/18678 * config/tc-tic4x.c (tic4x_insn_check): Fix typo.
2015-08-11Fix a typo where the same name was checked twice.Nick Clifton2-1/+6
PR gas/18679 * config/xtensa-relax.c (same_operand_name): Fix typo.
2015-08-10Add SIGRIE instruction for MIPS R6Robert Suchanek5-0/+16
opcodes/ * mips-opc.c (mips_builtin_opcodes): Add "sigrie". gas/testsuite/ * gas/mips/r6.s: Add tests for "sigrie". * gas/mips/r6.d: Check for "sigrie". * gas/mips/r6-n32.d: Likewise. * gas/mips/r6-n64.d: Likewise.
2015-08-08tc-arm.c: Append ULL to 0xFFFFFFFFFFFFF to avoid errors on 32-bit hosts.Hans-Peter Nilsson2-2/+7
2015-08-042015-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>Thomas Preud'homme2-0/+8
* doc/c-aarch64.texi (.xword): Document directive.
2015-08-03Fix thinkos in the description of the --hash-size command line option for GAS.Nick Clifton2-5/+13
* doc/as.texinfo (Overview): Add --hash-size to the synopsis and fix typo in its entry: @kindex -> @item.
2015-07-30Properly disassemble movnti in Intel modeH.J. Lu4-0/+334
gas/testsuite/ PR binutils/13571 * gas/i386/i386.exp: Run i386-intel and x86_64-intel. * gas/i386/i386-intel.d: New file. * gas/i386/x86_64-intel.d: Likewise. opcodes/ PR binutils/13571 * i386-dis.c (MOD_0FC3): New. (PREFIX_0FC3): Renamed to ... (PREFIX_MOD_0_0FC3): This. (dis386_twobyte): Replace PREFIX_0FC3 with MOD_0FC3. (prefix_table): Replace Ma with Ev on movntiS. (mod_table): Add MOD_0FC3.
2015-07-28Add cores for M5100 seriesRobert Suchanek3-0/+10
gas/ * config/tc-mips.c (mips_cpu_info_table): Add m5100 and m5101 entries. * doc/c-mips.texi: Document m5100 and m5101 for -march=.
2015-07-28Add -march=interaptivRobert Suchanek3-0/+8
gas/ * config/tc-mips.c (mips_cpu_info_table): Add interaptiv entry. * doc/c-mips.text: Document -march=interaptiv.
2015-07-27Regenerate configure filesH.J. Lu2-2/+6
bfd/ * configure: Regenerated. binutils/ * configure: Regenerated. gas/ * configure: Regenerated. gold/ * configure: Regenerated. gprof/ * configure: Regenerated. ld/ * configure: Regenerated. opcodes/ * configure: Regenerated.
2015-07-24Fix the evaluation of RL78 complex relocs, by making immediate values be ↵Nick Clifton7-2/+42
computed relative to a new absolute symbol. gas * config/tc-rl78.c (rl78_abs_sym): New local variable. (md_begin): Initialise the new symbol. (OPIMM): Define the value to be relative to the new symbol and not the absolute section symbol. ld * emulparams/elf32rl78.sh (OTHER_SECTIONS): Provide a value for the _-rl78_abs__ symbol. tests * gas/all/struct.d: Allow for extra symbols in the output. * gas/macros/test1.d: Likewise. * gas/elf/elf.exp: Add an rl78 machine. * gas/elf/sections2e-rl78: New file. tests * binutils-all/localize-hidden-1.d: Allow for extra symbols in the output. * binutils-all/strip-11.d: Skip for the RL78.
2015-07-24Remove leading/trailing white spaces in ChangeLogH.J. Lu2-5/+5
2015-07-22Fix memory operand size for vcvtt?ps2u?qq instructionsH.J. Lu13-240/+331
When disassembling AVX512 vcvtt?ps2u?q instructions with data broadcasting enabled, memory operand size should be DWORD. gas/testsuite/ PR binutils/18631 * gas/i386avx512dq-intel.d: Replace "QWORD" with "DWORD" in vcvtt?ps2u?qq instructions disassembly regexes. Add disassembly regex for new test. * gas/i386/avx512dq.d: Likewise. * gas/i386/avx512dq_vl-intel.d: Likewise. * gas/i386/avx512dq_vl.d: Likewise. * gas/i386/x86-64-avx512dq-intel.d: Likewise. * gas/i386/x86-64-avx512dq.d: Likewise. * gas/i386/x86-64-avx512dq_vl-intel.d: Likewise. * gas/i386/x86-64-avx512dq_vl.d: Likewise. * gas/i386/avx512dq.s: Add new test for Intel syntax with memory operand and broadcasting enabled. * gas/i386/avx512dq_vl.s: Likewise. * gas/i386/x86-64-avx512dq.s: Likewise. * gas/i386/x86-64-avx512dq_vl.s: Likewise. opcodes/ PR binutils/18631 * i386-dis-evex.h (EVEX_W_0F78_P_2): Replace "EXxmmq" with "EXEvexHalfBcstXmmq" for the second operand. (EVEX_W_0F79_P_2): Likewise. (EVEX_W_0F7A_P_2): Likewise. (EVEX_W_0F7B_P_2): Likewise.
2015-07-22gas line buffer handlingAlan Modra2-55/+54
This fixes a segfault when macro definitions end on the last line of a file, and that line isn't properly terminated with a newline. gas used to throw away the last line in cases like this, whereas in other cases gas added the missing newline. So I've also made gas consistently provide a missing newline. PR gas/18687 * input-scrub.c (input_scrub_next_buffer): Rearrange and simplify loop. Don't drop lines at end of file lacking a newline, add a newline instead. Ensure partial_size is zero whenever partial_where is NULL. Adjust buffer size for extra char. (input_scrub_push, input_scrub_begin): Adjust buffer size here too.
2015-07-21[ARM] Support correctly spelled ARMv6KZ architecture namesMatthew Wahab7-5/+55
2015-07-20 Matthew Wahab <matthew.wahab@arm.com> gas/ * NEWS: Mention corrected spelling of armv6kz. * config/tc-arm.c (arm_cpus): Replace ARM_ARCH_V6ZK with ARM_ARCH_V6KZ. (arm_archs): Likewise. Also add "armv6kz" and "armv6kzt2". * doc/c-arm.texi: Replace "armv6zk" with "armv6kz". gas/testsuite * gas/arm/attr-march-armv6kz.d: New. * gas/arm/attr-march-armv6kzt2.d: New. include/opcode * arm.h (ARM_AEXT_V6ZK): Rename to ARM_AEXT_V6KZ. (ARM_AEXT_V6ZKT2): Rename to ARM_AEXT_V6KZT2. (ARM_ARCH_V6ZK): Rename to ARM_ARCH_V6KZ. (ARM_ARCH_V6ZKT2): Rename to ARM_ARCH_V6KZT2.
2015-07-20Make binutils abort message GDB friendlyH.J. Lu1-4/+4
We used to generate abort messages like: internal error, aborting at .../bfd/elf64-x86-64.c line 1554 in elf_x86_64_check_relocs We can't cut and paste "file line ???" to GDB. This patch changes those abort messages to internal error, aborting at .../bfd/elf64-x86-64.c:1554 in elf_x86_64_check_relocs so that we can cut and paste "file:???" to GDB. bfd/ * bfd.c (_bfd_abort): Replace " line " with ":" in output message. gas/ * messages.c (as_assert): Replace " line " with ":" in output message. (as_abort): Likewise. ld/ * ldmisc.c (ld_abort): Replace " line " with ":" in output message.
2015-07-16Updates the ARM disassembler's output of floating point constants to include ↵Alessandro Marzocchi1-2/+2
the actual floating point value. opcodes * arm-dis.c (print_insn_coprocessor): Added support for quarter float bitfield format. (coprocessor_opcodes): Changed VFP vmov reg,immediate to use new quarter float bitfield format. tests * gas/arm/vfpv3-const-conv.d: Update expected result due to change of comment for vmov reg,immediate with VFP coprocessor.
2015-07-16[AArch64][2/3] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21Jiong Wang7-0/+61
2015-07-16[ARM] Add crypto-neon-fp-armv8.1 as an fpu optionMatthew Wahab3-2/+11
2015-07-16 Matthew Wahab <matthew.wahab@arm.com> gas/ * config/tc-arm.c (arm_fpus): Add crypto-neon-fp-armv8.1. * doc/c-arm.texi (-mfpu=): Likewise. Correct the entry for neon-fp-armv8.1.
2015-07-16[ARM] Make human parsing of "processor does not support instruction in mode" ↵James Greenhalgh9-140/+154
error messages easier 2015-07-16 James Greenhalgh <james.greenhalgh@arm.com> gas/ * config/tc-arm.c (md_assemble): Rephrase the "selected processor does not support ARM mode" error messages. gas/testsuite/ * gas/arm/arch7em-bad.l: Update expected errors. * gas/arm/arch7m-bad.l: Likewise. * gas/arm/arm-idiv-bad.l: Likewise. * gas/arm/arm7-bad.l: Likewise. * gas/arm/armv1-bad.l: Likewise. * gas/arm/thumb-w-bad.l: Likewise.
2015-07-15Make x86 Linux assembler default to gABI compliantH.J. Lu2-1/+6
The default compression is gABI compliant now. This patch makes the x86 Linux assembler default to gABI compliant. * config/tc-i386.c (flag_compress_debug): Replace COMPRESS_DEBUG_GNU_ZLIB with COMPRESS_DEBUG_GABI_ZLIB.
2015-07-14Make default compression gABI compliantH.J. Lu3-9/+20
All programs in binutils+gdb git repo now support gABI compression with the SHF_COMPRESSED bit. This patch makes the zlib-gabi option as compression default for gas, gold, ld and objcopy, instead of the zlib-gnu option whose outputs are incompatible with gABI. binutils/ * objcopy.c (copy_file): Set BFD_COMPRESS_GABI if not zlib-gnu. * doc/binutils.texi: Change --compress-debug-sections and --compress-debug-sections=zlib to zlib-gabi. binutils/testsuite/ * binutils-all/compress.exp: Update. gas/ * as.c (parse_args): Make --compress-debug-sections and --compress-debug-sections=zlib the same as --compress-debug-sections=zlib-gabi. * doc/as.texinfo: Change --compress-debug-sections and --compress-debug-sections=zlib to zlib-gabi. gold/ * compressed_output.cc (Output_compressed_section::set_final_data_size): Make --compress-debug-sections=zlib the same as --compress-debug-sections=zlib-gabi. * testsuite/Makefile.am (flagstest_compress_debug_sections.check): Expect ".debug_.*" with the SHF_COMPRESSED bit, instead of ".zdebug_". * testsuite/Makefile.in: Regenerated. ld/ * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Make --compress-debug-sections=zlib the same as --compress-debug-sections=zlib-gabi. * ld.texinfo: Change --compress-debug-sections=zlib to zlib-gabi. ld/testsuite/ * ld-elf/zlibbegin.rS: Updated to .debug_.* with the SHF_COMPRESSED bit. * ld-elf/zlibnormal.rS: Likewise.
2015-07-10Updated to accept .debug_* sectionsH.J. Lu2-2/+6
* gas/i386/dw2-compress-1.d: Updated to accept .debug_* sections.
2015-07-10Add missing changelog entriesAlan Modra1-0/+6
2015-07-092015-07-09 Catherine Moore <clm@codesourcery.com>Catherine Moore2-0/+9
include/ * elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New. gas/ * config/tc-mips.c (check_fpabi): Handle VAL_GNU_MIPS_ABI_FP_NAN2008. binutils/ * readelf.c (print_mips_fp_abi_value): Handle Val_GNU_MIPS_ABI_FP_NAN2008. ld/testsuite/ * ld-mips-elf/attr-gnu-4-08.d: Update expected output. * ld-mips-elf/attr-gnu-4-09.d: New. * ld-mips-elf/attr-gnu-4-19.d: New. * ld-mips-elf/attr-gnu-4-29.d: New. * ld-mips-elf/attr-gnu-4-39.d: New. * ld-mips-elf/attr-gnu-4-49.d: New. * ld-mips-elf/attr-gnu-4-59.d: New. * ld-mips-elf/attr-gnu-4-69.d: New. * ld-mips-elf/attr-gnu-4-79.d: New. * ld-mips-elf/attr-gnu-4-89.d: New. * ld-mips-elf/attr-gnu-4-9.s: New. * ld-mips-elf/mips-elf.exp: Run new tests.
2015-07-08Clarify case requirements for gas pseudo-opsRichard Sandiford2-1/+6
gas/ 2015-07-08 Ciro Santilli <ciro.santilli@gmail.com> * doc/as.texinfo: Clarify case requirements for pseudo ops.
2015-07-08Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.Denis Chertykov6-2/+84
When generating relocation (tc_gen_reloc) 32 bit relocation fixup is changed to new 32 bit PC relative relocation if the fixup has pc-relative flag set. bfd/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * elf32-avr.c: Add 32 bit PC relative relocation for AVR target. gas/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to 32 bit PC relative and update offset if the fixup is pc-relative. * config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff relocs. gas/testsuite/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc. * gas/avr/per-function-debugline.s: New test source. include/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * elf/avr.h: Add new 32 bit PC relative relocation. ld/testsuite/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * ld-avr/gc-section-debugline.d: New test. * ld-avr/per-function-debugline.s: Source for new test.
2015-07-03Remove ppc860, ppc750cl, ppc7450 insns from common ppc.Alan Modra5-3/+16
Back in the day support for these processors was added, we probably didn't want to waste PPC_OPCODE bits on minor variations. I've had a complaint that disassembly of mfspr/mtspr was wrong for power8. This patch fixes that problem. Note that since -m860/-m850/-m821 are new gas options enabling the mpc8xx specific mfspr/mtspr variants it is possible that this change will break some mpc8xx assembly code. ie. you might need to modify makefiles to pass -m860 to gas. include/opcode/ * ppc.h (PPC_OPCODE_750, PPC_OPCODE_7450, PPC_OPCODE_860): Define. opcodes/ * ppc-opc.c (PPC750, PPC7450, PPC860): Define using PPC_OPCODE_*. * ppc-dis.c (ppc_opts): Add 821, 850 and 860 entries. Add PPC_OPCODE_7450 to 7450 entry. Add PPC_OPCODE_750 to 750cl entry. gas/ * config/tc-ppc.c (md_show_usage): Add -m821, -m850, -m860. * doc/c-ppc.texi (PowerPC-Opts): Likewise. gas/testsuite/ * gas/ppc/titan.d: Correct mfmcsrr0 disassembly.
2015-07-01Assembler tests for Nios II R2Sandra Loosemore123-0/+3862
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> gas/testsuite/ * gas/nios2/add-r2.d: New. * gas/nios2/align_fill-r2.d: New. * gas/nios2/align_text-r2.d: New. * gas/nios2/aligned_text-r2.d: New. * gas/nios2/and-r2.d: New. * gas/nios2/andc.d: New. * gas/nios2/andc.s: New. * gas/nios2/bmx.d: New. * gas/nios2/bmx.s: New. * gas/nios2/branch-r2.d: New. * gas/nios2/break-r2.d: New. * gas/nios2/bret-r2.d: New. * gas/nios2/cache-r2.d: New. * gas/nios2/cache-r2.s: New. * gas/nios2/call-r2.d: New. * gas/nios2/call26-r2.d: New. * gas/nios2/call26_noat-r2.d: New. * gas/nios2/call_noat-r2.d: New. * gas/nios2/cdx_add.d: New. * gas/nios2/cdx_add.s: New. * gas/nios2/cdx_and.d: New. * gas/nios2/cdx_and.s: New. * gas/nios2/cdx_break.d: New. * gas/nios2/cdx_break.s: New. * gas/nios2/cdx_callr.d: New. * gas/nios2/cdx_callr.s: New. * gas/nios2/cdx_jmpr.d: New. * gas/nios2/cdx_jmpr.s: New. * gas/nios2/cdx_ldbu.d: New. * gas/nios2/cdx_ldbu.s: New. * gas/nios2/cdx_ldhu.d: New. * gas/nios2/cdx_ldhu.s: New. * gas/nios2/cdx_ldw.d: New. * gas/nios2/cdx_ldw.s: New. * gas/nios2/cdx_ldwsp.d: New. * gas/nios2/cdx_ldwsp.s: New. * gas/nios2/cdx_mov.d: New. * gas/nios2/cdx_mov.s: New. * gas/nios2/cdx_neg.d: New. * gas/nios2/cdx_neg.s: New. * gas/nios2/cdx_not.d: New. * gas/nios2/cdx_not.s: New. * gas/nios2/cdx_or.d: New. * gas/nios2/cdx_or.s: New. * gas/nios2/cdx_pop.d: New. * gas/nios2/cdx_pop.s: New. * gas/nios2/cdx_push.d: New. * gas/nios2/cdx_push.s: New. * gas/nios2/cdx_relax.d: New. * gas/nios2/cdx_relax.s: New. * gas/nios2/cdx_ret.d: New. * gas/nios2/cdx_ret.s: New. * gas/nios2/cdx_sll.d: New. * gas/nios2/cdx_sll.s: New. * gas/nios2/cdx_spaddi.d: New. * gas/nios2/cdx_spaddi.s: New. * gas/nios2/cdx_spdeci.d: New. * gas/nios2/cdx_spdeci.s: New. * gas/nios2/cdx_srl.d: New. * gas/nios2/cdx_srl.s: New. * gas/nios2/cdx_stb.d: New. * gas/nios2/cdx_stb.s: New. * gas/nios2/cdx_sth.d: New. * gas/nios2/cdx_sth.s: New. * gas/nios2/cdx_stw.d: New. * gas/nios2/cdx_stw.s: New. * gas/nios2/cdx_stwsp.d: New. * gas/nios2/cdx_stwsp.s: New. * gas/nios2/cdx_sub.d: New. * gas/nios2/cdx_sub.s: New. * gas/nios2/cdx_trap.d: New. * gas/nios2/cdx_trap.s: New. * gas/nios2/cdx_xor.d: New. * gas/nios2/cdx_xor.s: New. * gas/nios2/cmp-r2.d: New. * gas/nios2/comments-r2.d: New. * gas/nios2/complex-r2.d: New. * gas/nios2/ctl-r2.d: New. * gas/nios2/custom-r2.d: New. * gas/nios2/eni.d: New. * gas/nios2/eni.s: New. * gas/nios2/etbt-r2.d: New. * gas/nios2/flushda-r2.d: New. * gas/nios2/jmp-r2.d: New. * gas/nios2/ldb-r2.d: New. * gas/nios2/ldb-r2.s: New. * gas/nios2/ldh-r2.d: New. * gas/nios2/ldh-r2.s: New. * gas/nios2/ldw-r2.d: New. * gas/nios2/ldw-r2.s: New. * gas/nios2/ldwm.d: New. * gas/nios2/ldwm.s: New. * gas/nios2/lineseparator-r2.d: New. * gas/nios2/movia-r2.d: New. * gas/nios2/mpx.d: New. * gas/nios2/mpx.s: New. * gas/nios2/mul-r2.d: New. * gas/nios2/nop-r2.d: New. * gas/nios2/nop-r2.s: New. * gas/nios2/nor-r2.d: New. * gas/nios2/or-r2.d: New. * gas/nios2/rdprs-r2.d: New. * gas/nios2/rdprs-r2.s: New. * gas/nios2/registers-r2.d: New. * gas/nios2/ret-r2.d: New. * gas/nios2/rotate-r2.d: New. * gas/nios2/stb-r2.d: New. * gas/nios2/stb-r2.s: New. * gas/nios2/sth-r2.d: New. * gas/nios2/sth-r2.s: New. * gas/nios2/stw-r2.d: New. * gas/nios2/stw-r2.s: New. * gas/nios2/stwm.d: New. * gas/nios2/stwm.s: New. * gas/nios2/sub-r2.d: New. * gas/nios2/sync-r2.d: New. * gas/nios2/trap-r2.d: New. * gas/nios2/tret-r2.d: New. * gas/nios2/wrpie.d: New. * gas/nios2/wrpie.s: New. * gas/nios2/wrprs-r2.d: New. * gas/nios2/xor-r2.d: New.
2015-07-01Opcodes and assembler support for Nios II R2Sandra Loosemore2-107/+1477
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> gas/ * config/tc-nios2.c (nios2_min_align): New. (nop): Replace with.... (nop_r1, nop_r2, nop_r2_cdx, nop32, nop16): New. (nios2_align): Handle alignment on 2-byte boundaries when CDX instructions may be present. (s_nios2_align): Adjust reference to nop. (CDXBRANCH, IS_CDXBRANCH): New. (CDX_UBRANCH_SUBTYPE, CDX_CBRANCH_SUBTYPE): New. (nios2_relax_subtype_size): Handle 2-byte CDX branches. (nios2_relax_frag): Likewise. (md_convert_frag): Handle R2 encodings. (nios2_check_overflow): Check that low-order bits are zero before applying rightshift from howto. (nios2_check_overflow): Correct negative overflow calculation. (nios2_diagnose_overflow): Handle signed_immed12_overflow. Issue generic overflow messages for miscellaneous instruction formats. (md_apply_fix): Recognize new R2 relocations. For pc_relative relocations, store fixup in *valP. (nios2_reglist_mask, nios2_reglist_dir): New. (nios2_parse_reglist): New. (nios2_parse_base_register): New. (nios2_assemble_expression): Handle constant expressions designated by BFD_RELOC_NONE. (nios2_assemble_reg3): New. (nios2_assemble_arg_c): Handle R2 instruction formats. (nios2_assemble_arg_d): Likewise. (nios2_assemble_arg_s): Likewise. (nios2_assemble_arg_t): Likewise. (nios2_assemble_arg_D): New. (nios2_assemble_arg_S): New. (nios2_assemble_arg_T): New. (nios2_assemble_arg_i): Handle R2 instruction formats. (nios2_assemble_arg_I): New. (nios2_assemble_arg_u): Handle R2 instruction formats. (nios2_assemble_arg_U): New. (nios2_assemble_arg_V): New. (nios2_assemble_arg_W): New. (nios2_assemble_arg_X): New. (nios2_assemble_arg_Y): New. (nios2_assemble_arg_o): Handle R2 instruction formats. (nios2_assemble_arg_O): New. (nios2_assemble_arg_P): New. (nios2_assemble_arg_j): Handle R2 instruction formats. (nios2_assemble_arg_k): New. (nios2_assemble_arg_l): Handle R2 instruction formats. (nios2_assemble_arg_m): Likewise. (nios2_assemble_arg_M): New. (nios2_assemble_arg_N): New. (nios2_assemble_arg_e): New. (nios2_assemble_arg_f): New. (nios2_assemble_arg_g): New. (nios2_assemble_arg_h): New. (nios2_assemble_arg_R): New. (nios2_assemble_arg_B): New. (nios2_assemble_args): Handle new argument letters. (nios2_consume_arg): Likewise. (nios2_translate_pseudo_insn): Avoid dereferencing null pointer in error message. (nios2_ps_insn_info_structs): Add nop.n. (output_ubranch): Handle CDX branches. (output_cbranch): Likewise. (output_call): Handle R2 encodings. (output_movia): Likewise. (md_begin): Initialize nios2_min_align. (md_assemble): Align to nios2_min_align. Adjust nios2_min_align if a 16-bit instruction is seen. (nios2_cons_align): Use appropriate nop pattern. include/opcode/ * nios2.h (enum iw_format_type): Add R2 formats. (enum overflow_type): Add signed_immed12_overflow and enumeration_overflow for R2. (struct nios2_opcode): Document new argument letters for R2. (REG_3BIT, REG_LDWM, REG_POP): Define. (includes): Include nios2r2.h. (nios2_r2_opcodes, nios2_num_r2_opcodes): Declare. (nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): Declare. (nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): Declare. (nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): Declare. (nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): Declare. (nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings): Declare. * nios2r2.h: New file. opcodes/ * nios2-dis.c (nios2_extract_opcode): New. (nios2_disassembler_state): New. (nios2_find_opcode_hash): Use mach parameter to select correct disassembler state. (nios2_print_insn_arg): Extend to support new R2 argument letters and formats. (print_insn_nios2): Check for 16-bit instruction at end of memory. * nios2-opc.c (nios2_builtin_regs): Add R2 register attributes. (NIOS2_NUM_OPCODES): Rename to... (NIOS2_NUM_R1_OPCODES): This. (nios2_r2_opcodes): New. (NIOS2_NUM_R2_OPCODES): New. (nios2_num_r2_opcodes): New. (nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): New. (nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): New. (nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): New. (nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): New. (nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings): New.
2015-07-01Add Nios II arch flags and compatibility testsSandra Loosemore4-2/+93
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> bfd/ * archures.c (bfd_mach_nios2r1, bfd_mach_nios2r2): New. * bfd-in2.h: Regenerated. * cpu-nios2.c (nios2_compatible): New. (N): Use nios2_compatible instead of bfd_default_compatible. (NIOS2R1_NEXT, NIOS2R2_NEXT): Define. (arch_info_struct): New. (bfd_nios2_arch): Chain to NIOS2R1_NEXT. * elf32-nios2.c (is_nios2_elf): New. (nios2_elf32_merge_private_bfd_data): New. (nios2_elf32_object_p): New. (bfd_elf32_bfd_merge_private_bfd_data): Define. (elf_backend_object_p): Define. gas/ * config/tc-nios2.c: Adjust includes. (OPTION_MARCH): Define. (md_longopts): Add -march option. (nios2_architecture): New. (nios2_use_arch): New. (md_parse_option): Handle OPTION_MARCH. (md_show_usage): Document -march. (md_begin): Set arch in BFD. (nios2_elf_final_processing): New. * config/tc-nios2.h (elf_tc_final_processing): Define. (nios2_elf_final_processing): New. * doc/c-nios2.texi (-march): Add documentation. include/elf/ * nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define. ld/testsuite/ * ld-nios2/mixed1a.d: New. * ld-nios2/mixed1a.s: New. * ld-nios2/mixed1b.d: New. * ld-nios2/mixed1b.s: New. * ld-nios2/nios2.exp: Build the new compatibility tests.
2015-06-30Add support for monitorx/mwaitx instructionsAmit Pawar19-5/+342
gas/ * config/tc-i386.c (cpu_arch): Add .mwaitx. (process_immext): Check operands for monitorx/mwaitx instructions. * doc/c-i386.texi: Document mwaitx. gas/testsuite/ * gas/i386/i386.exp: Add new mwaitx test cases. * gas/i386/mwaitx.s: New. * gas/i386/mwaitx-bdver4.d: New. * gas/i386/x86-64-mwaitx.s: New. * gas/i386/x86-64-mwaitx-bdver4.d: New. * gas/i386/mwaitx-reg.s: New. * gas/i386/mwaitx-reg.l: New. * gas/i386/x86-64-mwaitx-reg.l: New. * gas/i386/x86-64-mwaitx-reg.s: New. * gas/i386/arch-13.s: Updated. * gas/i386/arch-13.d: Updated. * gas/i386/arch-13-znver1.d: Updated. * gas/i386/x86-64-arch-3.s: Updated. * gas/i386/x86-64-arch-3.d: Updated. * gas/i386/x86-64-arch-3-znver1.d: Updated. opcodes/ * i386-dis.c (OP_Mwaitx): New. (rm_table): Add monitorx/mwaitx. * i386-gen.c (cpu_flag_init): Add CpuMWAITX to CPU_BDVER4_FLAGS and CPU_ZNVER1_FLAGS. Add CPU_MWAITX_FLAGS. (operand_type_init): Add CpuMWAITX. * i386-opc.h (CpuMWAITX): New. (i386_cpu_flags): Add cpumwaitx. * i386-opc.tbl: Add monitorx and mwaitx. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2015-06-30Add support for SADDR addressing to the RL78 port.Nick Clifton2-29/+28
gas * config/rl78-parse.y: Tag all saddr expressions throughout. (SET_SA): New. (expr_is_saddr): Allow symbolic expressions. * config/tc-rl78.c (md_apply_fix): Handle SADDR. bfd * elf32-rl78.c (rl78_elf_howto_table): Add RH_SADDR. (rl78_reloc_map): Add R_RL78_RH_SADDR. * reloc.c: Add BFD_RELOC_RL78_SADDR. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate.
2015-06-28Remove COMPRESS_DEBUG_ZLIBH.J. Lu3-2/+8
COMPRESS_DEBUG_ZLIB isn't needed. This patch removes COMPRESS_DEBUG_ZLIB and replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB. bfd/ * bfd-in.h (compressed_debug_section_type): Remove COMPRESS_DEBUG_ZLIB. * bfd-in2.h : Regenerated. gas/ * as.c (parse_args): Replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB. * config/tc-i386.c (flag_compress_debug): Likewise. ld/ * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB.
2015-06-27Update ia64 gas testsH.J. Lu3-2/+7
* gas/ia64/psn.d: Updated. * gas/ia64/xdata-ilp32.d: Likewise.
2015-06-25Update .strtab section sizes in mmix testsH.J. Lu3-2/+7
Since commit ef10c3ace00674e8c3599c3bf95f06c87d68898b may reduce .strtab section size, we need to adjust expected .strtab section sizes in mmix tests. gas/testsuite/ * gas/mmix/loc-3.d: Updated. * gas/mmix/loc-5.d: Likewise. ld/testsuite/ * ld-mmix/bspec1.d: Updated. * ld-mmix/bspec2.d: Likewise. * ld-mmix/undef-3.d: Likewise.
2015-06-25Use strtab with GC and suffix merging for .strtabH.J. Lu4-0/+24
This patch uses ELF strtab with GC and suffix merging support to create ELF .strtab section. There is some small memory overhead to use ELF strtab: ==14928== HEAP SUMMARY: ==14928== in use at exit: 3,276,318 bytes in 679 blocks ==14928== total heap usage: 1,544 allocs, 865 frees, 15,259,146 bytes allocated vs. ==14936== HEAP SUMMARY: ==14936== in use at exit: 3,276,318 bytes in 679 blocks ==14936== total heap usage: 1,532 allocs, 853 frees, 15,026,402 bytes allocated when running: ./ld-new -m elf_x86_64 -o tmpdir/ld-partial.o -r ldgram.o ldlex-wrapper.o lexsup.o ldlang.o mri.o ldctor.o ldmain.o plugin.o ldwrite.o ldexp.o ldemul.o ldver.o ldmisc.o ldfile.o ldcref.o eelf_x86_64.o eelf32_x86_64.o eelf_i386.o eelf_iamcu.o ei386linux.o eelf_l1om.o eelf_k1om.o ldbuildid.o The results are [32] .strtab STRTAB 0+ 3beff8 00407a 00 0 0 1 vs [32] .strtab STRTAB 0+ 3beff8 0041d8 00 0 0 1 It reduces the .strtab size by 350 bytes, about 2% Saving on libc.so from glibc is much more since libc.so has many alias symbols with the same suffix. For x32 glibc, [82] .strtab STRTAB 0+ 81b348 0159e7 00 0 0 1 vs [82] .strtab STRTAB 0+ 81b8bc 019e72 00 0 0 1 It reduces the .strtab size by 17547 bytes, about 16%. bfd/ PR gas/18451 * elf-bfd.h (elf_sym_strtab): New. (elf_link_hash_table): Add strtabcount, strtabsize and strtab. (_bfd_elf_stringtab_init): Removed. * elf.c (_bfd_elf_stringtab_init): Removed. (_bfd_elf_compute_section_file_positions): Replace bfd_strtab_hash/_bfd_elf_stringtab_init/_bfd_stringtab_free/ _bfd_stringtab_size with elf_strtab_hash/_bfd_elf_strtab_init/_bfd_elf_strtab_free/ _bfd_elf_strtab_size. Use _bfd_elf_strtab_add, _bfd_elf_strtab_finalize and _bfd_elf_strtab_offset to get st_name. (swap_out_syms): Likewise. * elflink.c (elf_final_link_info): Replace bfd_strtab_hash with elf_strtab_hash. Remove symbuf, symbuf_count, symbuf_size and shndxbuf_size. (elf_link_flush_output_syms): Removed. (elf_link_output_sym): Renamed to ... (elf_link_output_symstrtab): This. Replace _bfd_stringtab_add with _bfd_elf_strtab_add. Don't flush symbols to the file nor swap out symbols. (elf_link_swap_symbols_out): New. (elf_link_output_extsym): Replace elf_link_output_sym with elf_link_output_symstrtab. (elf_link_input_bfd): Likewise. (elf_final_link_free): Replace _bfd_stringtab_free with _bfd_elf_strtab_free. Remove symbuf. (bfd_elf_final_link): Replace _bfd_elf_stringtab_init with _bfd_elf_strtab_init. Don't set symbuf, symbuf_count, symbuf_size nor shndxbuf_size. Initialize strtabsize and strtab. Initialize symshndxbuf to -1 when number of sections >= 64K. Replace elf_link_output_sym/elf_link_output_sym with elf_link_output_symstrtab/elf_link_output_symstrtab. Don't call elf_link_flush_output_syms. Call _bfd_elf_strtab_finalize and elf_link_swap_symbols_out. Replace _bfd_stringtab_size and _bfd_stringtab_emit with _bfd_elf_strtab_size and _bfd_elf_strtab_emit. gas/testsuite/ PR gas/18451 * gas/elf/elf.exp: Run strtab. * gas/elf/strtab.d: New file. * gas/elf/strtab.s: Likewise. ld/testsuite/ PR gas/18451 * ld-elf/strtab.d: New file. * ld-elf/strtab.s: Likewise.
2015-06-24Remove the extra @section .cfi_lsdaH.J. Lu2-1/+4
Commit 2f0c68f23bb3132cd5ac466ca8775c0d9e4960cd added an extra @section .cfi_lsda: @subsection @code{.cfi_lsda @var{encoding} [, @var{exp}]} +@section @code{.cfi_lsda @var{encoding} [, @var{exp}]} @code{.cfi_lsda} defines LSDA and its encoding. It shouldn't be there. * doc/as.texinfo (.cfi_lsda): Remove the extra @section.
2015-06-22PPC sync instruction accepts invalid and incompatible operandsPeter Bergner3-4/+9
ISA 2.07 added a new category called Elemental Memory Barriers that modifies the sync instruction to accept an additional operand ESYNC. Edmar added support for this insruction varient here: https://sourceware.org/ml/binutils/2012-02/msg00221.html Looking at this closer, I see that the insert_ls() function is misnamed (since it's attached to the ESYNC operand, not the LS operand) but more importantly, it is silently modifying the LS operand value behind the users back when the LS operand is either invalid or is incompatible with the new ESYNC operand. The ISA 2.07 doc has an Assembler Note that clearly states that assemblers that support the ESYNC operand should report all invalid uses of LS and ESYNC. This patch changes the assembler to error out on invalid and incompatible operand usage. opcodes/ * ppc-opc.c (insert_ls): Test for invalid LS operands. (insert_esync): New function. (LS, WC): Use insert_ls. (ESYNC): Use insert_esync. gas/testsuite/ * gas/ppc/e6500.s <sync>: Fix invalid test. * gas/ppc/e6500.d: Likewise.
2015-06-22Stop "objdump -d" from disassembling past a symbolic address.Nick Clifton7-36/+48
include * dis-asm.h (struct disassemble_info): Add stop_vma field. binuti * objdump.c (disassemble_bytes): Set the stop_vma field in the disassemble_info structure when disassembling code sections with -d. * doc/binutils.texi (objdump): Document the discrepancy between -d and -D. opcodes * dis-buf.c (buffer_read_memory): Fail is stop_vma is set and the requested region lies beyond it. * bfin-dis.c (print_insn_bfin): Ignore sysop instructions when looking for 32-bit insns. * mcore-dis.c (print_insn_mcore): Disable stop_vma when reading data. * sh-dis.c (print_insn_sh): Likewise. * tic6x-dis.c (print_insn_tic6x): Disable stop_vma when reading blocks of instructions. * vax-dis.c (print_insn_vax): Check that the requested address does not clash with the stop_vma. tests * gas/arm/backslash-at.s: Add extra .byte directives so that the foo symbol does not appear to point half way through an instruction. * gas/arm/backslash-at.d: Update expected disassembly. * gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise. * gas/i386/ilp32/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise.
2015-06-19Allow for optional operands with non-zero default values.Peter Bergner6-6/+23
ISA 2.07 (ie, POWER8) added the rfebb instruction which takes one operand with the value of either a 0 or 1. It also defines an extended mnemonic with no operands (ie, "rfebb") that is supposed to be equivalent to "rfebb 1". I implemented rfebb's lone operand with PPC_OPERAND_OPTIONAL, but the problem is, optional operands that are ommitted always default to the value 0, which is wrong in this case. I have added support for allowing non-zero default values by adding an additional flag PPC_OPERAND_OPTIONAL_VALUE that specifies that the default operand value to be used is stored in the SHIFT field of the operand field immediately following this one. This fixes the rfebb issue. I also fixed the mftb and mfcr instructions so they use the same mechanism. This allows us to flag invalid uses of mfcr where we explicitly pass in a zero FXM value, like the use in a2.[sd]. include/opcode/ * ppc.h (PPC_OPERAND_OPTIONAL_VALUE): New. (ppc_optional_operand_value): New inline function. opcodes/ * ppc-dis.h (skip_optional_operands): Use ppc_optional_operand_value. * ppc-opc.c (FXM4): Add non-zero optional value. (TBR): Likewise. (SXL): Likewise. (insert_fxm): Handle new default operand value. (extract_fxm): Likewise. (insert_tbr): Likewise. (extract_tbr): Likewise. gas/ * config/tc-ppc.c (md_assemble): Use ppc_optional_operand_value. Allow for optional operands without insert functions. gas/testsuite/ * gas/ppc/power8.d: Fixup rfebb test results. * gas/ppc/a2.s: Fix invalid mfcr test. * gas/ppc/a2.d: Likewise.
2015-06-18Add support for using the ADR alias in Thumb mode against nearby symbols.Nick Clifton6-0/+72
PR gas/18541 gas * config/tc-arm.c (md_apply_fix): Add support for ADR in thumb mode against a nearby symbol. tests * gas/arm/thumb.s: Add test of ADR against a nearby symbol. * gas/arm/thumb.d: Update expected output. * gas/arm/thumb-eabi.d: Likewise.
2015-06-18Fix the computation of the addends for an ARM_TLS_LE32 reloc.Nick Clifton5-2/+56
PR gas/18481 bfd * elf32-arm.c (R_ARM_TLS_LE32): Set the special function to NULL. gas * config/tc-arm.c (tc_gen_reloc): Include BFD_RELOC_ARM_TLS_LE32 in the same case as BFD_RELOC_ARM_TLS_IS32. tests * gas/arm/tls.s: Add tests of the tpoff pseudo with a local symbol. * gas/arm/tls.d: Update expected output.
2015-06-17Fix compile warnings building previous delta in a 32-bit environment.Nick Clifton2-8/+43
* config/tc-arm.c (is_double_a_single): Make conditional upon the availablity of a 64-bit type. Use this type for the argument and mantissa. (double_to_single): Likewise. * config/tc-arm.c (move_or_literal_pool): Use a 64-bit type for the constant value, if available. Generate a 64-bit value from a bignum if supported. Only perform the second optimization for PR 18500 if the 64-bit type is available.
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