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2015-07-092015-07-09 Catherine Moore <clm@codesourcery.com>Catherine Moore2-0/+9
include/ * elf/mips/mips.h (Val_GNU_MIPS_ABI_FP_NAN2008): New. gas/ * config/tc-mips.c (check_fpabi): Handle VAL_GNU_MIPS_ABI_FP_NAN2008. binutils/ * readelf.c (print_mips_fp_abi_value): Handle Val_GNU_MIPS_ABI_FP_NAN2008. ld/testsuite/ * ld-mips-elf/attr-gnu-4-08.d: Update expected output. * ld-mips-elf/attr-gnu-4-09.d: New. * ld-mips-elf/attr-gnu-4-19.d: New. * ld-mips-elf/attr-gnu-4-29.d: New. * ld-mips-elf/attr-gnu-4-39.d: New. * ld-mips-elf/attr-gnu-4-49.d: New. * ld-mips-elf/attr-gnu-4-59.d: New. * ld-mips-elf/attr-gnu-4-69.d: New. * ld-mips-elf/attr-gnu-4-79.d: New. * ld-mips-elf/attr-gnu-4-89.d: New. * ld-mips-elf/attr-gnu-4-9.s: New. * ld-mips-elf/mips-elf.exp: Run new tests.
2015-07-08Clarify case requirements for gas pseudo-opsRichard Sandiford2-1/+6
gas/ 2015-07-08 Ciro Santilli <ciro.santilli@gmail.com> * doc/as.texinfo: Clarify case requirements for pseudo ops.
2015-07-08Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.Denis Chertykov6-2/+84
When generating relocation (tc_gen_reloc) 32 bit relocation fixup is changed to new 32 bit PC relative relocation if the fixup has pc-relative flag set. bfd/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * elf32-avr.c: Add 32 bit PC relative relocation for AVR target. gas/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * config/tc-avr.c (tc_gen_reloc): Change 32 bit relocation to 32 bit PC relative and update offset if the fixup is pc-relative. * config/tc-avr.h (DIFF_EXPR_OK): Define to enable PC relative diff relocs. gas/testsuite/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * gas/avr/pc-relative-reloc.d: New test for 32 bit pc relative reloc. * gas/avr/per-function-debugline.s: New test source. include/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * elf/avr.h: Add new 32 bit PC relative relocation. ld/testsuite/ChangeLog 2015-07-06 Pitchumani Sivanupandi <pitchumani.s@atmel.com> * ld-avr/gc-section-debugline.d: New test. * ld-avr/per-function-debugline.s: Source for new test.
2015-07-03Remove ppc860, ppc750cl, ppc7450 insns from common ppc.Alan Modra5-3/+16
Back in the day support for these processors was added, we probably didn't want to waste PPC_OPCODE bits on minor variations. I've had a complaint that disassembly of mfspr/mtspr was wrong for power8. This patch fixes that problem. Note that since -m860/-m850/-m821 are new gas options enabling the mpc8xx specific mfspr/mtspr variants it is possible that this change will break some mpc8xx assembly code. ie. you might need to modify makefiles to pass -m860 to gas. include/opcode/ * ppc.h (PPC_OPCODE_750, PPC_OPCODE_7450, PPC_OPCODE_860): Define. opcodes/ * ppc-opc.c (PPC750, PPC7450, PPC860): Define using PPC_OPCODE_*. * ppc-dis.c (ppc_opts): Add 821, 850 and 860 entries. Add PPC_OPCODE_7450 to 7450 entry. Add PPC_OPCODE_750 to 750cl entry. gas/ * config/tc-ppc.c (md_show_usage): Add -m821, -m850, -m860. * doc/c-ppc.texi (PowerPC-Opts): Likewise. gas/testsuite/ * gas/ppc/titan.d: Correct mfmcsrr0 disassembly.
2015-07-01Assembler tests for Nios II R2Sandra Loosemore123-0/+3862
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> gas/testsuite/ * gas/nios2/add-r2.d: New. * gas/nios2/align_fill-r2.d: New. * gas/nios2/align_text-r2.d: New. * gas/nios2/aligned_text-r2.d: New. * gas/nios2/and-r2.d: New. * gas/nios2/andc.d: New. * gas/nios2/andc.s: New. * gas/nios2/bmx.d: New. * gas/nios2/bmx.s: New. * gas/nios2/branch-r2.d: New. * gas/nios2/break-r2.d: New. * gas/nios2/bret-r2.d: New. * gas/nios2/cache-r2.d: New. * gas/nios2/cache-r2.s: New. * gas/nios2/call-r2.d: New. * gas/nios2/call26-r2.d: New. * gas/nios2/call26_noat-r2.d: New. * gas/nios2/call_noat-r2.d: New. * gas/nios2/cdx_add.d: New. * gas/nios2/cdx_add.s: New. * gas/nios2/cdx_and.d: New. * gas/nios2/cdx_and.s: New. * gas/nios2/cdx_break.d: New. * gas/nios2/cdx_break.s: New. * gas/nios2/cdx_callr.d: New. * gas/nios2/cdx_callr.s: New. * gas/nios2/cdx_jmpr.d: New. * gas/nios2/cdx_jmpr.s: New. * gas/nios2/cdx_ldbu.d: New. * gas/nios2/cdx_ldbu.s: New. * gas/nios2/cdx_ldhu.d: New. * gas/nios2/cdx_ldhu.s: New. * gas/nios2/cdx_ldw.d: New. * gas/nios2/cdx_ldw.s: New. * gas/nios2/cdx_ldwsp.d: New. * gas/nios2/cdx_ldwsp.s: New. * gas/nios2/cdx_mov.d: New. * gas/nios2/cdx_mov.s: New. * gas/nios2/cdx_neg.d: New. * gas/nios2/cdx_neg.s: New. * gas/nios2/cdx_not.d: New. * gas/nios2/cdx_not.s: New. * gas/nios2/cdx_or.d: New. * gas/nios2/cdx_or.s: New. * gas/nios2/cdx_pop.d: New. * gas/nios2/cdx_pop.s: New. * gas/nios2/cdx_push.d: New. * gas/nios2/cdx_push.s: New. * gas/nios2/cdx_relax.d: New. * gas/nios2/cdx_relax.s: New. * gas/nios2/cdx_ret.d: New. * gas/nios2/cdx_ret.s: New. * gas/nios2/cdx_sll.d: New. * gas/nios2/cdx_sll.s: New. * gas/nios2/cdx_spaddi.d: New. * gas/nios2/cdx_spaddi.s: New. * gas/nios2/cdx_spdeci.d: New. * gas/nios2/cdx_spdeci.s: New. * gas/nios2/cdx_srl.d: New. * gas/nios2/cdx_srl.s: New. * gas/nios2/cdx_stb.d: New. * gas/nios2/cdx_stb.s: New. * gas/nios2/cdx_sth.d: New. * gas/nios2/cdx_sth.s: New. * gas/nios2/cdx_stw.d: New. * gas/nios2/cdx_stw.s: New. * gas/nios2/cdx_stwsp.d: New. * gas/nios2/cdx_stwsp.s: New. * gas/nios2/cdx_sub.d: New. * gas/nios2/cdx_sub.s: New. * gas/nios2/cdx_trap.d: New. * gas/nios2/cdx_trap.s: New. * gas/nios2/cdx_xor.d: New. * gas/nios2/cdx_xor.s: New. * gas/nios2/cmp-r2.d: New. * gas/nios2/comments-r2.d: New. * gas/nios2/complex-r2.d: New. * gas/nios2/ctl-r2.d: New. * gas/nios2/custom-r2.d: New. * gas/nios2/eni.d: New. * gas/nios2/eni.s: New. * gas/nios2/etbt-r2.d: New. * gas/nios2/flushda-r2.d: New. * gas/nios2/jmp-r2.d: New. * gas/nios2/ldb-r2.d: New. * gas/nios2/ldb-r2.s: New. * gas/nios2/ldh-r2.d: New. * gas/nios2/ldh-r2.s: New. * gas/nios2/ldw-r2.d: New. * gas/nios2/ldw-r2.s: New. * gas/nios2/ldwm.d: New. * gas/nios2/ldwm.s: New. * gas/nios2/lineseparator-r2.d: New. * gas/nios2/movia-r2.d: New. * gas/nios2/mpx.d: New. * gas/nios2/mpx.s: New. * gas/nios2/mul-r2.d: New. * gas/nios2/nop-r2.d: New. * gas/nios2/nop-r2.s: New. * gas/nios2/nor-r2.d: New. * gas/nios2/or-r2.d: New. * gas/nios2/rdprs-r2.d: New. * gas/nios2/rdprs-r2.s: New. * gas/nios2/registers-r2.d: New. * gas/nios2/ret-r2.d: New. * gas/nios2/rotate-r2.d: New. * gas/nios2/stb-r2.d: New. * gas/nios2/stb-r2.s: New. * gas/nios2/sth-r2.d: New. * gas/nios2/sth-r2.s: New. * gas/nios2/stw-r2.d: New. * gas/nios2/stw-r2.s: New. * gas/nios2/stwm.d: New. * gas/nios2/stwm.s: New. * gas/nios2/sub-r2.d: New. * gas/nios2/sync-r2.d: New. * gas/nios2/trap-r2.d: New. * gas/nios2/tret-r2.d: New. * gas/nios2/wrpie.d: New. * gas/nios2/wrpie.s: New. * gas/nios2/wrprs-r2.d: New. * gas/nios2/xor-r2.d: New.
2015-07-01Opcodes and assembler support for Nios II R2Sandra Loosemore2-107/+1477
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> gas/ * config/tc-nios2.c (nios2_min_align): New. (nop): Replace with.... (nop_r1, nop_r2, nop_r2_cdx, nop32, nop16): New. (nios2_align): Handle alignment on 2-byte boundaries when CDX instructions may be present. (s_nios2_align): Adjust reference to nop. (CDXBRANCH, IS_CDXBRANCH): New. (CDX_UBRANCH_SUBTYPE, CDX_CBRANCH_SUBTYPE): New. (nios2_relax_subtype_size): Handle 2-byte CDX branches. (nios2_relax_frag): Likewise. (md_convert_frag): Handle R2 encodings. (nios2_check_overflow): Check that low-order bits are zero before applying rightshift from howto. (nios2_check_overflow): Correct negative overflow calculation. (nios2_diagnose_overflow): Handle signed_immed12_overflow. Issue generic overflow messages for miscellaneous instruction formats. (md_apply_fix): Recognize new R2 relocations. For pc_relative relocations, store fixup in *valP. (nios2_reglist_mask, nios2_reglist_dir): New. (nios2_parse_reglist): New. (nios2_parse_base_register): New. (nios2_assemble_expression): Handle constant expressions designated by BFD_RELOC_NONE. (nios2_assemble_reg3): New. (nios2_assemble_arg_c): Handle R2 instruction formats. (nios2_assemble_arg_d): Likewise. (nios2_assemble_arg_s): Likewise. (nios2_assemble_arg_t): Likewise. (nios2_assemble_arg_D): New. (nios2_assemble_arg_S): New. (nios2_assemble_arg_T): New. (nios2_assemble_arg_i): Handle R2 instruction formats. (nios2_assemble_arg_I): New. (nios2_assemble_arg_u): Handle R2 instruction formats. (nios2_assemble_arg_U): New. (nios2_assemble_arg_V): New. (nios2_assemble_arg_W): New. (nios2_assemble_arg_X): New. (nios2_assemble_arg_Y): New. (nios2_assemble_arg_o): Handle R2 instruction formats. (nios2_assemble_arg_O): New. (nios2_assemble_arg_P): New. (nios2_assemble_arg_j): Handle R2 instruction formats. (nios2_assemble_arg_k): New. (nios2_assemble_arg_l): Handle R2 instruction formats. (nios2_assemble_arg_m): Likewise. (nios2_assemble_arg_M): New. (nios2_assemble_arg_N): New. (nios2_assemble_arg_e): New. (nios2_assemble_arg_f): New. (nios2_assemble_arg_g): New. (nios2_assemble_arg_h): New. (nios2_assemble_arg_R): New. (nios2_assemble_arg_B): New. (nios2_assemble_args): Handle new argument letters. (nios2_consume_arg): Likewise. (nios2_translate_pseudo_insn): Avoid dereferencing null pointer in error message. (nios2_ps_insn_info_structs): Add nop.n. (output_ubranch): Handle CDX branches. (output_cbranch): Likewise. (output_call): Handle R2 encodings. (output_movia): Likewise. (md_begin): Initialize nios2_min_align. (md_assemble): Align to nios2_min_align. Adjust nios2_min_align if a 16-bit instruction is seen. (nios2_cons_align): Use appropriate nop pattern. include/opcode/ * nios2.h (enum iw_format_type): Add R2 formats. (enum overflow_type): Add signed_immed12_overflow and enumeration_overflow for R2. (struct nios2_opcode): Document new argument letters for R2. (REG_3BIT, REG_LDWM, REG_POP): Define. (includes): Include nios2r2.h. (nios2_r2_opcodes, nios2_num_r2_opcodes): Declare. (nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): Declare. (nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): Declare. (nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): Declare. (nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): Declare. (nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings): Declare. * nios2r2.h: New file. opcodes/ * nios2-dis.c (nios2_extract_opcode): New. (nios2_disassembler_state): New. (nios2_find_opcode_hash): Use mach parameter to select correct disassembler state. (nios2_print_insn_arg): Extend to support new R2 argument letters and formats. (print_insn_nios2): Check for 16-bit instruction at end of memory. * nios2-opc.c (nios2_builtin_regs): Add R2 register attributes. (NIOS2_NUM_OPCODES): Rename to... (NIOS2_NUM_R1_OPCODES): This. (nios2_r2_opcodes): New. (NIOS2_NUM_R2_OPCODES): New. (nios2_num_r2_opcodes): New. (nios2_r2_asi_n_mappings, nios2_num_r2_asi_n_mappings): New. (nios2_r2_shi_n_mappings, nios2_num_r2_shi_n_mappings): New. (nios2_r2_andi_n_mappings, nios2_num_r2_andi_n_mappings): New. (nios2_r2_reg3_mappings, nios2_num_r2_reg3_mappings): New. (nios2_r2_reg_range_mappings, nios2_num_r2_reg_range_mappings): New.
2015-07-01Add Nios II arch flags and compatibility testsSandra Loosemore4-2/+93
2015-07-01 Sandra Loosemore <sandra@codesourcery.com> Cesar Philippidis <cesar@codesourcery.com> bfd/ * archures.c (bfd_mach_nios2r1, bfd_mach_nios2r2): New. * bfd-in2.h: Regenerated. * cpu-nios2.c (nios2_compatible): New. (N): Use nios2_compatible instead of bfd_default_compatible. (NIOS2R1_NEXT, NIOS2R2_NEXT): Define. (arch_info_struct): New. (bfd_nios2_arch): Chain to NIOS2R1_NEXT. * elf32-nios2.c (is_nios2_elf): New. (nios2_elf32_merge_private_bfd_data): New. (nios2_elf32_object_p): New. (bfd_elf32_bfd_merge_private_bfd_data): Define. (elf_backend_object_p): Define. gas/ * config/tc-nios2.c: Adjust includes. (OPTION_MARCH): Define. (md_longopts): Add -march option. (nios2_architecture): New. (nios2_use_arch): New. (md_parse_option): Handle OPTION_MARCH. (md_show_usage): Document -march. (md_begin): Set arch in BFD. (nios2_elf_final_processing): New. * config/tc-nios2.h (elf_tc_final_processing): Define. (nios2_elf_final_processing): New. * doc/c-nios2.texi (-march): Add documentation. include/elf/ * nios2.h (EF_NIOS2_ARCH_R1, EF_NIOS2_ARCH_R2): Define. ld/testsuite/ * ld-nios2/mixed1a.d: New. * ld-nios2/mixed1a.s: New. * ld-nios2/mixed1b.d: New. * ld-nios2/mixed1b.s: New. * ld-nios2/nios2.exp: Build the new compatibility tests.
2015-06-30Add support for monitorx/mwaitx instructionsAmit Pawar19-5/+342
gas/ * config/tc-i386.c (cpu_arch): Add .mwaitx. (process_immext): Check operands for monitorx/mwaitx instructions. * doc/c-i386.texi: Document mwaitx. gas/testsuite/ * gas/i386/i386.exp: Add new mwaitx test cases. * gas/i386/mwaitx.s: New. * gas/i386/mwaitx-bdver4.d: New. * gas/i386/x86-64-mwaitx.s: New. * gas/i386/x86-64-mwaitx-bdver4.d: New. * gas/i386/mwaitx-reg.s: New. * gas/i386/mwaitx-reg.l: New. * gas/i386/x86-64-mwaitx-reg.l: New. * gas/i386/x86-64-mwaitx-reg.s: New. * gas/i386/arch-13.s: Updated. * gas/i386/arch-13.d: Updated. * gas/i386/arch-13-znver1.d: Updated. * gas/i386/x86-64-arch-3.s: Updated. * gas/i386/x86-64-arch-3.d: Updated. * gas/i386/x86-64-arch-3-znver1.d: Updated. opcodes/ * i386-dis.c (OP_Mwaitx): New. (rm_table): Add monitorx/mwaitx. * i386-gen.c (cpu_flag_init): Add CpuMWAITX to CPU_BDVER4_FLAGS and CPU_ZNVER1_FLAGS. Add CPU_MWAITX_FLAGS. (operand_type_init): Add CpuMWAITX. * i386-opc.h (CpuMWAITX): New. (i386_cpu_flags): Add cpumwaitx. * i386-opc.tbl: Add monitorx and mwaitx. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2015-06-30Add support for SADDR addressing to the RL78 port.Nick Clifton2-29/+28
gas * config/rl78-parse.y: Tag all saddr expressions throughout. (SET_SA): New. (expr_is_saddr): Allow symbolic expressions. * config/tc-rl78.c (md_apply_fix): Handle SADDR. bfd * elf32-rl78.c (rl78_elf_howto_table): Add RH_SADDR. (rl78_reloc_map): Add R_RL78_RH_SADDR. * reloc.c: Add BFD_RELOC_RL78_SADDR. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate.
2015-06-28Remove COMPRESS_DEBUG_ZLIBH.J. Lu3-2/+8
COMPRESS_DEBUG_ZLIB isn't needed. This patch removes COMPRESS_DEBUG_ZLIB and replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB. bfd/ * bfd-in.h (compressed_debug_section_type): Remove COMPRESS_DEBUG_ZLIB. * bfd-in2.h : Regenerated. gas/ * as.c (parse_args): Replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB. * config/tc-i386.c (flag_compress_debug): Likewise. ld/ * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Replace COMPRESS_DEBUG_ZLIB with COMPRESS_DEBUG_GNU_ZLIB.
2015-06-27Update ia64 gas testsH.J. Lu3-2/+7
* gas/ia64/psn.d: Updated. * gas/ia64/xdata-ilp32.d: Likewise.
2015-06-25Update .strtab section sizes in mmix testsH.J. Lu3-2/+7
Since commit ef10c3ace00674e8c3599c3bf95f06c87d68898b may reduce .strtab section size, we need to adjust expected .strtab section sizes in mmix tests. gas/testsuite/ * gas/mmix/loc-3.d: Updated. * gas/mmix/loc-5.d: Likewise. ld/testsuite/ * ld-mmix/bspec1.d: Updated. * ld-mmix/bspec2.d: Likewise. * ld-mmix/undef-3.d: Likewise.
2015-06-25Use strtab with GC and suffix merging for .strtabH.J. Lu4-0/+24
This patch uses ELF strtab with GC and suffix merging support to create ELF .strtab section. There is some small memory overhead to use ELF strtab: ==14928== HEAP SUMMARY: ==14928== in use at exit: 3,276,318 bytes in 679 blocks ==14928== total heap usage: 1,544 allocs, 865 frees, 15,259,146 bytes allocated vs. ==14936== HEAP SUMMARY: ==14936== in use at exit: 3,276,318 bytes in 679 blocks ==14936== total heap usage: 1,532 allocs, 853 frees, 15,026,402 bytes allocated when running: ./ld-new -m elf_x86_64 -o tmpdir/ld-partial.o -r ldgram.o ldlex-wrapper.o lexsup.o ldlang.o mri.o ldctor.o ldmain.o plugin.o ldwrite.o ldexp.o ldemul.o ldver.o ldmisc.o ldfile.o ldcref.o eelf_x86_64.o eelf32_x86_64.o eelf_i386.o eelf_iamcu.o ei386linux.o eelf_l1om.o eelf_k1om.o ldbuildid.o The results are [32] .strtab STRTAB 0+ 3beff8 00407a 00 0 0 1 vs [32] .strtab STRTAB 0+ 3beff8 0041d8 00 0 0 1 It reduces the .strtab size by 350 bytes, about 2% Saving on libc.so from glibc is much more since libc.so has many alias symbols with the same suffix. For x32 glibc, [82] .strtab STRTAB 0+ 81b348 0159e7 00 0 0 1 vs [82] .strtab STRTAB 0+ 81b8bc 019e72 00 0 0 1 It reduces the .strtab size by 17547 bytes, about 16%. bfd/ PR gas/18451 * elf-bfd.h (elf_sym_strtab): New. (elf_link_hash_table): Add strtabcount, strtabsize and strtab. (_bfd_elf_stringtab_init): Removed. * elf.c (_bfd_elf_stringtab_init): Removed. (_bfd_elf_compute_section_file_positions): Replace bfd_strtab_hash/_bfd_elf_stringtab_init/_bfd_stringtab_free/ _bfd_stringtab_size with elf_strtab_hash/_bfd_elf_strtab_init/_bfd_elf_strtab_free/ _bfd_elf_strtab_size. Use _bfd_elf_strtab_add, _bfd_elf_strtab_finalize and _bfd_elf_strtab_offset to get st_name. (swap_out_syms): Likewise. * elflink.c (elf_final_link_info): Replace bfd_strtab_hash with elf_strtab_hash. Remove symbuf, symbuf_count, symbuf_size and shndxbuf_size. (elf_link_flush_output_syms): Removed. (elf_link_output_sym): Renamed to ... (elf_link_output_symstrtab): This. Replace _bfd_stringtab_add with _bfd_elf_strtab_add. Don't flush symbols to the file nor swap out symbols. (elf_link_swap_symbols_out): New. (elf_link_output_extsym): Replace elf_link_output_sym with elf_link_output_symstrtab. (elf_link_input_bfd): Likewise. (elf_final_link_free): Replace _bfd_stringtab_free with _bfd_elf_strtab_free. Remove symbuf. (bfd_elf_final_link): Replace _bfd_elf_stringtab_init with _bfd_elf_strtab_init. Don't set symbuf, symbuf_count, symbuf_size nor shndxbuf_size. Initialize strtabsize and strtab. Initialize symshndxbuf to -1 when number of sections >= 64K. Replace elf_link_output_sym/elf_link_output_sym with elf_link_output_symstrtab/elf_link_output_symstrtab. Don't call elf_link_flush_output_syms. Call _bfd_elf_strtab_finalize and elf_link_swap_symbols_out. Replace _bfd_stringtab_size and _bfd_stringtab_emit with _bfd_elf_strtab_size and _bfd_elf_strtab_emit. gas/testsuite/ PR gas/18451 * gas/elf/elf.exp: Run strtab. * gas/elf/strtab.d: New file. * gas/elf/strtab.s: Likewise. ld/testsuite/ PR gas/18451 * ld-elf/strtab.d: New file. * ld-elf/strtab.s: Likewise.
2015-06-24Remove the extra @section .cfi_lsdaH.J. Lu2-1/+4
Commit 2f0c68f23bb3132cd5ac466ca8775c0d9e4960cd added an extra @section .cfi_lsda: @subsection @code{.cfi_lsda @var{encoding} [, @var{exp}]} +@section @code{.cfi_lsda @var{encoding} [, @var{exp}]} @code{.cfi_lsda} defines LSDA and its encoding. It shouldn't be there. * doc/as.texinfo (.cfi_lsda): Remove the extra @section.
2015-06-22PPC sync instruction accepts invalid and incompatible operandsPeter Bergner3-4/+9
ISA 2.07 added a new category called Elemental Memory Barriers that modifies the sync instruction to accept an additional operand ESYNC. Edmar added support for this insruction varient here: https://sourceware.org/ml/binutils/2012-02/msg00221.html Looking at this closer, I see that the insert_ls() function is misnamed (since it's attached to the ESYNC operand, not the LS operand) but more importantly, it is silently modifying the LS operand value behind the users back when the LS operand is either invalid or is incompatible with the new ESYNC operand. The ISA 2.07 doc has an Assembler Note that clearly states that assemblers that support the ESYNC operand should report all invalid uses of LS and ESYNC. This patch changes the assembler to error out on invalid and incompatible operand usage. opcodes/ * ppc-opc.c (insert_ls): Test for invalid LS operands. (insert_esync): New function. (LS, WC): Use insert_ls. (ESYNC): Use insert_esync. gas/testsuite/ * gas/ppc/e6500.s <sync>: Fix invalid test. * gas/ppc/e6500.d: Likewise.
2015-06-22Stop "objdump -d" from disassembling past a symbolic address.Nick Clifton7-36/+48
include * dis-asm.h (struct disassemble_info): Add stop_vma field. binuti * objdump.c (disassemble_bytes): Set the stop_vma field in the disassemble_info structure when disassembling code sections with -d. * doc/binutils.texi (objdump): Document the discrepancy between -d and -D. opcodes * dis-buf.c (buffer_read_memory): Fail is stop_vma is set and the requested region lies beyond it. * bfin-dis.c (print_insn_bfin): Ignore sysop instructions when looking for 32-bit insns. * mcore-dis.c (print_insn_mcore): Disable stop_vma when reading data. * sh-dis.c (print_insn_sh): Likewise. * tic6x-dis.c (print_insn_tic6x): Disable stop_vma when reading blocks of instructions. * vax-dis.c (print_insn_vax): Check that the requested address does not clash with the stop_vma. tests * gas/arm/backslash-at.s: Add extra .byte directives so that the foo symbol does not appear to point half way through an instruction. * gas/arm/backslash-at.d: Update expected disassembly. * gas/i386/ilp32/x86-64-opcode-inval-intel.d: Likewise. * gas/i386/ilp32/x86-64-opcode-inval.d: Likewise. * gas/i386/x86-64-opcode-inval-intel.d: Likewise. * gas/i386/x86-64-opcode-inval.d: Likewise.
2015-06-19Allow for optional operands with non-zero default values.Peter Bergner6-6/+23
ISA 2.07 (ie, POWER8) added the rfebb instruction which takes one operand with the value of either a 0 or 1. It also defines an extended mnemonic with no operands (ie, "rfebb") that is supposed to be equivalent to "rfebb 1". I implemented rfebb's lone operand with PPC_OPERAND_OPTIONAL, but the problem is, optional operands that are ommitted always default to the value 0, which is wrong in this case. I have added support for allowing non-zero default values by adding an additional flag PPC_OPERAND_OPTIONAL_VALUE that specifies that the default operand value to be used is stored in the SHIFT field of the operand field immediately following this one. This fixes the rfebb issue. I also fixed the mftb and mfcr instructions so they use the same mechanism. This allows us to flag invalid uses of mfcr where we explicitly pass in a zero FXM value, like the use in a2.[sd]. include/opcode/ * ppc.h (PPC_OPERAND_OPTIONAL_VALUE): New. (ppc_optional_operand_value): New inline function. opcodes/ * ppc-dis.h (skip_optional_operands): Use ppc_optional_operand_value. * ppc-opc.c (FXM4): Add non-zero optional value. (TBR): Likewise. (SXL): Likewise. (insert_fxm): Handle new default operand value. (extract_fxm): Likewise. (insert_tbr): Likewise. (extract_tbr): Likewise. gas/ * config/tc-ppc.c (md_assemble): Use ppc_optional_operand_value. Allow for optional operands without insert functions. gas/testsuite/ * gas/ppc/power8.d: Fixup rfebb test results. * gas/ppc/a2.s: Fix invalid mfcr test. * gas/ppc/a2.d: Likewise.
2015-06-18Add support for using the ADR alias in Thumb mode against nearby symbols.Nick Clifton6-0/+72
PR gas/18541 gas * config/tc-arm.c (md_apply_fix): Add support for ADR in thumb mode against a nearby symbol. tests * gas/arm/thumb.s: Add test of ADR against a nearby symbol. * gas/arm/thumb.d: Update expected output. * gas/arm/thumb-eabi.d: Likewise.
2015-06-18Fix the computation of the addends for an ARM_TLS_LE32 reloc.Nick Clifton5-2/+56
PR gas/18481 bfd * elf32-arm.c (R_ARM_TLS_LE32): Set the special function to NULL. gas * config/tc-arm.c (tc_gen_reloc): Include BFD_RELOC_ARM_TLS_LE32 in the same case as BFD_RELOC_ARM_TLS_IS32. tests * gas/arm/tls.s: Add tests of the tpoff pseudo with a local symbol. * gas/arm/tls.d: Update expected output.
2015-06-17Fix compile warnings building previous delta in a 32-bit environment.Nick Clifton2-8/+43
* config/tc-arm.c (is_double_a_single): Make conditional upon the availablity of a 64-bit type. Use this type for the argument and mantissa. (double_to_single): Likewise. * config/tc-arm.c (move_or_literal_pool): Use a 64-bit type for the constant value, if available. Generate a 64-bit value from a bignum if supported. Only perform the second optimization for PR 18500 if the 64-bit type is available.
2015-06-17Add support for converting LDR Rx,=<imm> to MOV or MVN in Thumb2 mode.Alessandro Marzocchi7-4/+126
PR gas/18499 gas * config/tc-arm.c (move_or_literal_pool): Add support for LDR Rx,= to MOV.w or MVN.w for Thumb2. tests * gas/arm/thumb2_ldr_immediate_armv6.s: New test case. * gas/arm/thumb2_ldr_immediate_armv6.d: Expected disassembly. * gas/arm/thumb2_ldr_immediate_armv6t2.s: New test case. * gas/arm/thumb2_ldr_immediate_armv6t2.d: Expected disassembly.
2015-06-17Add support for converting VLDR <reg>,=<constant> to a VMOV instruction when ↵Alessandro Marzocchi10-61/+452
appropriate. PR gas/18500 gas * config/tc-arm.c (is_double_a_single): New function. (double_to_single): New function. (move_or_literal_pool): Add support for converting VLDR to VMOV. tests * gas/arm/vfpv2-ldr_immediate.s: New test case. * gas/arm/vfpv2-ldr_immediate.d: Expected disassembly. * gas/arm/vfpv3-ldr_immediate.s: New test case. * gas/arm/vfpv3-ldr_immediate.d: Expected disassembly. * gas/arm/vfpv3xd-ldr_immediate.s: New test case. * gas/arm/vfpv3xd-ldr_immediate.d: Expected disassembly.
2015-06-17gas: section name substitution sequenceNicolas Pitre5-1/+81
This patch adds the ability to automatically construct a section name based on the prior section. When gas is invoked with --sectname-subst, the occurrence of %S in a section name will be substituted by the name of the current section. For example: .macro exception_code .pushsection %S.exception [exception code here] .popsection .endm .text [code] exception_code [...] .section .init [init code] exception_code [...] The first and second exception_code invocations create the .text.exception and the .init.exception sections respectively. This is useful e.g. to discriminate between anciliary sections that are tied to .init code and can be discarded at run time when initialization is over vs anciliary sections tied to .text sections that need to stay resident. * as.c (show_usage): Document --sectname-subst. (parse_args): Add --sectname-subst. * as.h (flag_sectname_subst): New. * config/obj-elf.c (obj_elf_section_name): Add %S substitution. * doc/as.texinfo: Document it.
2015-06-16[AArch64] Support id_mmfr4 system registerMatthew Wahab3-11/+18
2015-06-16 Matthew Wahab <matthew.wahab@arm.com> opcodes/ * aarch64-opc.c (aarch64_sys_regs): Add "id_mmfr4_el1". gas/testsuite * sysreg.d: Add id_mmfr4_el1, update expected output. * sysreg.s: Add id_mmfr4_el1.
2015-06-15[AArch64] Gas add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 supportRenlin Li5-15/+41
2015-06-15 Renlin Li <renlin.li@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_LD64_GOTOFF_LO15): New entry. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_LD64_GOTOFF_LO15. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifier. (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTOFF_LO15. (aarch64_force_relocation): Ditto gas/testsuite/ * gas/aarch64/reloc-insn.s: Update test * gas/aarch64/reloc-insn.d: Update expected result.
2015-06-15gas: Don't use frag_align but use plain padding to align .debug_aranges.Mark Wielaard5-2/+55
out_debug_aranges uses frag_align to make sure the addresses start out aligned. Using frag_align will call frag_var[_init], which will end up calling TC_FRAG_INIT. On arm and aarch64 TC_FRAG_INIT will generate a $d mapping symbol for the .debug_aranges to show that at that point a sequence of data items starts. Such a symbol pointing into a non-allocated debug section will confuse eu-strip -g. And it seems inefficient and wrong in general to have additional mapping symbols for debug sections, which won't contain actual code in the first place. Just keep track of the aranges header size and use plain padding to align the addresses which avoids generating any mapping symbols on aarch64 and arm. Includes a testcase for aarch64 that PASS with this patch and shows the extra $d mapping symbol in .debug_aranges before. gas/ChangeLog * dwarf2dbg.c (out_header): Document EXPR->X_add_number value, out_debug_aranges depends on it. (out_debug_aranges): Track size of header to properly pad header for address alignment. gas/testsuite/ChangeLog * gas/aarch64/dwarf.d: New. * gas/aarch64/dwarf.s: New.
2015-06-11tc-hppa.c: Speed up search for last labelJohn David Anglin2-50/+28
2015-06-08Fix RX GAS handling of integer bignums.Nick Clifton2-22/+33
* config/tc-rx.c (rx_op): Correct handling of integer bignums.
2015-06-04Add hwsync extended mnemonic.Peter Bergner3-4/+18
This commit adds a new extended menmonic for "sync 0" (same as "sync"). The ISA documentation doesn't explicitly mention hwsync as an extended mnemonic (yet), but it does mention "heavyweight sync" and "hwsync" as the operation that gets performed when the sync's L field is 0. This is only enabled for POWER4 and later. opcodes/ * ppc-opc.c: (powerpc_opcodes) <hwsync>: New extended mnemonic. gas/testsuite/ * gas/ppc/a2.d: Fixup test case due to new extended mnemonic. * gas/ppc/power4.s <hwsync, lwsync, ptesync, sync>: Add tests. * gas/ppc/power4.d: Likewise.
2015-06-04Fix compile time warning for tc-h8300.c when using gcc 5+.Nick Clifton2-1/+6
* config/tc-h8300.c (md_section_align): Fix compile time warning about left shifting a negative value.
2015-06-04[AArch64] Add support for ARMv8.1 command line optionMatthew Wahab4-1/+13
2015-06-04[ARM] Use frag's thumb_mode information when availableJiong Wang2-2/+11
2015-06-04 Renlin Li <renlin.li@arm.com> * config/tc-arm.c (arm_init_frag): Use frag's thumb_mode information when available.
2015-06-03[ARM] Commit approaved testcases missed in previous commitMatthew Wahab3-0/+142
2015-06-03 Matthew Wahab <matthew.wahab@arm.com> * gas/arm/armv8-a+rdma.d: New. * gas/arm/armv8-a+rdma.s: New.
2015-06-03[ARM] Support for ARMv8.1 command line optionMatthew Wahab4-0/+12
2015-06-03 Matthew Wahab <matthew.wahab@arm.com> gas/ * config/tc-arm.c (arm_archs): Add "armv8.1-a". * doc/c-arm.texi (ARM Options, -march): Add "armv8.1-a". * NEWS: Mention ARMv8.1 support. include/opcode/ * arm.h (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): New. (ARM_ARCH_V8_1A): New. (ARM_ARCH_V8_1A_FP): New. (ARM_ARCH_V8_1A_SIMD): New. (ARM_ARCH_V8_1A_CRYPTOV1): New. (ARM_FEATURE_CORE): New.
2015-06-02[ARM] Support for ARMv8.1 Adv.SIMD extensionMatthew Wahab2-2/+18
2015-06-02[ARM] Add support for ARMv8.1 PAN extensionMatthew Wahab6-9/+79
2015-06-02[AArch64] Support for ARMv8.1a Adv.SIMD instructionsMatthew Wahab7-0/+232
2015-06-02 Matthew Wahab <matthew.wahab@arm.com> gas/ * config/tc-aarch64.c (aarch64_features): Add "rdma". * doc/c-aarch64.texi (AArch64 Extensions): Add "rdma". gas/testsuite/ * rdma-directive.d: New. * rdma.d: New. * rdma.s: New. include/opcode/ * aarch64.h (AARCH64_FEATURE_RDMA): New. opcode/ * aarch64-tbl.h (aarch64_feature_rdma): New. (RDMA): New. (aarch64_opcode_table): Add "sqrmlah" and "sqrdmlsh" instructions. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate.
2015-06-02[AArch64] Support for ARMv8.1a Limited Ordering Regions extensionMatthew Wahab7-0/+106
2015-06-02 Matthew Wahab <matthew.wahab@arm.com> include/ * aarch64.h (AARCH64_FEATURE_LOR): New. opcodes/ * aarch64-tbl.h (aarch64_feature_lor): New. (LOR): New. (aarch64_opdocde_table): Add "ldlar", "ldlarb", "ldlarh", "stllr", "stllrb", "stllrh". * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. gas/ * config/tc-aarch64.c (aarch64_features): Add "lor". * doc/c-aarch64.c (Aarch64 Extensions): Add "lor" to list of architecture extensions. gas/testsuite/ * lor-directive.d: New. * lor.d: New. * lor.s: New.
2015-06-01[AArch64][GAS] Add support for PAN architecture extensionMatthew Wahab7-5/+92
2015-06-01 Matthew Wahab <matthew.wahab@arm.com> gas/ * config/tc-aarch64.c (parse_sys_reg): New parameter. Check target support. Fix whitespace. (parse_operands): Update for parse_sys_reg changes. (aarch64_features): Add "pan". * doc/c-aarch64.texi (Aarch64 Extensions): Add "pan". gas/testsuite/ * pan-directive.d: New. * pan.d: New. * pan.s: New
2015-06-01[AArch64] GAS support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14Jiong Wang5-0/+25
This patch add BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14 support in Gas. The relocation modifier === :gotpage_lo14:symbol 2015-06-01 Jiong.Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14. (aarch64_force_relocation): Ditto. gas/testsuite/ * gas/aarch64/ilp32-basic.s: New testcase. * gas/aarch64/ilp32-basic.d: Ditto.
2015-06-01[AArch64] GAS Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15Jiong Wang5-15/+42
2015-06-01 Jiong.Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15. (aarch64_force_relocation): Ditto. gas/testsuite/ * gas/aarch64/reloc-insn.s: New testcase. * gas/aarch64/reloc-insn.d: Ditto.
2015-06-01x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct operand orderJan Beulich7-432/+439
As pointed out before, the documentation mandates the rounding mode to follow the GPR, so disassembler should produce output accordingly. gas/testsuite/ 2015-06-01 Jan Beulich <jbeulich@suse.com> * gas/i386/avx512f.s: Adjust operand order for Intel syntax vcvt{,u}si2ss. * gas/i386/x86-64-avx512f.s: Adjust operand order for Intel syntax vcvt{,u}si2s{d,s}. opcodes/ 2015-06-01 Jan Beulich <jbeulich@suse.com> * i386-dis.c (print_insn): Swap rounding mode specifier and general purpose register in Intel mode.
2015-06-01x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}Jan Beulich3-72/+81
As pointed out before, the documentation mandates the rounding mode to follow the GPR, so gas should accept such input. As the brojen code got released already we sadly will need to continue to also accept the badly ordered operands. gas/testsuite/ 2015-06-01 Jan Beulich <jbeulich@suse.com> * gas/i386/avx512f-intel.d: Adjust expectations on operand order. * gas/i386/evex-lig256-intel.d: Likewise. * gas/i386/evex-lig512-intel.d: Likewise. * gas/i386/x86-64-avx512f-intel.d: Likewise. * gas/i386/x86-64-evex-lig256-intel.d: Likewise. * gas/i386/x86-64-evex-lig512-intel.d: Likewise. opcodes/ 2015-06-01 Jan Beulich <jbeulich@suse.com> * i386-opc.tbl: New IntelSyntax entries for vcvt{,u}si2s{d,s}. * i386-tbl.h: Regenerate.
2015-05-28Compact EH SupportCatherine Moore35-151/+1547
The specification for the Compact EH format is available at: https://github.com/MentorEmbedded/cxx-abi/blob/master/MIPSCompactEH.pdf 2015-05-28 Catherine Moore <clm@codesourcery.com> Bernd Schmidt <bernds@codesourcery.com> Paul Brook <paul@codesourcery.com> bfd/ * bfd-in2.h: Regenerated. * elf-bfd.h (DWARF2_EH_HDR, COMPACT_EH_HDR): Define. (COMPACT_EH_CANT_UNWIND_OPCODE): Define. (dwarf_eh_frame_hdr_info): Move dwarf-specific fields from eh_frame_hdr_info. (compact_eh_frame_hdr_info): Declare. (eh_frame_hdr_info): Redeclare with union for dwarf-specific fields and compact-eh fields. (elf_backend_data): Add cant_unwind_opcode and compact_eh_encoding. (bfd_elf_section_data): Add eh_frame_entry_field. (elf_section_eh_frame_entry): Define. (bfd_elf_parse_eh_frame_entries): Declare. (_bfd_elf_parse_eh_frame_entry): Declare. (_bfd_elf_end_eh_frame_parsing): Declare. (_bfd_elf_write_section_eh_frame_entry): Declare. (_bfd_elf_eh_frame_entry_present): Declare. (_bfd_elf_section_for_symbol): Declare. * elf-eh-frame.c (bfd_elf_discard_eh_frame_entry): New function. (bfd_elf_record_eh_frame_entry): New function. (_bfd_elf_parse_eh_frame_entry): New function. (_bfd_elf_parse_eh_frame): Update hdr_info field references. (cmp_eh_frame_hdr): New function. (add_eh_frame_hdr_terminator): New function. (_bfd_elf_end_eh_frame_parsing): New function. (find_merged_cie): Update hdr_info field references. (_bfd_elf_discard_section_eh_frame): Likewise. (_bfd_elf_discard_section_eh_frame_hdr): Add Compact EH support. (_bfd_elf_eh_frame_entry_present): New function. (_bfd_elf_maybe_strip_eh_frame_hdr): Add Compact EH support. (_bfd_elf_write_section_eh_frame_entry): New function. (_bfd_elf_write_section_eh_frame): Update hdr_info field references. (_bfd_elf_fixup_eh_frame_hdr): New function. (write_compact_eh_frame_hdr): New function. (write_dwarf_eh_frame_hdr): New function. (_bfd_elf_write_section_eh_frame_hdr): Add Compact EH support. * elflink.c (_bfd_elf_section_for_symbol): New function. (elf_section_ignore_discarded_relocs): Add Compact EH support. (elf_link_input_bfd): Likewise. (bfd_elf_final_link): Likewise. (_bfd_elf_gc_mark): Likewise. (bfd_elf_parse_eh_frame_entries): New function. (bfd_elf_gc_sections): Add Compact EH support. (bfd_elf_discard_info): Likewise. * elfxx-mips.c: Include dwarf2.h. (_bfd_mips_elf_compact_eh_encoding): New function. (_bfd_mips_elf_cant_unwind_opcode): New function. * elfxx-mips.h (_bfd_mips_elf_compact_eh_encoding): Declare. (_bfd_mips_elf_cant_unwind_opcode): Declare. (elf_backend_compact_eh_encoding): Define. (elf_backend_cant_unwind_opcode): Define. * elfxx-target.h (elf_backend_compact_eh_encoding): Provide default. (elf_backend_cant_unwind_opcode): Provide default. (elf_backend_data elfNN_bed): Add elf_backend_compact_eh_encoding and elf_backend_cant_unwind_opcode. * section.c (SEC_INFO_TYPE_EH_FRAME_ENTRY): Add definition. gas/ * config/tc-alpha.c (all_cfi_sections): Declare. (s_alpha_ent): Initialize all_cfi_sections. (alpha_elf_md_end): Invoke cfi_set_sections. * config/tc-mips.c (md_apply_fix): Handle BFD_RELOC_NONE. (s_ehword): Use BFD_RELOC_32_PCREL. (mips_fix_adjustable): Handle BFD_RELOC_32_PCREL. (mips_cfi_reloc_for_encoding): New function. * tc-mips.h (DWARF2_FDE_RELOC_SIZE): Redefine. (DWARF2_FDE_RELOC_ENCODING): Define. (tc_cfi_reloc_for_encoding): Define. (mips_cfi_reloc_for_encoding): Define. (tc_compact_eh_opcode_stop): Define. (tc_compact_eh_opcode_pad): Define. * doc/as.texinfo: Document Compact EH extensions. * doc/internals.texi: Likewise. * dw2gencfi.c (EH_FRAME_LINKONCE): Redefine. (tc_cfi_reloc_for_encoding): Provide default. (compact_eh): Declare. (emit_expr_encoded): New function. (get_debugseg_name): Add Compact EH support. (alloc_debugseg_item): Likewise. (cfi_set_sections): New function. (dot_cfi_fde_data): New function. (dot_cfi_personality_id): New function. (dot_cfi_inline_lsda): New function. (cfi_pseudo_table): Add cfi_fde_data, cfi_personality_id, and cfi_inline_lsda. (dot_cfi_personality): Add Compact EH support. (dot_cfi_lsda): Likewise. (dot_cfi_sections): Likewise. (dot_cfi_startproc): Likewise. (get_cfi_seg): Likewise. (output_compact_unwind_data): New function. (output_cfi_insn): Add Compact EH support. (output_cie): Likewise. (output_fde): Likewise. (cfi_finish): Likewise. (cfi_emit_eh_header): New function. (output_eh_header): New function. * dw2gencfi.h (cfi_set_sections): Declare. (SUPPORT_COMPACT_EH): Define. (MULTIPLE_FRAME_SECTIONS): Define. New enumeration to describe the Compact EH header format. (fde_entry): Add new fields personality_id, eh_header_type, eh_data_size, eh_data, eh_loc and sections. (CFI_EMIT_eh_frame, CFI_EMIT_debug_frame, CFI_EMIT_target, CFI_EMIT_eh_frame_compact): Define. 2015-05-22 Catherine Moore <clm@codesourcery.com> Bernd Schmidt <bernds@codesourcery.com> gas/testsuite/ * gas/mips/mips.exp: Run new tests. * gas/mips/compact-eh-1.s: New file. * gas/mips/compact-eh-2.s: New file. * gas/mips/compact-eh-3.s: New file. * gas/mips/compact-eh-4.s: New file. * gas/mips/compact-eh-5.s: New file. * gas/mips/compact-eh-6.s: New file. * gas/mips/compact-eh-7.s: New file. * gas/mips/compact-eh-eb-1.d: New file. * gas/mips/compact-eh-eb-2.d: New file. * gas/mips/compact-eh-eb-3.d: New file. * gas/mips/compact-eh-eb-4.d: New file. * gas/mips/compact-eh-eb-5.d: New file. * gas/mips/compact-eh-eb-6.d: New file. * gas/mips/compact-eh-eb-7.d: New file. * gas/mips/compact-eh-el-1.d: New file. * gas/mips/compact-eh-el-2.d: New file. * gas/mips/compact-eh-el-3.d: New file. * gas/mips/compact-eh-el-4.d: New file. * gas/mips/compact-eh-el-5.d: New file. * gas/mips/compact-eh-el-6.d: New file. * gas/mips/compact-eh-el-7.d: New file. * gas/mips/compact-eh-err1.l: New file. * gas/mips/compact-eh-err1.s: New file. * gas/mips/compact-eh-err2.l: New file. * gas/mips/compact-eh-err2.s: New file. 2015-05-22 Catherine Moore <clm@codesourcery.com> include/ * bfdlink.h: Rename eh_frame_hdr to eh_frame_hdr_type. 2015-05-22 Catherine Moore <clm@codesourcery.com> Paul Brook <paul@codesourcery.com> ld/ * emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Add Compact EH support. * scripttempl/elf.sc: Handle .eh_frame_entry and .gnu_extab sections. 2015-05-22 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-mips-elf/compact-eh.ld: New linker script. * ld-mips-elf/compact-eh1.d: New. * ld-mips-elf/compact-eh1.s: New. * ld-mips-elf/compact-eh1a.s: New. * ld-mips-elf/compact-eh1b.s: New. * ld-mips-elf/compact-eh2.d: New. * ld-mips-elf/compact-eh2.s: New. * ld-mips-elf/compact-eh3.d: New. * ld-mips-elf/compact-eh3.s: New. * ld-mips-elf/compact-eh3a.s: New. * ld-mips-elf/compact-eh4.d: New. * ld-mips-elf/compact-eh5.d: New. * ld-mips-elf/compact-eh6.d: New. * ld-mips-elf/mips-elf.exp: Run new tests.
2015-05-26xtensa: fix gas segfault with --text-section-literalsMax Filippov2-1/+15
When --text-section-literals is used and code in the .init or .fini emits literal in the absence of .literal_position, xtensa_move_literals segfaults. Check that search_frag is non-NULL in the xtensa_move_literals and report error otherwise. 2015-05-26 Max Filippov <jcmvbkbc@gmail.com> gas/ * config/tc-xtensa.c (xtensa_move_literals): Check that search_frag is non-NULL. Report error if literal frag is not found.
2015-05-22Fixes: "gas/read.c:5087:12: error: left shift of negative"Nick Clifton2-1/+7
PR gas/18446 * read.c (output_big_sleb128): Use U suffix to prevent compile time warning.
2015-05-20[AArch64] Sort relocation case labels alphabeticallyJiong Wang2-18/+25
2015-05-19 Jiong. Wang <jiong.wang@arm.com> gas/ * config/tc-aarch64.c (process_movw_reloc_info): Sort relocation case labels alphabetically. (md_apply_fix): Ditto. (aarch64_force_relocation): Ditto.
2015-05-15Support AMD64/Intel ISAs in assembler/disassemblerH.J. Lu11-2/+100
AMD64 spec and Intel64 spec differ in direct unconditional branches in 64-bit mode. AMD64 supports direct unconditional branches with 16-bit offset via the data size prefix, which truncates RIP to 16 bits, while the data size prefix is ignored by Intel64. This patch adds -mamd64/-mintel64 option to x86-64 assembler and -Mamd64/-Mintel64 option to x86-64 disassembler. The most permissive ISA, which is AMD64, is the default. GDB can add an option, similar to (gdb) help set disassembly-flavor Set the disassembly flavor. The valid values are "att" and "intel", and the default value is "att". to select which ISA to disassemble. binutils/ PR binutis/18386 * doc/binutils.texi: Document -Mamd64 and -Mintel64. gas/ PR binutis/18386 * config/tc-i386.c (OPTION_MAMD64): New. (OPTION_MINTEL64): Likewise. (md_longopts): Add -mamd64 and -mintel64. (md_parse_option): Handle OPTION_MAMD64 and OPTION_MINTEL64. (md_show_usage): Add -mamd64 and -mintel64. * doc/c-i386.texi: Document -mamd64 and -mintel64. gas/testsuite/ PR binutis/18386 * gas/i386/i386.exp: Run x86-64-branch-2 and x86-64-branch-3. * gas/i386/x86-64-branch.d: Also pass -Mintel64 to objdump. * gas/i386/ilp32/x86-64-branch.d: Likewise. * gas/i386/x86-64-branch-2.d: New file. * gas/i386/x86-64-branch-2.s: Likewise. * gas/i386/x86-64-branch-3.l: Likewise. * gas/i386/x86-64-branch-3.s: Likewise. ld/testsuite/ PR binutis/18386 * ld-x86-64/tlsgdesc.dd: Also pass -Mintel64 to objdump. * ld-x86-64/tlspic.dd: Likewise. * ld-x86-64/x86-64.exp (x86_64tests): Also pass -Mintel64 to objdump for tlspic.dd and tlsgdesc.dd. opcodes/ PR binutis/18386 * i386-dis.c: Add comments for '@'. (x86_64_table): Use '@' on call/jmp for X86_64_E8/X86_64_E9. (enum x86_64_isa): New. (isa64): Likewise. (print_i386_disassembler_options): Add amd64 and intel64. (print_insn): Handle amd64 and intel64. (putop): Handle '@'. (OP_J): Don't ignore the operand size prefix for AMD64 in 64-bit. * i386-gen.c (cpu_flags): Add CpuAMD64 and CpuIntel64. * i386-opc.h (AMD64): New. (CpuIntel64): Likewise. (i386_cpu_flags): Add cpuamd64 and cpuintel64. * i386-opc.tbl: Add direct call/jmp with Disp16|Disp32 for AMD64. Mark direct call/jmp without Disp16|Disp32 as Intel64. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2015-05-15Add -mshared option to x86 ELF assemblerH.J. Lu11-28/+219
This patch adds -mshared option to x86 ELF assembler. By default, assembler will optimize out non-PLT relocations against defined non-weak global branch targets with default visibility. The -mshared option tells the assembler to generate code which may go into a shared library where all non-weak global branch targets with default visibility can be preempted. The resulting code is slightly bigger. This option only affects the handling of branch instructions. This Linux kernel patch is needed to create a working x86 Linux kernel if it hasn't been applied: diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index ae6588b..b91a00c 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -339,8 +339,8 @@ early_idt_handlers: i = i + 1 .endr -/* This is global to keep gas from relaxing the jumps */ -ENTRY(early_idt_handler) +/* This is weak to keep gas from relaxing the jumps */ +WEAK(early_idt_handler) cld cmpl $2,(%rsp) # X86_TRAP_NMI -- gas/ * config/tc-i386.c (shared): New. (OPTION_MSHARED): Likewise. (elf_symbol_resolved_in_segment_p): Add relocation argument. Check PLT relocations and shared. (md_estimate_size_before_relax): Pass fragP->fr_var to elf_symbol_resolved_in_segment_p. (md_longopts): Add -mshared. (md_show_usage): Likewise. (md_parse_option): Handle OPTION_MSHARED. * doc/c-i386.texi: Document -mshared. gas/testsuite/ * gas/i386/i386.exp: Don't run pcrel for ELF targets. Run pcrel-elf, relax-4 and x86-64-relax-3 for ELF targets. * gas/i386/pcrel-elf.d: New file. * gas/i386/relax-4.d: Likewise. * gas/i386/x86-64-relax-3.d: Likewise. * gas/i386/relax-3.d: Pass -mshared to assembler. Updated. * gas/i386/x86-64-relax-2.d: Likewise. * gas/i386/relax-3.s: Add test for PLT relocation.
2015-05-14Fix some PPC assembler errors.Peter Bergner7-9/+30
Remove the wait instructions for server processors, since they were never implemented. Also add the extra operands added to the tlbie and slbia instructions with ISA 2.06 and ISA 2.05 respectively. binutils/ * MAINTAINERS: Add myself as PPC maintainer. opcodes/ * ppc-opc.c (IH) New define. (powerpc_opcodes) <wait>: Do not enable for POWER7. <tlbie>: Add RS operand for POWER7. <slbia>: Add IH operand for POWER6. gas/testsuite/ * gas/ppc/power4.d: Add a slbia test. * gas/ppc/power4.s: Likewise. * gas/ppc/power6.d: Add slbia and tlbie tests. * gas/ppc/power6.s: Likewise. * gas/ppc/power7.d: Remove wait tests. Add a tlbie test. * gas/ppc/power7.s: Likewise.
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