Age | Commit message (Collapse) | Author | Files | Lines |
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2017-10-16 Sandra Loosemore <sandra@codesourcery.com>
Henry Wong <henry@stuffedcow.net>
gas/
* config/tc-nios2.c (nios2_translate_pseudo_insn): Check for
correct number of arguments.
(md_assemble): Handle failure of nios2_translate_pseudo_insn.
* testsuite/gas/nios2/illegal_pseudoinst.l: New file.
* testsuite/gas/nios2/illegal_pseudoinst.s: New file.
* testsuite/gas/nios2/nios2.exp: Add illegal_pseudoinst test.
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FT32B is a new FT32 family member. It has a code
compression scheme, which requires the use of linker
relaxations. The change is quite large, so submission
is in several parts.
Part 1 adds a 15-bit instruction field, and CPU-specific functions for
the code compression that are used in binutils and GDB.
bfd/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-ft32.c: Add HOWTO R_FT32_15.
* reloc.c: Add BFD_RELOC_FT32_15.
gas/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* config/tc-ft32.c (md_assemble): Replace FT32_FLD_K8 with
K15.
(md_apply_fix, tc_gen_reloc): Add BFD_RELOC_FT32_15.
include/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* elf/ft32.h: Add R_FT32_15.
* opcode/ft32.h: Replace FT32_FLD_K8 with K15.
(ft32_shortcode, sc_compar, ft32_split_shortcode,
ft32_merge_shortcode, ft32_merge_shortcode): New functions.
opcodes/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* opcodes/ft32-dis.c (print_insn_ft32): Replace FT32_FLD_K8 with K15.
* opcodes/ft32-opc.c (ft32_opc_info): Replace FT32_FLD_K8 with
K15. Add jmpix pattern.
sim/ChangeLog:
2017-10-12 James Bowman <james.bowman@ftdichip.com>
* sim/ft32/interp.c (step_once): Replace FT32_FLD_K8 with K15.
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unless high level source listing has been enabled.
PR 21977
* listing.c (listing_newline): Use the name of the current
physical input file, rather than the current logical input file,
unless including high level source in the listing.
* input-scrub.c (as_where_physical): New function. Returns the
name of the current physical input file.
* as.h: Add prototype for as_where_physical.
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prno, tpei, and irbm are missing in the optable.
gas/ChangeLog:
2017-10-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* testsuite/gas/s390/zarch-arch12.d (prno, tpei, irbm): New
instructions added.
* testsuite/gas/s390/zarch-arch12.s: Likewise.
* testsuite/gas/s390/zarch-z13.d: Rename ppno to prno.
opcodes/ChangeLog:
2017-10-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* s390-opc.txt (prno, tpei, irbm): New instructions added.
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gas/ChangeLog:
2017-10-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* testsuite/gas/all/fill-1.s: Replace nop with .word 42
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gas/ChangeLog:
2017-10-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* read.c (s_fill): Invoke expression instead of
get_known_segmented_expression.
* testsuite/gas/all/fill-1.s: New testcase.
* testsuite/gas/all/gas.exp: Run fill-1 testcase
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the end of operands.
PR 22133
* config/tc-msp430.c (parse_exp): Skip an 'h' suffix to constant
expressions.
(msp430_srcoperand): Check that the entire text was parsed by
parse_exp.
(msp430_operands): Likewise.
* testsuite/gas/msp430/pr22133.s: New test file.
* testsuite/gas/msp430/pr22133.d: New test driver.
* testsuite/gas/msp430/pr22133.s: Expected error output.
* testsuite/gas/msp430/msp430.exp: Run the new test.
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PR gas/21167
* testsuite/gas/elf/elf.exp: Run group3.
* testsuite/gas/elf/group3.d: New file.
* testsuite/gas/elf/group3.s: Likewise.
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This fixes a wart I've known about for years, but haven't done
anything about because BFD treats relocation sections as an adjunct to
the section they relocate. SHF_GROUP on the section thus implicitly
applies to its relocation section(s), but it is an error that the
reloc sections aren't part of the group.
Like many patches to gas, this wasn't as straightforward as it could
be due to a number of backends, i386, cr16 and others, removing relocs
in tc_get_reloc rather than marking them as "done" earlier in
md_apply_reloc. So it isn't possible for the group support to
reliably detect the presence of relocs by looking at fixups earlier
than write_relocs. However the group support needs to create
signature symbols, and that must be done before the symbol table is
frozen, before write_relocs. So split off the group sizing from
elf_adjust_symtab and put it in elf_frob_file_after_relocs.
bfd/
PR 21167
* elf.c (_bfd_elf_setup_sections): Don't trim reloc sections from
groups.
(_bfd_elf_init_reloc_shdr): Pass sec_hdr, use it to copy SHF_GROUP
flag from section.
(elf_fake_sections): Adjust calls. Exit immediately on failure.
(bfd_elf_set_group_contents): Add associated reloc section indices
to group contents
gas/
PR 21167
* config/obj-elf.c (struct group_list): Delete elt_count.
(groups): New static.
(build_group_lists): Don't count elements.
(elf_adjust_symtab): Use groups rather than auto list. Set up
pointer from group member to SHT_GROUP section. Don't size
SHT_GROUP section or clean up here..
(elf_frob_file_after_relocs): ..do so here instead.
* testsuite/gas/arc/jli-1.d,
* testsuite/gas/elf/groupautob.d,
* testsuite/gas/mips/compact-eh-eb-2.d,
* testsuite/gas/mips/compact-eh-eb-5.d,
* testsuite/gas/mips/compact-eh-el-2.d,
* testsuite/gas/mips/compact-eh-el-5.d: Adjust.
ld/
PR 21167
* testsuite/ld-elf/group9b.d: Adjust for relocs included in group.
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opcodes/
* ppc-opc.c (vle_opcodes): Add e_lmvsprw, e_lmvgprw,
e_lmvsrrw, e_lmvcsrrw and e_lmvcsrrw as official mnemonics for
VLE multimple load/store instructions. Old e_ldm* variants are
kept as aliases.
Add missing e_lmvmcsrrw and e_stmvmcsrrw.
gas/
* testsuite/gas/ppc/vle-mult-ld-st-insns.s: New file: Tests the
support for the VLE multiple load/store instructions.
* testsuite/gas/ppc/vle-mult-ld-st-insns.d: New file: Test
driver.
* testsuite/gas/ppc/ppc.exp: Run it.
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instructions, vis: fmv.x.w and fmv.w.x.
PR 22179
opcodes * riscv-opc.c (riscv_opcodes): Add fmv.x.w and fmv.w.x as the new
names for the fmv.x.s and fmv.s.x instructions respectively.
gas * testsuite/gas/riscv/fmv.x.s: New file: Tests the support for the
renamed fmv.x.s and fmv.s.x instructions.
* testsuite/gas/riscv/fmv.x.d: New file: Test driver.
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Fix commit e407c74b5b60 ("Support for MIPS R5900 (Sony Playstation 2)"),
<https://sourceware.org/ml/binutils/2012-12/msg00240.html>, and add the
handling of E_MIPS_MACH_5900, correctly showing `5900' among `Flags:' in
the output of `-h' rather than `unknown CPU'.
binutils/
* readelf.c (get_machine_flags) <E_MIPS_MACH_5900>: New case.
gas/
* testsuite/gas/mips/elf_mach_5900.d: New test.
* testsuite/gas/mips/mips.exp: Run it.
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If a .stabs directive was used before another .set directive in a MIPS
source file, s_mips_stab would call mips_mark_labels without having
initialized the mips_opts structure yet. Fix this by calling
file_mips_check_options which will initialize mips_opts if necessary.
gas/
PR gas/21762
* config/tc-mips.c (s_mips_stab): Insert call to
file_mips_check_options.
* testsuite/gas/mips/micromips@stabs-symbol-type.d: New test.
* testsuite/gas/mips/mips.exp: Run the new tests.
* testsuite/gas/mips/mips16@stabs-symbol-type.d: New test.
* testsuite/gas/mips/stabs-symbol-type.d: New test.
* testsuite/gas/mips/stabs-symbol-type.s: New test source.
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PowerPC64 .cfi directives use DW_EH_PE_sdata4 encoding for .eh_frame,
so there is no real reason why .eh_frame should be 8 byte aligned.
gas/
* config/tc-ppc.h (EH_FRAME_ALIGNMENT): Define.
ld/
* testsuite/ld-powerpc/tlsopt5.wf: Update for reduced alignment.
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"sec" gets set to NULL on errors in the offset expression. This patch
disables part of the reloc expression processing that needs "sec"
valid. I didn't disable the entire reloc expression handling so that
errors in the reloc expression are reported even when the offset
expression has an error.
PR 22127
* write.c (resolve_reloc_expr_symbols): Don't segfault when
sec has been set to NULL.
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Since the NOTRACK prefix is no longer required to be the last prefix
before the REX prefix, restriction on the NOTRACK prefix position is
removed from assembler as well as disassembler. Assembler encodes the
NOTRACK prefix the same way as the DS segment register, which places
it before other prefixes. Disassembler displays prefixes in the order
they appear.
gas/
* config/tc-i386.c (NOTRACK_PREFIX): Removed.
(REX_PREFIX): Updated.
(MAX_PREFIXES): Likewise.
(parse_insn): Remove restriction on NOTRACK prefix position.
* testsuite/gas/i386/notrack.s: Add tests with NOTRACK prefix
before other prefixes.
* testsuite/gas/i386/x86-64-notrack.s: Likewise.
* testsuite/gas/i386/notrackbad.s: Remove tests with NOTRACK
prefix before other prefixes.
* testsuite/gas/i386/x86-64-notrackbad.s: Likewise.
* testsuite/gas/i386/notrack-intel.d: Updated.
* testsuite/gas/i386/notrack.d: Likewise.
* testsuite/gas/i386/notrackbad.l: Likewise.
* testsuite/gas/i386/x86-64-notrack-intel.d: Likewise.
* testsuite/gas/i386/x86-64-notrack.d: Likewise.
* testsuite/gas/i386/x86-64-notrackbad.l: Likewise.
opcodes/
* i386-dis.c (last_active_prefix): Removed.
(ckprefix): Don't set last_active_prefix.
(NOTRACK_Fixup): Don't check last_active_prefix.
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When linking the following code
.global _prog_start
_prog_start:
mv x1, x1
mv x2, x2
.align 2
rvc_boundry:
.option norvc
.align 3
mv x3, x3
we currently emit an invalid two-byte 0 instruction. The actual output
code looks like
0000000080000000 <_prog_start>:
80000000: 8086 mv ra,ra
80000002: 810a mv sp,sp
0000000080000004 <rvc_boundry>:
80000004: 0000 unimp
80000006: 0001 nop
80000008: 00018193 mv gp,gp
This ends up manifesting due to the two-byte compressed NOP that's
pessimisticly emitted by the ".align 2", which results in "rvc_boundry"
being 2-byte aligned. frag_align_code() then goes and outputs a 2-byte
NOP (which is invalid in no-RVC mode) to align the code back to a 4-byte
boundry, which can't be relaxed away by the linker as it's not part of
the R_RISCV_RELAX relocation.
The fix is to just always emit the worst case possible alignment into
the output as a single R_RISCV_RELAX, which the linker will then fix up.
With this patch I get the expected code generation
0000000080000000 <_prog_start>:
80000000: 8086 mv ra,ra
80000002: 810a mv sp,sp
0000000080000004 <rvc_boundry>:
80000004: 00000013 nop
80000008: 00018193 mv gp,gp
gas/ChangeLog
2017-09-07 Palmer Dabbelt <palmer@dabbelt.com>
* config/tc-riscv.c (riscv_frag_align_code): Emit the entire
alignment sequence inside R_RISCV_ALIGN.
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include/
* elf/ppc.h (R_PPC_VLE_ADDR20): New relocation.
bfd/
* elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_VLE_ADDR20.
(ppc_elf_check_relocs): Handle it.
(ppc_elf_vle_split20): New function.
(ppc_elf_relocate_section): Handle R_PPC_VLE_ADDR20.
binutils/
* readelf.c (get_elf_section_flags): Add VLE.
(process_section_headers): Add VLE key to details.
gas/
* config/tc-ppc.c (md_parse_option): Handle "mno-vle" flag.
(ppc_elf_section_letter): New function.
* config/tc-ppc.h (md_elf_section_letter): New.
* testsuite/gas/elf/section10.d: Adjust for VLE.
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A75 cpus.
* config/tc-aarch64.c (aarch64_cpus): Enable DOTPROD for
cortex-a55 and cortx-a75.
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Fix a bug in commit a6ebf6169a1b ("MIPS: Convert cross-mode BAL to
JALX") and in BFD linker relaxation correct the microMIPS interpretation
of the branch offset, which is supposed to be shifted by 1 bit, rather
than 2 as in the regular MIPS case.
bfd/
* elfxx-mips.c (mips_elf_perform_relocation): Correct microMIPS
branch offset interpretation.
gas/
* testsuite/gas/mips/branch-addend-micromips.d: New test.
* testsuite/gas/mips/branch-addend-micromips-n32.d: New test.
* testsuite/gas/mips/branch-addend-micromips-n64.d: New test.
* testsuite/gas/mips/branch-addend-micromips.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
ld/
* testsuite/ld-mips-elf/bal-jalx-addend-micromips.d: New test.
* testsuite/ld-mips-elf/bal-jalx-addend-micromips-n32.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-addend-micromips-n64.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-local-micromips.d: New test.
* testsuite/ld-mips-elf/bal-jalx-local-micromips-n32.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-local-micromips-n64.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-pic-micromips.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-micromips-n32.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-micromips-n64.d: New test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips-n32.d: New
test.
* testsuite/ld-mips-elf/bal-jalx-pic-ignore-micromips-n64.d: New
test.
* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
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Fix a bug in commit 8b10b0b3e100 ("MIPS: Add options to control branch
ISA checks") and with the `-mignore-branch-isa' command-line option also
lift a GAS check for invalid MIPS16 branches between ISA modes, which is
made separately from regular MIPS and microMIPS checks.
gas/
* config/tc-mips.c (md_convert_frag): Respect
`mips_ignore_branch_isa'.
* testsuite/gas/mips/branch-local-5.d: New test.
* testsuite/gas/mips/branch-local-n32-5.d: New test.
* testsuite/gas/mips/branch-local-n64-5.d: New test.
* testsuite/gas/mips/branch-local-6.d: New test.
* testsuite/gas/mips/branch-local-n32-6.d: New test.
* testsuite/gas/mips/branch-local-n64-6.d: New test.
* testsuite/gas/mips/branch-local-7.d: New test.
* testsuite/gas/mips/branch-local-n32-7.d: New test.
* testsuite/gas/mips/branch-local-n64-7.d: New test.
* testsuite/gas/mips/branch-local-ignore-5.d: New test.
* testsuite/gas/mips/branch-local-ignore-n32-5.d: New test.
* testsuite/gas/mips/branch-local-ignore-n64-5.d: New test.
* testsuite/gas/mips/branch-local-ignore-6.d: New test.
* testsuite/gas/mips/branch-local-ignore-n32-6.d: New test.
* testsuite/gas/mips/branch-local-ignore-n64-6.d: New test.
* testsuite/gas/mips/branch-local-5.l: New stderr output.
* testsuite/gas/mips/branch-local-6.l: New stderr output.
* testsuite/gas/mips/branch-local-5.s: New test source.
* testsuite/gas/mips/branch-local-6.s: New test source.
* testsuite/gas/mips/branch-local-7.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
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Complement commit 7795a8f8bdde ("MIPS/GAS/testsuite: Convert branch
local list tests to dump tests") and share identical error lists among
branch local tests, removing duplicate copies.
gas/
* testsuite/gas/mips/branch-local-n32-2.d: Use `branch-local-2.l'
for `error-output'.
* testsuite/gas/mips/branch-local-n64-2.d: Likewise.
* testsuite/gas/mips/branch-local-n32-3.d: Use `branch-local-3.l'
for `error-output'.
* testsuite/gas/mips/branch-local-n64-3.d: Likewise.
* testsuite/gas/mips/branch-local-n32-2.l: Remove file.
* testsuite/gas/mips/branch-local-n64-2.l: Remove file.
* testsuite/gas/mips/branch-local-n32-3.l: Remove file.
* testsuite/gas/mips/branch-local-n64-3.l: Remove file.
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ld * emultempl/msp430.em (change_output_section): New function.
(move_prefixed_section): New function.
(add_region_prefix): New function.
(msp430_elf_after_open): New function.
(gld${EMULATION_NAME}_add_options): Implement.
(gld${EMULATION_NAME}_list_options): Implement.
(gld${EMULATION_NAME}_handle_option): Implement.
* ld.texinfo: Document new options.
* testsuite/ld-msp430-elf/main-bss-lower.d: New.
* testsuite/ld-msp430-elf/main-bss-upper.d: New.
* testsuite/ld-msp430-elf/main-const-lower.d: New.
* testsuite/ld-msp430-elf/main-const-upper.d: New.
* testsuite/ld-msp430-elf/main-text-lower.d: New.
* testsuite/ld-msp430-elf/main-text-upper.d: New.
* testsuite/ld-msp430-elf/main-var-lower.d: New.
* testsuite/ld-msp430-elf/main-var-upper.d: New.
* testsuite/ld-msp430-elf/main-with-data-bss-unique-sec.s: New.
* testsuite/ld-msp430-elf/main-with-data-bss.s: New.
* testsuite/ld-msp430-elf/main-with-text-rodata-unique-sec.s: New.
* testsuite/ld-msp430-elf/main-with-text-rodata.s: New.
* testsuite/ld-msp430-elf/msp430-elf.exp: New.
* testsuite/ld-msp430-elf/msp430-no-lower.ld: New.
* testsuite/ld-msp430-elf/msp430.ld: New.
* emultempl/msp430.em (data_statement_size): New.
(eval_upper_either_sections): New.
(eval_lower_either_sections): New.
(intermediate_relax_sections): New.
(msp430_elf_after_allocation): New.
* emultempl/msp430.em (gld${EMULATION_NAME}_place_orphan): Always
place sections in the lower region.
gas * config/tc-msp430.c (md_parse_option): Define high data and high
bss symbols if -mdata-region is passed.
Define -mdata-region open.
* doc/c-msp430.texi: Document -mdata-region.
* testsuite/gas/msp430/high-data-bss-sym.d: New test.
* testsuite/gas/msp430/high-data-bss-sym.s: New.
* testsuite/gas/msp430/msp430.exp: Add -mdata-region tests.
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include/
* opcode/ppc.h:
(spe2_opcodes, spe2_num_opcodes): New.
(PPC_OPCODE_SPE2): New define.
(PPC_OPCODE_EFS2): Likewise.
(SPE2_XOP): Likewise.
(SPE2_XOP_TO_SEG): Likewise.
opcodes/
* ppc-dis.c (ppc_mopt): Add PPC_OPCODE_SPE2 and
PPC_OPCODE_EFS2 flag to "e200z4" entry.
New entries efs2 and spe2.
Add PPC_OPCODE_SPE2 and PPC_OPCODE_EFS2 flag to "vle" entry.
(SPE2_OPCD_SEGS): New macro.
(spe2_opcd_indices): New.
(disassemble_init_powerpc): Handle SPE2 opcodes.
(lookup_spe2): New function.
(print_insn_powerpc): call lookup_spe2.
* ppc-opc.c (insert_evuimm1_ex0): New function.
(extract_evuimm1_ex0): Likewise.
(insert_evuimm_lt8): Likewise.
(extract_evuimm_lt8): Likewise.
(insert_off_spe2): Likewise.
(extract_off_spe2): Likewise.
(insert_Ddd): Likewise.
(extract_Ddd): Likewise.
(DD): New operand.
(EVUIMM_LT8): Likewise.
(EVUIMM_LT16): Adjust.
(MMMM): New operand.
(EVUIMM_1): Likewise.
(EVUIMM_1_EX0): Likewise.
(EVUIMM_2): Adjust.
(NNN): New operand.
(VX_OFF_SPE2): Likewise.
(BBB): Likewise.
(DDD): Likewise.
(VX_MASK_DDD): New mask.
(HH): New operand.
(VX_RA_CONST): New macro.
(VX_RA_CONST_MASK): Likewise.
(VX_RB_CONST): Likewise.
(VX_RB_CONST_MASK): Likewise.
(VX_OFF_SPE2_MASK): Likewise.
(VX_SPE_CRFD): Likewise.
(VX_SPE_CRFD_MASK VX): Likewise.
(VX_SPE2_CLR): Likewise.
(VX_SPE2_CLR_MASK): Likewise.
(VX_SPE2_SPLATB): Likewise.
(VX_SPE2_SPLATB_MASK): Likewise.
(VX_SPE2_OCTET): Likewise.
(VX_SPE2_OCTET_MASK): Likewise.
(VX_SPE2_DDHH): Likewise.
(VX_SPE2_DDHH_MASK): Likewise.
(VX_SPE2_HH): Likewise.
(VX_SPE2_HH_MASK): Likewise.
(VX_SPE2_EVMAR): Likewise.
(VX_SPE2_EVMAR_MASK): Likewise.
(PPCSPE2): Likewise.
(PPCEFS2): Likewise.
(vle_opcodes): Add EFS2 and some missing SPE opcodes.
(powerpc_macros): Map old SPE instructions have new names
with the same opcodes. Add SPE2 instructions which just are
mapped to SPE2.
(spe2_opcodes): Add SPE2 opcodes.
gas/
* config/tc-ppc.c:
(md_parse_option): Add mspe2 switch.
(md_show_usage): Document -mspe2.
(ppc_setup_opcodes): Handle spe2_opcodes.
* doc/as.texinfo: Document -mspe2.
* doc/c-ppc.texi: Likewise.
* testsuite/gas/ppc/efs.d: New file.
* testsuite/gas/ppc/efs.s: Likewise.
* testsuite/gas/ppc/efs2.d: Likewise.
* testsuite/gas/ppc/efs2.s: Likewise.
* testsuite/gas/ppc/ppc.exp: Run new tests.
* testsuite/gas/ppc/spe.d: New file.
* testsuite/gas/ppc/spe.s: Likewise.
* testsuite/gas/ppc/spe2-checks.d: Likewise.
* testsuite/gas/ppc/spe2-checks.l: Likewise.
* testsuite/gas/ppc/spe2-checks.s: Likewise.
* testsuite/gas/ppc/spe2.d: Likewise.
* testsuite/gas/ppc/spe2.s: Likewise.
* testsuite/gas/ppc/spe_ambiguous.d: Likewise.
* testsuite/gas/ppc/spe_ambiguous.s: Likewise.
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gas/
* config/tc-sparc.c (tc_gen_reloc): Convert BFD_RELOC_8/16/32/64
into the corresponding BFD_RELOC_8/16/32/64_PCREL relocation
when requested.
* config/tc-sparc.h (DIFF_EXPR_OK): Define to enable PC-relative
diff relocations.
(TC_FORCE_RELOCATION_SUB_LOCAL): Define to ensure only supported
relocations are made PC-relative.
(CFI_DIFF_EXPR_OK): Define to 0 to force BFD_RELOC_32_PCREL to
be used directly, since otherwise BFD_RELOC_SPARC_UA32 will be
used for .eh_frame which cannot in general be converted to a
BFD_RELOC_32_PCREL due to alignment requirements.
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|
-mvle isn't a valid 64-bit option.
* testsuite/gas/ppc/lsp-checks.d: Assemble with -a32.
* testsuite/gas/ppc/lsp.d: Likewise.
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include/
* opcode/ppc.h (PPC_OPCODE_LSP): New define.
opcodes/
* ppc-opc.c (insert_evuimm2_ex0): New function.
(extract_evuimm2_ex0): Likewise.
(insert_evuimm4_ex0): Likewise.
(extract_evuimm4_ex0): Likewise.
(insert_evuimm8_ex0): Likewise.
(extract_evuimm8_ex0): Likewise.
(insert_evuimm_lt16): Likewise.
(extract_evuimm_lt16): Likewise.
(insert_rD_rS_even): Likewise.
(extract_rD_rS_even): Likewise.
(insert_off_lsp): Likewise.
(extract_off_lsp): Likewise.
(RD_EVEN): New operand.
(RS_EVEN): Likewise.
(RSQ): Adjust.
(EVUIMM_LT16): New operand.
(HTM_SI): Adjust.
(EVUIMM_2_EX0): New operand.
(EVUIMM_4): Adjust.
(EVUIMM_4_EX0): New operand.
(EVUIMM_8): Adjust.
(EVUIMM_8_EX0): New operand.
(WS): Adjust.
(VX_OFF): New operand.
(VX_LSP): New macro.
(VX_LSP_MASK): Likewise.
(VX_LSP_OFF_MASK): Likewise.
(PPC_OPCODE_LSP): Likewise.
(vle_opcodes): Add LSP opcodes.
* ppc-dis.c (ppc_mopt): Add PPC_OPCODE_LSP flag to "vle" entry.
gas/
* testsuite/gas/ppc/lsp-checks.d,
* testsuite/gas/ppc/lsp-checks.l,
* testsuite/gas/ppc/lsp-checks.s: New test.
* testsuite/gas/ppc/lsp.d,
* testsuite/gas/ppc/lsp.s: New test.
* testsuite/gas/ppc/ppc.exp: Run new tests.
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|
We got a report from the linux-arm-kernel folks about getting spurious
warnings when building the kernel with binutils 2.29. See
https://www.spinics.net/lists/arm-kernel/msg599929.html
which boils down to this testcase.
$> cat /tmp/tst.s
lr .req x30
/tmp/tst.s: Assembler messages:
/tmp/tst.s:1: Warning: ignoring attempt to redefine built-in register 'lr'
Instead let's treat this as a proper alias at startup time thus
avoiding the problem and treating these as proper aliases
rather than new registers. This means that attempts to redefine
the alias with the same "name" will provoke no warning and attempts
to redefine the alias to something else will provoke the above mentioned
warning.
Tested make check-gas and no regressions.
Ok to apply to trunk (and backport to 2.29 branch)?
Regards
Ramana
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We can't create alias of common symbol. Local alias of common symbol has
been disallowed. But global alias of common symbol is disallowed when the
common symbol is seen first and silently dropped otherwise. This patch
disallows alias of common symbol in all cases.
gas/
PR gas/21667
* read.c (pseudo_set): Update error message for alias of common
symbol.
* write.c (write_object_file): Disallow both local and global
aliases of common symbol.
* testsuite/gas/elf/common5a.d: New file.
* testsuite/gas/elf/common5a.l: Likewise.
* testsuite/gas/elf/common5a.s: Likewise.
* testsuite/gas/elf/common5b.d: Likewise.
* testsuite/gas/elf/common5b.l: Likewise.
* testsuite/gas/elf/common5b.s: Likewise.
* testsuite/gas/elf/common5c.d: Likewise.
* testsuite/gas/elf/common5c.s: Likewise.
* testsuite/gas/elf/common5d.d: Likewise.
* testsuite/gas/elf/common5d.s: Likewise.
* testsuite/gas/elf/elf.exp: Run common5a, common5b, common5c
and common5d.
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|
PR gas/21939
* config/obj-macho.c (obj_mach_o_set_indirect_symbols): Increase
size of indirect_syms array so that it is large enough to hold
every symbol if necessary.
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According to ARMv8-A architecture manual, REG_SP is allowed in CRC32
instructions in Thumb mode. It is REG_PC that will cause unpredictable
behaviours on both ARM and Thumb.
This patch removes the incorrect warning on Thumb mode.
Meanwhile the disassembler is updated to use format "<bitfield>R" instead of
"<bitfield>S". "<bitfield>S" is not used elsewhere. so I have deleted related
code from the disassembler.
gas/
* config/tc-arm.c (do_crc32_1): Remove warning on REG_SP for thumb_mode.
* testsuite/gas/arm/crc32-armv8-a-bad.d: Update exepcted result.
* testsuite/gas/arm/crc32-armv8-r-bad.d: Likewise.
* testsuite/gas/arm/crc32-armv8-a.d: Likewise.
* testsuite/gas/arm/crc32-armv8-r.d: Likewise.
* testsuite/gas/arm/crc32-armv8-ar-bad.s: Update test case.
* testsuite/gas/arm/crc32-armv8-ar.s: Likewise.
* testsuite/gas/arm/crc32-bad.l: Update expected error message.
opcode/
* arm-dis.c (thumb32_opcodes): Use format 'R' instead of 'S' for
register operands in CRC instructions.
(print_insn_thumb32): Remove "<bitfield>S" support. Updated the
comments.
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|
gas * testsuite/gas/all/gas.exp: Add am33 to the skip lists of tests
passed over by the mn10300 target.
* testsuite/gas/elf/elf.exp: Likewise.
* testsuite/gas/elf/dwarf2-11.d: Correct skip of am33 target.
* testsuite/gas/elf/dwarf2-12.d: Likewise.
* testsuite/gas/elf/dwarf2-13.d: Likewise.
* testsuite/gas/elf/dwarf2-14.d: Likewise.
* testsuite/gas/elf/dwarf2-15.d: Likewise.
* testsuite/gas/elf/dwarf2-16.d: Likewise.
* testsuite/gas/elf/dwarf2-17.d: Likewise.
* testsuite/gas/elf/dwarf2-18.d: Likewise.
* testsuite/gas/elf/dwarf2-5.d: Likewise.
* testsuite/gas/elf/dwarf2-6.d: Likewise.
* testsuite/gas/elf/dwarf2-7.d: Likewise.
binutils * testsuite/binutils-all/objdump.exp (cpus_expected): Add am33-2.
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|
https://sourceware.org/ml/binutils/2009-04/msg00223.html
introduced a new Intel syntax parser which accepts
mov eax, fs:gs:[eax]
It ignores anything between ':'s after fs and treats
mov eax, DWORD PTR fs:foobar:16
mov eax, DWORD PTR fs:foobar:barfoo:16
mov eax, DWORD PTR fs:ds:16
mov eax, DWORD PTR fs:ds:cs:16
as
mov eax, DWORD PTR fs:16
This patch updates segment register check and only allows a single ':'.
PR gas/21874
* config/tc-i386-intel.c (i386_intel_operand): Update segment
register check.
* testsuite/gas/i386/intelok.s: Replace "fs:gs:[eax]" with
"fs:[eax]".
* testsuite/gas/i386/inval-seg.s: Add tests for invalid segment
register.
* testsuite/gas/i386/x86-64-inval-seg.s: Likewise.
* testsuite/gas/i386/inval-seg.l: Updated.
* testsuite/gas/i386/x86-64-inval-seg.l: Likewise.
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|
|
|
* config/tc-riscv.c (riscv_set_arch): Handle the Q subset like
all other subsets.
Obviate use-after-free.
|
|
PR 21739
opcodes * arc-opc.c (insert_rhv2): Use lower case first letter in error
message.
(insert_r0): Likewise.
(insert_r1): Likewise.
(insert_r2): Likewise.
(insert_r3): Likewise.
(insert_sp): Likewise.
(insert_gp): Likewise.
(insert_pcl): Likewise.
(insert_blink): Likewise.
(insert_ilink1): Likewise.
(insert_ilink2): Likewise.
(insert_ras): Likewise.
(insert_rbs): Likewise.
(insert_rcs): Likewise.
(insert_simm3s): Likewise.
(insert_rrange): Likewise.
(insert_r13el): Likewise.
(insert_fpel): Likewise.
(insert_blinkel): Likewise.
(insert_pclel): Likewise.
(insert_nps_bitop_size_2b): Likewise.
(insert_nps_imm_offset): Likewise.
(insert_nps_imm_entry): Likewise.
(insert_nps_size_16bit): Likewise.
(insert_nps_##NAME##_pos): Likewise.
(insert_nps_##NAME): Likewise.
(insert_nps_bitop_ins_ext): Likewise.
(insert_nps_##NAME): Likewise.
(insert_nps_min_hofs): Likewise.
(insert_nps_##NAME): Likewise.
(insert_nps_rbdouble_64): Likewise.
(insert_nps_misc_imm_offset): Likewise.
* riscv-dis.c (print_riscv_disassembler_options): Fix typo in
option description.
gas * testsuite/gas/arc/add_s-err.s: Update expected error message.
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|
AArch64 binaries.
PR 21809
* config/tc-aarch64.c (aarch64_init_frag): Do not set a mapping
state for frags in debug sections.
* config/tc-arm.c (arm_init_frag): Likewise.
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|
Trying to build (for mmix-knuth-mmixware but I don't think that
matters) yields the following (repeatable on e.g. CompileFarm gcc20
sporting gcc-4.7.2 as default):
gcc -DHAVE_CONFIG_H -I. -I/home/hp/binutils/src/gas -I. -I/home/hp/binutils/src/gas -I../bfd -I/home/hp/binutils/src/gas/config -I/home/hp/binutils/src/gas/../include -I/home/hp/binutils/src/gas/.. -I/home/hp/binutils/src/gas/../bfd -DLOCALEDIR="\"/usr/local/share/locale\"" -W -Wall -Wstrict-prototypes -Wmissing-prototypes -Wshadow -Werror -Wwrite-strings -I/home/hp/binutils/src/gas/../zlib -g -O2 -MT dwarf2dbg.o -MD -MP -MF .deps/dwarf2dbg.Tpo -c -o dwarf2dbg.o /home/hp/binutils/src/gas/dwarf2dbg.c
cc1: warnings being treated as errors
/home/hp/binutils/src/gas/dwarf2dbg.c: In function 'dwarf2dbg_final_check':
/home/hp/binutils/src/gas/dwarf2dbg.c:2246: error: declaration of 'expr' shadows a global declaration
/home/hp/binutils/src/gas/expr.h:180: error: shadowed declaration is here
make[4]: *** [dwarf2dbg.o] Error 1
IIRC this is a false namespace clash and the warning is not observable
with a new-enough gcc. Committed as obvious.
brgds, H-P
PS. Idea: -Wcompiler; warn about constructs problematic with e.g. old gcc. 1/2 ;-)
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|
that the compiler can use the assembler to generate line number information and have the assembler determine view numbers to multiple views at the same program counter.
binutils* dwarf.c (struct State_Machine_Registers): Add view field.
(reset_state_machine): Reset view.
(process_extended_line_op): Reset view when appropriate.
(display_debug_lines_raw): Increment or reset view when appropriate.
Print nonzero views. Support print view resets, disabled by default.
(display_debug_lines_decoded): Likewise. Disambiguate op_code tests,
enabling printing of end_sequence.
* testsuite/binutils-all/dw2-1.W: Add nonzero views.
* testsuite/binutils-all/dw2-3.W: Likewise.
* testsuite/binutils-all/dw2-3gabi.W: Likewise.
* testsuite/binutils-all/dw5.W: Add end sequence lines.
* testsuite/binutils-all/i386/compressed-1a.d: Add nonzero views.
* testsuite/binutils-all/libdw2-compressedgabi.out: Likewise.
* testsuite/binutils-all/objdump.W: Likewise.
* testsuite/binutils-all/objdump.WL: Add end sequence lines.
* testsuite/binutils-all/x86-64/compressed-1a.d: Add nonzero views.
gas * doc/as.texinfo (.loc): Document view support.
* dwarf2dbg.c (unused): Check offset of next in struct line_entry.
(current): Initialize view.
(force_reset_view, view_assert_failed): New variables.
(reverse_line_entry_list): New function.
(set_or_check_view): Likewise.
(dwarf2_gen_line_info_1): Call it.
(dwarf2_where): Set view to NULL.
(dwarf2_emit_insn): Return early when called before first file.
(dwarf2_directive_loc): Add view support. Emit insn
immediately when view option is given.
(process_entries): Avoid set_address to reset view when a known
address change already implies the view reset.
(dwarf2dbg_final_check): New function.
* dwarf2dbg.h (struct dwarf2_line_info): Add view.
(dwarf2dbg_final_check): Declare.
* read.c (s_leb128): Parse expression as deferred.
* testsuite/gas/all/gas.exp: Run sleb128-9.
* testsuite/gas/all/sleb128-9.d: New.
* testsuite/gas/all/sleb128-9.l: New.
* testsuite/gas/all/sleb128-9.s: New.
* testsuite/gas/elf/dwarf2-1.d: Add nonzero views.
* testsuite/gas/elf/dwarf2-2.d: Likewise.
* testsuite/gas/elf/dwarf2-5.d: New.
* testsuite/gas/elf/dwarf2-5.s: New.
* testsuite/gas/elf/dwarf2-6.d: New.
* testsuite/gas/elf/dwarf2-6.s: New.
* testsuite/gas/elf/dwarf2-7.d: New.
* testsuite/gas/elf/dwarf2-7.s: New.
* testsuite/gas/elf/dwarf2-8.d: New.
* testsuite/gas/elf/dwarf2-8.l: New.
* testsuite/gas/elf/dwarf2-8.s: New.
* testsuite/gas/elf/dwarf2-9.d: New.
* testsuite/gas/elf/dwarf2-9.l: New.
* testsuite/gas/elf/dwarf2-9.s: New.
* testsuite/gas/elf/dwarf2-10.d: New.
* testsuite/gas/elf/dwarf2-10.l: New.
* testsuite/gas/elf/dwarf2-10.s: New.
* testsuite/gas/elf/dwarf2-11.d: New.
* testsuite/gas/elf/dwarf2-11.s: New.
* testsuite/gas/elf/dwarf2-12.d: New.
* testsuite/gas/elf/dwarf2-12.s: New.
* testsuite/gas/elf/dwarf2-13.d: New.
* testsuite/gas/elf/dwarf2-13.s: New.
* testsuite/gas/elf/dwarf2-14.d: New.
* testsuite/gas/elf/dwarf2-14.s: New.
* testsuite/gas/elf/dwarf2-15.d: New.
* testsuite/gas/elf/dwarf2-15.s: New.
* testsuite/gas/elf/dwarf2-16.d: New.
* testsuite/gas/elf/dwarf2-16.s: New.
* testsuite/gas/elf/dwarf2-17.d: New.
* testsuite/gas/elf/dwarf2-17.s: New.
* testsuite/gas/elf/dwarf2-18.d: New.
* testsuite/gas/elf/dwarf2-18.s: New.
* testsuite/gas/elf/elf.exp: Run dwarf2-5..18 tests.
* testsuite/gas/i386/dw2-compress-1.d: Add nonzero views.
* testsuite/gas/i386/dw2-compressed-1.d: Likewise.
* testsuite/gas/i386/ilp32/lns/lns-duplicate.d: Likewise.
* testsuite/gas/lns/lns-big-delta.d: Likewise.
* testsuite/gas/lns/lns-duplicate.d: Likewise.
* testsuite/gas/mips/loc-swap-2.d: Likewise.
* testsuite/gas/mips/loc-swap-3.d: Likewise.
* testsuite/gas/mips/loc-swap.d: Likewise.
* testsuite/gas/mips/micromips@loc-swap-2.d: Likewise.
* testsuite/gas/mips/micromips@loc-swap.d: Likewise.
* testsuite/gas/mips/mips16@loc-swap-2.d: Likewise.
* testsuite/gas/mips/mips16@loc-swap.d: Likewise.
* testsuite/gas/mips/mips16e@loc-swap.d: Likewise.
* write.c (write_object_file): Check pending view asserts.
(cvt_frag_to_fill): Complain about undefined leb128 operand.
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|
With IBM z14 officially announced I can add z14 as CPU name.
No regressions with that patch on s390x.
gas/ChangeLog:
2017-07-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/tc-s390.c (s390_parse_cpu): Add z14 as alternate CPU
name.
* doc/as.texinfo: Add z14 to CPU string list.
* doc/c-s390.texi: Likewise.
opcodes/ChangeLog:
2017-07-21 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* s390-mkopc.c (main): Enable z14 as CPU string in the opcode
table.
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|
The following relocation types were added to GCC/binutils:
ARC_JLI_SECTOFF is a relocation type in Metaware that is now used by
GCC as well to adjust the index of function calls to functions with
attribute jli_call_always.
bfd/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
John Eric Martin <John.Martin@emmicro-us.com>
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-arc.c (JLI): Define.
* reloc.c: Add JLI relocations.
gas/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/jli-1.d: New file.
* testsuite/gas/arc/jli-1.s: Likewise.
* testsuite/gas/arc/taux.d: Update for jli_base.
include/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
John Eric Martin <John.Martin@emmicro-us.com>
* elf/arc-reloc.def: Add JLI relocs howto.
* opcode/arc-func.h (replace_jli): New function.
ld/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
John Eric Martin <John.Martin@emmicro-us.com>
* emulparams/arcelf.sh (JLI_START_TABLE): Define.
* scripttempl/elfarc.sc: Handle jlitab section.
* scripttempl/elfarcv2.sc: Likewise.
* testsuite/ld-arc/arc.exp: Add JLI test.
* testsuite/ld-arc/jli-script.ld: New file.
* testsuite/ld-arc/jli-simple.dd: Likewise.
* testsuite/ld-arc/jli-simple.rd: Likewise.
* testsuite/ld-arc/jli-simple.s: Likewise.
* testsuite/ld/testsuite/ld-arc/jli-overflow.s: Likewise.
* testsuite/ld/testsuite/ld-arc/jli-overflow.d: Likewise.
* testsuite/ld/testsuite/ld-arc/jli-overflow.err: Likewise.
opcode/
2017-07-19 Claudiu Zissulescu <claziss@synopsys.com>
John Eric Martin <John.Martin@emmicro-us.com>
* arc-opc.c (UIMM10_6_S_JLIOFF): Define.
(UIMM3_23): Adjust accordingly.
* arc-regs.h: Add/correct jli_base register.
* arc-tbl.h (jli_s): Likewise.
|
|
binutils/
* nm.c (show_stats): Remove variable.
(long_options): Remove --stats option.
(main): Remove handling of --stats.
ld/
* ldmain.c (main): Remove display of data size.
gas/
* as.c (start_sbrk): Remove.
(main): Remove assignment.
(dump_statistics): Remove display of data size.
|
|
gas/
* testsuite/gas/pe/seh-x64-err-2.s: New test.
* testsuite/gas/pe/seh-x64-err-2.l: New stderr output.
* testsuite/gas/pe/pe.exp: Add test.
* config/obj-coff-seh.c (obj_coff_seh_do_final): Don't try to end
seh part.
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|
|
|
gas * po/uk.po: Updated Ukranian translation.
binutils* po/sv.po: Updated Swedish translation.
|
|
PR 21472
* config/tc-avr.c (mcu_types): Add entries for: attiny212,
attiny214, attiny412, attiny414, attiny814, attiny1614,
attiny1616, attiny1617, attiny3214, attiny3216, attiny3217.
(md_show_usage): Adjust doc for "avrxmega3".
* doc/c-avr.texi (AVR options) [-mmcu=]: Adjust doc for avrxmega3.
Add MCUs: attiny212, attiny214, attiny412, attiny414, attiny416,
attiny417, attiny814, attiny816, attiny817, attiny1614,
attiny1616, attiny1617, attiny3214, attiny3216, attiny3217.
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|
gas/
* config/tc-arch64.c (aarch64_cpus): Add AARCH64_FEATURE_RDMA to
falkor and qdf24xx entries.
|
|
bfd/
* po/es.po: Update from translationproject.org/latest/bfd/.
* po/fi.po: Likewise.
* po/fr.po: Likewise.
* po/id.po: Likewise.
* po/ja.po: Likewise.
* po/ro.po: Likewise.
* po/ru.po: Likewise.
* po/sr.po: Likewise.
* po/sv.po: Likewise.
* po/tr.po: Likewise.
* po/uk.po: Likewise.
* po/vi.po: Likewise.
* po/zh_CN.po: Likewise.
* po/hr.po: New file from translationproject.org.
* configure.ac (ALL_LINGUAS): Add hr. Sort.
* configure: Regenerate.
binutils/
* po/bg.po: Update from translationproject.org/latest/binutils/.
* po/ca.po: Likewise.
* po/da.po: Likewise.
* po/es.po: Likewise.
* po/fi.po: Likewise.
* po/fr.po: Likewise.
* po/hr.po: Likewise.
* po/id.po: Likewise.
* po/it.po: Likewise.
* po/ja.po: Likewise.
* po/ro.po: Likewise.
* po/ru.po: Likewise.
* po/sk.po: Likewise.
* po/sr.po: Likewise.
* po/sv.po: Likewise.
* po/tr.po: Likewise.
* po/uk.po: Likewise.
* po/vi.po: Likewise.
* po/zh_CN.po: Likewise.
* po/zh_TW.po: Likewise.
gas/
* po/es.po: Update from translationproject.org/latest/gas/.
* po/fi.po: Likewise.
* po/fr.po: Likewise.
* po/id.po: Likewise.
* po/ja.po: Likewise.
* po/ru.po: Likewise.
* po/sv.po: Likewise.
* po/tr.po: Likewise.
* po/uk.po: Likewise.
* po/zh_CN.po: Likewise.
gold/
* po/es.po: Update from translationproject.org/latest/gold/.
* po/fi.po: Likewise.
* po/fr.po: Likewise.
* po/id.po: Likewise.
* po/it.po: Likewise.
* po/vi.po: Likewise.
* po/zh_CN.po: Likewise.
* po/ja.po: New file from translationproject.org.
* po/sv.po: Likewise.
* po/uk.po: Likewise.
gprof/
* po/bg.po: Update from translationproject.org/latest/gprof/.
* po/da.po: Likewise.
* po/de.po: Likewise.
* po/eo.po: Likewise.
* po/es.po: Likewise.
* po/fi.po: Likewise.
* po/fr.po: Likewise.
* po/ga.po: Likewise.
* po/hu.po: Likewise.
* po/id.po: Likewise.
* po/it.po: Likewise.
* po/ja.po: Likewise.
* po/ms.po: Likewise.
* po/nl.po: Likewise.
* po/pt_BR.po: Likewise.
* po/ro.po: Likewise.
* po/ru.po: Likewise.
* po/sr.po: Likewise.
* po/sv.po: Likewise.
* po/tr.po: Likewise.
* po/uk.po: Likewise.
* po/vi.po: Likewise.
ld/
* po/bg.po: Update from translationproject.org/latest/ld/.
* po/da.po: Likewise.
* po/es.po: Likewise.
* po/fi.po: Likewise.
* po/fr.po: Likewise.
* po/id.po: Likewise.
* po/it.po: Likewise.
* po/ja.po: Likewise.
* po/tr.po: Likewise.
* po/uk.po: Likewise.
* po/vi.po: Likewise.
* po/zh_CN.po: Likewise.
* po/zh_TW.po: Likewise.
* po/de.po: New file from translationproject.org.
* po/ru.po: Likewise.
* configure.ac (ALL_LINGUAS): Add de, ru. Sort.
* configure: Regenerate.
opcodes/
* po/da.po: Update from translationproject.org/latest/opcodes/.
* po/de.po: Likewise.
* po/es.po: Likewise.
* po/fi.po: Likewise.
* po/fr.po: Likewise.
* po/id.po: Likewise.
* po/it.po: Likewise.
* po/nl.po: Likewise.
* po/pt_BR.po: Likewise.
* po/ro.po: Likewise.
* po/sv.po: Likewise.
* po/tr.po: Likewise.
* po/uk.po: Likewise.
* po/vi.po: Likewise.
* po/zh_CN.po: Likewise.
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|
bfd * elf32-xtensa.c (elf_xtensa_get_plt_section): Increase length of
plt_name buffer.
(elf_xtensa_get_gotplt_section): Increase length of got_name
buffer.
* mach-o-arm.c (bfd_mach_o_arm_canonicalize_one_reloc): Add a
default return of FALSE.
* mach-o-i386.c (bfd_mach_o_i386_canonicalize_one_reloc): Add a
default return of FALSE.
binutils * dwarf.c (dwarf_vmatoa_1): Do not pass a NULL string pointer to
sprintf.
* srconv.c (walk_tree_type): Initialise the spare field of the
IT_dty structure.
gas * config/tc-pru.c (md_assemble): Add continue statement after
handling 'E' operand character.
* config/tc-v850.c (md_assemble): Initialise the 'insn' variable.
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