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2020-04-02Add support for intel SERIALIZE instructionLiliCui7-0/+46
2020-04-02ld: Disable ifunc tests on SolarisRainer Orth5-4/+11
2020-04-02[PATCH gas/m68k] Fix a register range checkGunther Nikl2-1/+6
2020-04-01x86: Force relocation against local absolute symbolH.J. Lu7-3/+32
2020-04-01gas: Fix some x86_64 testcases for Solaris not using R_X86_64_PLT32 [PR25732]Rainer Orth8-47/+92
2020-03-31PR 25611, PR 25614: GAS: Remove a double inclusion of "bignum.h"Maciej W. Rozycki2-1/+6
2020-03-30RISC-V: Update CSR to privileged spec 1.11.Nelson Chu18-384/+451
2020-03-25The "b" flag for COFF sections only unsets the LOAD attribute. It should als...J.W. Jagersma2-0/+10
2020-03-22s12z disassembler tidyAlan Modra2-5/+5
2020-03-20Add support for the xdef and xref pseudo-ops to the Z80 assembler.Sergey Belyashov3-27/+64
2020-03-17Replace a couple of assertions in the BFD library that can be triggered by at...Nick Clifton1-0/+25
2020-03-17Fix a small set of Z80 problems.Sergey Belyashov15-156/+428
2020-03-13gas, arm: PR25660L Fix vadd/vsub with lt and le condition codes for MVEAndre Vieira8-3/+114
2020-03-11NEWS: Mention x86 assembler options for CVE-2020-0551H.J. Lu2-0/+8
2020-03-11i386: Add tests for lfence with load/indirect branch/retH.J. Lu27-0/+740
2020-03-11i386: Generate lfence with load/indirect branch/ret [CVE-2020-0551]H.J. Lu3-1/+436
2020-03-11Add support for generating DWARF-5 format directory and file name tables from...Nick Clifton7-163/+621
2020-03-10More 1 << 31 signed overflowsAlan Modra6-9/+18
2020-03-09x86: use template for AVX/AVX512 floating point comparison insnsJan Beulich5-0/+454
2020-03-07Re: Add support for a ".file 0" directive if supporting DWARF 5 or higher.Alan Modra2-9/+13
2020-03-06Add support for a ".file 0" directive if supporting DWARF 5 or higher.Nick Clifton7-8/+57
2020-03-06Add support for --dwarf-[3|4|5] to assembler command line.Nick Clifton6-11/+88
2020-03-06Stop the assembler from complaining that the input and output files are the s...Nick Clifton2-1/+13
2020-03-06x86: reduce amount of various VCVT* templatesJan Beulich2-5/+23
2020-03-06x86: drop/replace IgnoreSizeJan Beulich2-5/+16
2020-03-06x86: fold (supposed to be) identical codeJan Beulich2-27/+20
2020-03-06x86: replace NoRex64 on VEX-encoded insnsJan Beulich8-50/+64
2020-03-06x86: drop Rex64 attributeJan Beulich2-3/+10
2020-03-06x86: correct MPX insn w/o base or index encoding in 16-bit modeJan Beulich5-0/+182
2020-03-06x86: add missing IgnoreSizeJan Beulich31-22/+274
2020-03-06x86: refine TPAUSE and UMWAITJan Beulich8-16/+70
2020-03-04RISC-V: Support assembler modifier %got_pcrel_hi.Nelson Chu7-7/+45
2020-03-04RISC-V: Add description for RISC-V Modifiers to as doc.Nelson Chu2-1/+117
2020-03-04Generate a warning in the ARM assembler if a PC-relative thumb load instructi...Alexandre Oliva7-6/+24
2020-03-04x86: support VMGEXITJan Beulich7-4/+21
2020-03-03x86: Replace IgnoreSize/DefaultSize with MnemonicSizeH.J. Lu2-13/+21
2020-03-03The patch fixed invalid compilation of instruction LD IY,(HL) and disassemble...Sergey Belyashov6-4/+54
2020-03-03x86: Allow integer conversion without suffix in AT&T syntaxH.J. Lu8-24/+61
2020-03-03x86: Improve -malign-branchHongtao Liu7-32/+378
2020-03-03Fix a potential illegal memory access in the Z80 assembler.Sergey Belyashov2-8/+30
2020-03-03Tidy obj-coff.hAlan Modra2-14/+5
2020-03-02miscellaneous SEC_SMALL_DATAAlan Modra6-56/+34
2020-02-28MIPS/fix_loongson3_llsc: fix when target has multi labelsYunQiang Su2-5/+51
2020-02-26[binutils][arm] Arm CDE CX*A instructions allow condition codeMatthew Malcomson5-46/+50
2020-02-26gas gettext warningAlan Modra2-1/+6
2020-02-26gas strncpy warningAlan Modra2-1/+7
2020-02-26Indent labelsAlan Modra22-63/+87
2020-02-20RISC-V: Support the read-only CSR checking.Nelson Chu8-0/+543
2020-02-20RISC-V: Disable the CSR checking by default.Nelson Chu5-3/+50
2020-02-20RISC-V: Support the ISA-dependent CSR checking.Nelson Chu8-9/+198
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