| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2018-01-11 | Remove VL variants for 4FMAPS and 4VNNIW insns. | Igor Tsimbalist | 20 | -1030/+36 |
| 2018-01-11 | gas tc-arm.c warning fix | Alan Modra | 2 | -1/+6 |
| 2018-01-10 | x86: fix Disp8 handling for scalar AVX512_4FMAPS insns | Jan Beulich | 13 | -381/+402 |
| 2018-01-10 | x86: fix Disp8 handling for AVX512VL VPCMP*{B,W} variants | Jan Beulich | 7 | -0/+46 |
| 2018-01-09 | RISC-V: Disassemble x0 based addresses as 0. | Jim Wilson | 3 | -0/+21 |
| 2018-01-09 | [Arm] Add CSDB instruction | James Greenhalgh | 6 | -0/+44 |
| 2018-01-09 | Add support for the AArch64's CSDB instruction. | James Greenhalgh | 2 | -1/+6 |
| 2018-01-08 | x86: Properly encode vmovd with 64-bit memeory | H.J. Lu | 5 | -0/+145 |
| 2018-01-08 | Add a description of the X86_64 assembler's .largcomm pseudo-op. | Nick Clifton | 2 | -1/+16 |
| 2018-01-04 | RISC-V: Add 2 missing privileged registers. | Jim Wilson | 3 | -24/+33 |
| 2018-01-03 | Update year range in copyright notice of binutils files | Alan Modra | 578 | -580/+584 |
| 2018-01-03 | ChangeLog rotation | Alan Modra | 2 | -4407/+4421 |
| 2018-01-02 | Fix typo in do_mrs function in ARM assembler. | Nick Clifton | 2 | -1/+7 |
| 2017-12-28 | RISC-V: Add missing privileged spec registers. | Jim Wilson | 3 | -0/+522 |
| 2017-12-20 | RISC-V: Add compressed instruction hints, and a few misc cleanups. | Jim Wilson | 14 | -0/+110 |
| 2017-12-19 | Correct disassembly of dot product instructions. | Tamar Christina | 3 | -434/+446 |
| 2017-12-19 | Add support for V_4B so we can properly reject it. | Tamar Christina | 5 | -3/+35 |
| 2017-12-18 | Resolve PR 22493 - the encoding to be used when pushing the stack pointer ont... | Nick Clifton | 2 | -0/+11 |
| 2017-12-18 | x86: fold certain AVX and AVX2 templates | Jan Beulich | 2 | -38/+52 |
| 2017-12-18 | x86: fold RegXMM/RegYMM/RegZMM into RegSIMD | Jan Beulich | 4 | -125/+146 |
| 2017-12-18 | x86: drop FloatReg and FloatAcc | Jan Beulich | 2 | -11/+18 |
| 2017-12-18 | x86: replace Reg8, Reg16, Reg32, and Reg64 | Jan Beulich | 3 | -133/+138 |
| 2017-12-17 | x86: Check pseudo prefix without instruction | H.J. Lu | 5 | -0/+32 |
| 2017-12-15 | x86: correct operand type checks | Jan Beulich | 2 | -4/+9 |
| 2017-12-15 | x86: correct abort check | Jan Beulich | 2 | -2/+7 |
| 2017-12-14 | Update the address of the FSF in the copyright notice of files which were usi... | Nick Clifton | 8 | -21/+31 |
| 2017-12-13 | Add missing RISC-V fsrmi and fsflagsi instructions. | Jim Wilson | 3 | -0/+22 |
| 2017-12-13 | This patch enables disassembler_needs_relocs for PRU. It is needed to print c... | Dimitar Dimitrov | 3 | -0/+21 |
| 2017-12-12 | Don't mask X_add_number containing a register number | Alan Modra | 2 | -1/+6 |
| 2017-12-08 | gas: xtensa: fix comparison of trampoline chain symbols | Max Filippov | 2 | -4/+28 |
| 2017-12-04 | Documentation fix | Alan Modra | 2 | -1/+6 |
| 2017-12-04 | Run powerpc vle gas tests for all powerpc ELF targets | Alan Modra | 19 | -39/+58 |
| 2017-12-03 | Fix for texinfo 4.8. | Jim Wilson | 2 | -2/+6 |
| 2017-12-01 | Update and clean up RISC-V gas documentation. | Jim Wilson | 3 | -19/+134 |
| 2017-12-01 | Use consistent types for holding instructions, instruction masks, etc. | Peter Bergner | 2 | -32/+44 |
| 2017-11-30 | x86: drop Vec_Disp8 | Jan Beulich | 2 | -54/+28 |
| 2017-11-30 | x86/Intel: issue diagnostics for redundant segment override prefixes | Jan Beulich | 6 | -7/+64 |
| 2017-11-30 | Revert "x86: Update segment register check in Intel syntax" | Jan Beulich | 7 | -57/+18 |
| 2017-11-29 | Give Palmer co-credit for last patch. | Jim Wilson | 1 | -0/+1 |
| 2017-11-29 | Fix riscv malloc error on small alignment after norvc. | Jim Wilson | 5 | -11/+23 |
| 2017-11-29 | In x86 -n docs, mention that you need an explicit nop fill byte. | Jim Wilson | 2 | -1/+7 |
| 2017-11-29 | [GAS][AARCH64]Fix a typo for IP1 register alias. | Renlin Li | 4 | -2/+12 |
| 2017-11-29 | Support --localedir, --datarootdir and --datadir | Stefan Stroe | 2 | -4/+10 |
| 2017-11-29 | Use the record_alignment function when creating a .note section, in case the ... | Nick Clifton | 2 | -2/+7 |
| 2017-11-27 | Compress loads/stores with implicit 0 offset. | Jim Wilson | 7 | -6/+99 |
| 2017-11-27 | gas: xtensa: speed up find_trampoline_seg | Max Filippov | 2 | -1/+13 |
| 2017-11-27 | gas: xtensa: implement trampoline coalescing | Max Filippov | 7 | -28/+341 |
| 2017-11-27 | gas: xtensa: reuse trampoline placement code | Max Filippov | 3 | -91/+23 |
| 2017-11-27 | gas: xtensa: rewrite xg_relax_trampoline | Max Filippov | 5 | -301/+284 |
| 2017-11-27 | gas: xtensa: merge trampoline_frag into xtensa_frag_type | Max Filippov | 3 | -67/+83 |
