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2016-06-20Add support for MIPS .rld_map section.Vladimir Radosavljevic2-0/+6
Includes DT_MIPS_RLD_MAP and DT_MIPS_RLD_MAP_REL dynamic tags and __RLD_MAP symbol. 2016-06-20 Vladimir Radosavljevic <Vladimir.Radosavljevic@imgtec.com> elfcpp/ * elfcpp.h (DT_MIPS_RLD_MAP_REL): New enum constant. gold/ * mips.cc (Target_mips::Target_mips): Initialize rld_map_. (Target_mips::rld_map_): New data member. (Target_mips::do_finalize_sections): Add support for DT_MIPS_RLD_MAP and DT_MIPS_RLD_MAP_REL dynamic tags, .rld_map section, and __RLD_MAP symbol. (Target_mips::do_dynamic_tag_custom_value): Add support for DT_MIPS_RLD_MAP_REL dynamic tag. * output.cc (Output_data_dynamic::get_entry_offset): New method definition. * output.h (Output_data_dynamic::get_entry_offset): New method declaration.
2016-06-20Add support for Mips32r6 and Mips64r6.Vladimir Radosavljevic2-0/+21
elfcpp/ * mips.h (R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16, R_MIPS_PCLO16): New enums for Mips32r6 and Mips64r6 relocations. (r6_isa): New function. gold/ * mips.cc (relocation_needs_la25_stub): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (hi16_reloc): Add support for R_MIPS_PCHI16 relocation. (is_matching_lo16_reloc): Likewise. (lo16_reloc): Add support for R_MIPS_PCLO16 relocation. (Mips_output_data_plt::plt_entry_r6): New static data member for R6 PLT entry. (Target_mips::is_output_r6): New method. (Target_mips::Mips_mach): Add new enum constants. (Mips_relocate_functions::Status): Likewise. (Mips_relocate_functions::pchi16_relocs): New static data member. (Mips_relocate_functions::relpc21): New method. (Mips_relocate_functions::relpc26): Likewise. (Mips_relocate_functions::relpc18): Likewise. (Mips_relocate_functions::relpc19): Likewise. (Mips_relocate_functions::relpchi16): Likewise. (Mips_relocate_functions::do_relpchi16): Likewise. (Mips_relocate_functions::relpclo16): Likewise. (Mips_output_data_plt::do_write): Add support for Mips r6 plt entry. (Target_mips::mips_32bit_flags): Add E_MIPS_ARCH_32R6 support. (Target_mips::elf_mips_mach): Add E_MIPS_ARCH_32R6 and E_MIPS_ARCH_64R6 support. (Target_mips::update_abiflags_isa): Likewise. (mips_get_size_for_reloc): Add support for relocs: R_MIPS_PCHI16, R_MIPS_PCLO16, R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3 and R_MIPS_PC19_S2. (Target_mips::Scan::local): Add support for relocs: R_MIPS_PCHI16 and R_MIPS_PCLO16. (Target_mips::Scan::global): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (Target_mips::Relocate::relocate): Call functions for resolving Mips32r6 and Mips64r6 relocations, and print error message for STATUS_PCREL_UNALIGNED. (Target_mips::Scan::get_reference_flags): Add support for relocs: R_MIPS_PCHI16, R_MIPS_PCLO16, R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3 and R_MIPS_PC19_S2. (Target_mips::elf_mips_mach_name): Add E_MIPS_ARCH_32R6 and E_MIPS_ARCH_64R6 support.
2016-06-11Add support for .MIPS.abiflags and .gnu.attributes sections.Vladimir Radosavljevic3-0/+169
elfcpp/ * elfcpp.h (SHT_MIPS_ABIFLAGS): New enum constant. * mips.h (EF_MIPS_FP64, EF_MIPS_NAN2008): New enum constants for processor-specific flags. (E_MIPS_MACH_5900): New enum constant for machine variant. (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): New enum constants. (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU, AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS, AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16, AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise. (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP, AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900, AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900, AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120, AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E, AFL_EXT_LOONGSON_2F, AFL_EXT_OCTEON3): Likewise. (Tag_GNU_MIPS_ABI_FP, Tag_GNU_MIPS_ABI_MSA): Likewise. (Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE, Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT, Val_GNU_MIPS_ABI_FP_OLD_64,Val_GNU_MIPS_ABI_FP_XX, Val_GNU_MIPS_ABI_FP_64, Val_GNU_MIPS_ABI_FP_64A, Val_GNU_MIPS_ABI_FP_NAN2008, Val_GNU_MIPS_ABI_MSA_ANY, Val_GNU_MIPS_ABI_MSA_128): Likewise. (AFL_FLAGS1_ODDSPREG): New enum constant. gold/ * mips.cc (struct Mips_abiflags): New struct. (Mips_relobj::Mips_relobj): Initialize attributes_section_data_ and abiflags_. (Mips_relobj::~Mips_relobj): Delete object pointed by attributes_section_data_. (Mips_relobj::abiflags): New method. (Mips_relobj::attributes_section_data): Likewise. (Mips_relobj::attributes_section_data_): New data member. (Mips_relobj::abiflags_): Likewise. (class Mips_output_section_abiflags): New class. (Target_mips::Target_mips): Initialize attributes_section_data_, abiflags_ and has_abiflags_section_. (Target_mips::do_should_include_section): Don't emit input .MIPS.abiflags sections to output .MIPS.abiflags. (Target_mips::Mips_mach): Add new enum constants. (Target_mips::mips_isa_ext_mach): New method. (Target_mips::mips_isa_ext): Likewise. (Target_mips::update_abiflags_isa): Likewise. (Target_mips::infer_abiflags): Likewise. (Target_mips::create_abiflags): Likewise. (Target_mips::fp_abi_string): Likewise. (Target_mips::select_fp_abi): Likewise. (Target_mips::merge_obj_attributes): Likewise. (Target_mips::merge_obj_abiflags): Likewise. (Target_mips::level_rev): Likewise. (Target_mips::merge_obj_e_flags): Rename from merge_processor_specific_flags. Remove dyn_obj argument, call update_abiflags_isa when needed, compare NaN encodings and compare FP64 state. (Target_mips::add_machine_extensions): Add two machine extensions and fix one. (Target_mips::attributes_section_data_): New data member. (Target_mips::abiflags_): Likewise. (Target_mips::has_abiflags_section_): Likewise. (Mips_relobj::do_read_symbols): Read .gnu.attributes and .MIPS.abiflags sections if they exists. (Target_mips::elf_mips_mach): Add E_MIPS_MACH_5900 and E_MIPS_MACH_OCTEON3 support. (Target_mips::do_adjust_elf_header): Setup EI_ABIVERSION flag. (Target_mips::do_finalize_sections): Merge .gnu.attributes and .MIPS.abiflags sections from input. Create these sections if needed. (Target_mips::elf_mips_mach_name): Add E_MIPS_MACH_5900 and E_MIPS_MACH_OCTEON3 support, and change strings for E_MIPS_MACH_LS2E, E_MIPS_MACH_LS2F and E_MIPS_MACH_LS3A just to match bfd.
2016-03-18Remove is_n64_ data member from Mips_relobj class.Vladimir Radosavljevic2-5/+4
elfcpp/ * mips.h (abi_64): Remove. gold/ * mips.cc (Mips_relobj::is_n64_): Remove. (Target_mips::ei_class_): Likewise. (Mips_relobj::is_newabi): Call methods. (Mips_relobj::is_n64): Change checking for N64 ABI. (Target_mips::is_output_n64): Likewise. (Target_mips::merge_processor_specific_flags): Remove ei_class argument, and remove comparing ei_class. (Target_mips::do_adjust_elf_header): Remove setting EI_CLASS field of the ELF header. (Target_mips::do_finalize_sections): Don't pass ei_class argument to merge_processor_specific_flags. (Target_mips::elf_mips_abi_name): Remove ei_class argument, and change checking for N64 ABI.
2016-01-12Remove typename from Mips64_rela_dataH.J. Lu1-1/+1
2016-01-12Fix compile error with use of 'typename' outside of template.H.J. Lu2-2/+7
elfcpp/ * elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): Remove 'typename'.
2016-01-11Refactor gold to enable support for MIPS-64 relocation format.Cary Coutant3-0/+195
For MIPS-64, the r_info field in the relocation format is replaced by several individual fields, including r_sym and r_type. To enable support for this format, I've refactored target-independent code to remove almost all uses of the r_info field. (I've left alone a couple of routines used only for incremental linking, which I can update if/when the MIPS target adds support for incremental linking.) For routines that are already templated on a Classify_reloc class (namely, gc_process_relocs, relocate_section, and relocate_relocs), I've extended the Classify_reloc interface to include sh_type (which no longer needs to be a separate template parameter) as well as get_r_sym() and get_r_type() methods for extracting the r_sym and r_type fields. For scan_relocatable_relocs, I've extended the Default_scan_relocatable_relocs class by converting it to a class template with Classify_reloc as a template parameter. For the remaining routines that need to access r_sym, I've added a virtual Target::get_r_sym() method with an override for the MIPS target. In elfcpp, I've added Mips64_rel, etc., accessor classes and corresponding internal data structures. The MIPS target uses these new classes within its own Mips_classify_reloc class. The Mips64_ accessor classes also expose the r_ssym, r_type2, and r_type3 fields from the relocation. These changes should be functionally the same for all but the MIPS target. elfcpp/ * elfcpp.h (Mips64_rel, Mips64_rel_write): New classes. (Mips64_rela, Mips64_rela_write): New classes. * elfcpp_internal.h (Mips64_rel_data, Mips64_rela_data): New structs. gold/ * gc.h (get_embedded_addend_size): Remove sh_type parameter. (gc_process_relocs): Remove sh_type template parameter. Use Classify_reloc to access r_sym, r_type, and r_addend fields. * object.h (Sized_relobj_file::split_stack_adjust): Add target parameter. (Sized_relobj_file::split_stack_adjust_reltype): Likewise. * reloc-types.h (Reloc_types::copy_reloc_addend): (SHT_REL and SHT_RELA specializations) Remove. * reloc.cc (Emit_relocs_strategy): Rename and move to target-reloc.h. (Sized_relobj_file::emit_relocs_scan): Call Target::emit_relocs_scan(). (Sized_relobj_file::emit_relocs_scan_reltype): Remove. (Sized_relobj_file::split_stack_adjust): Add target parameter. Adjust all callers. (Sized_relobj_file::split_stack_adjust_reltype): Likewise. Call Target::get_r_sym() to get r_sym field from relocations. (Track_relocs::next_symndx): Call Target::get_r_sym(). * target-reloc.h (scan_relocs): Remove sh_type template parameter; add Classify_reloc template parameter. Use for accessing r_sym and r_type. (relocate_section): Likewise. (Default_classify_reloc): New class (renamed and moved from reloc.cc). (Default_scan_relocatable_relocs): Remove sh_type template parameter. (Default_scan_relocatable_relocs::Reltype): New typedef. (Default_scan_relocatable_relocs::reloc_size): New const. (Default_scan_relocatable_relocs::sh_type): New const. (Default_scan_relocatable_relocs::get_r_sym): New method. (Default_scan_relocatable_relocs::get_r_type): New method. (Default_emit_relocs_strategy): New class. (scan_relocatable_relocs): Replace sh_type template parameter with Scan_relocatable_relocs class. Use it to access r_sym and r_type fields. (relocate_relocs): Replace sh_type template parameter with Classify_reloc class. Use it to access r_sym and r_type fields. * target.h (Target::is_call_to_non_split): Replace r_type parameter with pointer to relocation. Adjust all callers. (Target::do_is_call_to_non_split): Likewise. (Target::emit_relocs_scan): New virtual method. (Sized_target::get_r_sym): New virtual method. * target.cc (Target::do_is_call_to_non_split): Replace r_type parameter with pointer to relocation. * aarch64.cc (Target_aarch64::emit_relocs_scan): New method. (Target_aarch64::Relocatable_size_for_reloc): Remove. (Target_aarch64::gc_process_relocs): Use Default_classify_reloc. (Target_aarch64::scan_relocs): Likewise. (Target_aarch64::relocate_section): Likewise. (Target_aarch64::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_aarch64::scan_relocatable_relocs): Use Default_classify_reloc. (Target_aarch64::relocate_relocs): Use Default_classify_reloc. * arm.cc (Target_arm::Arm_scan_relocatable_relocs): Remove sh_type template parameter. (Target_arm::emit_relocs_scan): New method. (Target_arm::Relocatable_size_for_reloc): Replace with... (Target_arm::Classify_reloc): ...this. (Target_arm::gc_process_relocs): Use Classify_reloc. (Target_arm::scan_relocs): Likewise. (Target_arm::relocate_section): Likewise. (Target_arm::scan_relocatable_relocs): Likewise. (Target_arm::relocate_relocs): Likewise. * i386.cc (Target_i386::emit_relocs_scan): New method. (Target_i386::Relocatable_size_for_reloc): Replace with... (Target_i386::Classify_reloc): ...this. (Target_i386::gc_process_relocs): Use Classify_reloc. (Target_i386::scan_relocs): Likewise. (Target_i386::relocate_section): Likewise. (Target_i386::scan_relocatable_relocs): Likewise. (Target_i386::relocate_relocs): Likewise. * mips.cc (Mips_scan_relocatable_relocs): Remove sh_type template parameter. (Mips_reloc_types): New class template. (Mips_classify_reloc): New class template. (Target_mips::Reltype): New typedef. (Target_mips::Relatype): New typedef. (Target_mips::emit_relocs_scan): New method. (Target_mips::get_r_sym): New method. (Target_mips::Relocatable_size_for_reloc): Replace with Mips_classify_reloc. (Target_mips::copy_reloc): Use Mips_classify_reloc. (Target_mips::gc_process_relocs): Likewise. (Target_mips::scan_relocs): Likewise. (Target_mips::relocate_section): Likewise. (Target_mips::scan_relocatable_relocs): Likewise. (Target_mips::relocate_relocs): Likewise. (mips_get_size_for_reloc): New function, factored out from Relocatable_size_for_reloc::get_size_for_reloc. (Target_mips::Scan::local): Use Mips_classify_reloc. (Target_mips::Scan::global): Likewise. (Target_mips::Relocate::relocate): Likewise. * powerpc.cc (Target_powerpc::emit_relocs_scan): New method. (Target_powerpc::Relocatable_size_for_reloc): Remove. (Target_powerpc::gc_process_relocs): Use Default_classify_reloc. (Target_powerpc::scan_relocs): Likewise. (Target_powerpc::relocate_section): Likewise. (Powerpc_scan_relocatable_reloc): Convert to class template. (Powerpc_scan_relocatable_reloc::Reltype): New typedef. (Powerpc_scan_relocatable_reloc::reloc_size): New const. (Powerpc_scan_relocatable_reloc::sh_type): New const. (Powerpc_scan_relocatable_reloc::get_r_sym): New method. (Powerpc_scan_relocatable_reloc::get_r_type): New method. (Target_powerpc::scan_relocatable_relocs): Use Powerpc_scan_relocatable_reloc. (Target_powerpc::relocate_relocs): Use Default_classify_reloc. * s390.cc (Target_s390::emit_relocs_scan): New method. (Target_s390::Relocatable_size_for_reloc): Remove. (Target_s390::gc_process_relocs): Use Default_classify_reloc. (Target_s390::scan_relocs): Likewise. (Target_s390::relocate_section): Likewise. (Target_s390::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_s390::scan_relocatable_relocs): Use Default_classify_reloc. (Target_s390::relocate_relocs): Use Default_classify_reloc. * sparc.cc (Target_sparc::emit_relocs_scan): New method. (Target_sparc::Relocatable_size_for_reloc): Remove. (Target_sparc::gc_process_relocs): Use Default_classify_reloc. (Target_sparc::scan_relocs): Likewise. (Target_sparc::relocate_section): Likewise. (Target_sparc::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_sparc::scan_relocatable_relocs): Use Default_classify_reloc. (Target_sparc::relocate_relocs): Use Default_classify_reloc. * tilegx.cc (Target_tilegx::emit_relocs_scan): New method. (Target_tilegx::Relocatable_size_for_reloc): Remove. (Target_tilegx::gc_process_relocs): Use Default_classify_reloc. (Target_tilegx::scan_relocs): Likewise. (Target_tilegx::relocate_section): Likewise. (Target_tilegx::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_tilegx::scan_relocatable_relocs): Use Default_classify_reloc. (Target_tilegx::relocate_relocs): Use Default_classify_reloc. * x86_64.cc (Target_x86_64::emit_relocs_scan): New method. (Target_x86_64::Relocatable_size_for_reloc): Remove. (Target_x86_64::gc_process_relocs): Use Default_classify_reloc. (Target_x86_64::scan_relocs): Likewise. (Target_x86_64::relocate_section): Likewise. (Target_x86_64::Relocatable_size_for_reloc::get_size_for_reloc): Remove. (Target_x86_64::scan_relocatable_relocs): Use Default_classify_reloc. (Target_x86_64::relocate_relocs): Use Default_classify_reloc. * testsuite/testfile.cc (Target_test::emit_relocs_scan): New method.
2016-01-01Copyright update for binutilsAlan Modra16-15/+19
2016-01-01New 2016 binutils ChangeLog filesAlan Modra1-0/+14
Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog and include/*/ChangeLog files.
2016-01-01binutils ChangeLog rotationAlan Modra1-0/+0
2015-12-30Fix assorted ChangeLog errorsAlan Modra1-2/+2
2015-12-07[GOLD] R_PPC64_ENTRY supportAlan Modra2-0/+5
elfcpp/ * powerpc.h (R_PPC64_ENTRY): Define. gold/ * powerpc.cc (add_2_2_12, ld_2_12, lis_2): Define. (Target_powerpc::Scan::local, global): Handle R_PPC64_ENTRY. (Target_powerpc::Relocate::relocate): Edit code at R_PPC64_ENTRY.
2015-11-11Add assembler, disassembler and linker support for power9.Peter Bergner2-0/+6
include/opcode/ * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries. Add PPC_OPCODE_VSX3 to the vsx entry. (powerpc_init_dialect): Set default dialect to power9. * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1, extract_l1 insert_xtq6, extract_xtq6): New static functions. (insert_esync): Test for illegal L operand value. (DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6, XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA, XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK, XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3, PPCVSX3): New defines. (powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu, fcmpo, ftdiv, ftsqrt>: Use XBF_MASK. <mcrxr>: Use XBFRARB_MASK. <addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq., bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc., cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first, cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx, lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll, lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw, modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last, rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx, stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx, subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh, vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh., vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd, vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d, vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx, vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq, vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd, vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait, xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp, xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp, xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz, xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp, xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp, xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo, xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo, xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo, xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp, xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp, xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp, xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw, xxinsertw, xxperm, xxpermr, xxspltib>: New instructions. <doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9. <tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands. include/elf/ * ppc.h (R_PPC_REL16DX_HA): New reloction. * ppc64.h (R_PPC64_REL16DX_HA): Likewise. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. (ppc_elf_addr16_ha_reloc): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_relocate_section): Likewise. (is_insn_dq_form): Handle lxv and stxv instructions. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA. (ppc64_elf_ha_reloc): Likewise. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. * reloc.c (BFD_RELOC_PPC_REL16DX_HA): New. elfcpp/ * powerpc.h (R_POWERPC_REL16DX_HA): Define. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA. (md_apply_fix): Likewise. (ppc_handle_align): Handle power9's group ending nop. gas/testsuite/ * gas/ppc/altivec3.s: New test. * gas/ppc/altivec3.d: Likewise. * gas/ppc/vsx3.s: Likewise. * gas/ppc/vsx3.d: Likewise. * gas/ppc/power9.s: Likewise. * gas/ppc/power9.d: Likewise. * gas/ppc/ppc.exp: Run them. * gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests. * gas/ppc/power8.d: Likewise. * gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ... <lxvd2x, stxvd2x>: ...to this. * gas/ppc/vsx.d: Likewise. gold/ * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. (Powerpc_relocate_functions::addr16dx_ha): Likewise. (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Likewise. ld/testsuite/ * ld-powerpc/addpcis.d: New test. * ld-powerpc/addpcis.s: New test. * ld-powerpc/powerpc.exp: Run it.
2015-10-28Add s390 backend.Marcin Kościelnicki2-0/+122
elfcpp/ * s390.h: New file. gold/ * s390.cc: New file. * Makefile.am (TARGETSOURCES): Add s390.cc. (ALL_TARGETOBJS): Add s390.o. * Makefile.in: Regenerate. * configure.ac: Add s390 support. * configure: Regenerate. * configure.tgt: Add s390-*-* and s390x-*-*. * testsuite/icf_safe_test.sh (arch_specific_safe_fold): Add s390 support.
2015-10-22Gold: Don't fail on R_X86_64_[REX_]GOTPCRELX relocationsH.J. Lu2-0/+9
This patch updates gold to treat the R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX relocations proposed in https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0 the same as R_X86_64_GOTPCREL. FIXME: Gold should perform the transformations as suggested. elfcpp/ * x86_64.h (R_X86_64_GOTPCRELX): New. (R_X86_64_REX_GOTPCRELX): Likewise. gold/ * x86_64.cc (Target_x86_64<size>::Scan::get_reference_flags): Treat R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX the same as R_X86_64_GOTPCREL. (Target_x86_64<size>::Scan::local): Likewise. (Target_x86_64<size>::Scan::possible_function_pointer_reloc): Likewise. (Target_x86_64<size>::Scan::global): Likewise. (Target_x86_64<size>::Relocate::relocate): Likewise. (Target_x86_64<size>::Relocatable_size_for_reloc::get_size_for_reloc): Likewise.
2015-10-22Gold: Don't fail on R_386_GOT32X relocationH.J. Lu2-0/+5
This patch updates gold to treat the R_386_GOT32X relocation proposed in https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I the same as R_386_GOT32. FIXME: Gold should perform the transformations as suggested. elfcpp/ * i386.h (R_386_GOT32X): New. gold/ * i386.cc (Target_i386::Scan::get_reference_flags(): Treat R_386_GOT32X the same as R_386_GOT32. (Target_i386::Scan::local): Likewise. (Target_i386::Scan::possible_function_pointer_reloc): Likewise. (Target_i386::Scan::global): Likewise. (Target_i386::Relocate::relocate): Likewise. (Target_i386::Relocatable_size_for_reloc::get_size_for_reloc): Likewise.
2015-10-13Add EM_IAMCU support to goldH.J. Lu2-1/+6
elfcpp/ PR gold/19118 * elfcpp.h (EM): Add EM_IAMCU. gold/ PR gold/19118 * i386.cc (Target_iamcu): New class. (Target_selector_iamcu): Likewise. (Target_iamcu::iamcu_info): New variable. (target_selector_iamcu): Likewise.
2015-10-04Change ch_type to Elf_Word in struct Chdr_data<64>H.J. Lu3-5/+24
The ch_type field in struct Chdr_data<64> is 4 bytes, followed by a 4-byte padding. This change doesn't introduce any functional change since only the lower 32 bits of the ch_type field are used. PR gold/19060 * elfcpp.h (Chdr::get_ch_type): Change return type to Elf_Word. * elfcpp_internal.h (Chdr_data<64>): Change ch_type to 4 bytes and add ch_reserved.
2015-04-08Add chdr_size, Chdr, Chdr_write and Chdr_dataH.J. Lu3-0/+78
* elfcpp.h (Elf_sizes): Add chdr_size. (Chdr): New. (Chdr_write): Likewise. * elfcpp_internal.h (Chdr_data): Likewise.
2015-04-08Add SHF_COMPRESSED and ELFCOMPRESS_XXX to elfcpp.hH.J. Lu2-0/+21
* elfcpp.h (SHF): Add SHF_COMPRESSED. (ELFCOMPRESS_ZLIB): New. (ELFCOMPRESS_LOOS): Likewise. (ELFCOMPRESS_HIOS): Likewise. (ELFCOMPRESS_LOPROC): Likewise. (ELFCOMPRESS_HIPROC): Likewise.
2015-04-07Add AArch32 support for arm gold linker.Han Shen2-1/+6
2015-02-17[gold] Recognize DWARF5/GCC5 DW_LANG_Fortran03 and DW_LANG_Fortran08.Mark Wielaard2-0/+12
DWARFv5 defines and GCC5 may output two new DW_LANG constants for the Fortran 2003 and Fortran 2008 standards. Recognize both in gold gdb-index as unsupported. For consistency also add the other new DWARF5/GCC5 language constants in the elfcpp::DW_LANG enum to match include/dwarf2.h. elfcpp/ChangeLog: * dwarf.h (enum DW_LANG): Add DW_LANG_C_plus_plus_11, DW_LANG_C11, DW_LANG_C_plus_plus_14, DW_LANG_Fortran03 and DW_LANG_Fortran08 from ../include/dwarf2.h. gold/ChangeLog: * gdb-index.cc (Gdb_index_info_reader::visit_top_die): Recognize DW_LANG_Fortran03 and DW_LANG_Fortran08.
2015-01-29This patch adds IFUNC support for arm gold backend.Han Shen2-2/+7
This is a feature required in chromeos arm development work. Tested: 1) Built passed all-gold on x86_64 machine 2) Tested with basic gold aarch64 ifunc unittests - a) global ifunc, statically/non-statically linked b) local ifunc, statically/non-statically linked c) global/local, other shared library routine mixed, statically/non-statically linked d) arm/thumb mode ifunc e) linking chrome browser passed
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra15-15/+19
2014-12-25ARM: Add support for value 3 of Tag_ABI_VFP_args attributeAlan Modra2-0/+22
Missing from 5c294fee elfcpp/ * arm.h: Add enums for Tag_ABI_FP_number_model and Tag_ABI_VFP_args. gold/ * arm.cc (Target_arm::do_adjust_elf_header): Provide namespace on new enums. (Target_arm::merge_object_attributes, ): Likewise.
2014-09-17Add tls support to gold aarch64 backend.Jing Yu2-2/+11
elfcpp/ChangeLog: 2014-09-17 Han Shen <shenhan@google.com> * aarch64.h (R_AARCH64_TLS_DTPREL64): Switch enum value with ... (R_AARCH64_TLS_DTPMOD64): ... enum value. gold/ChangeLog: 2014-09-17 Han Shen <shenhan@google.com> Jing Yu <jingyu@google.com> * aarch64-reloc.def: Add TLSGD_ADR_PAGE21, TLSGD_ADD_LO12_NC, TLSDESC_ADR_PAGE21, TLSDESC_LD64_LO12, TLSDESC_ADD_LO12, TLSDESC_CALL. * aarch64.cc (Target_aarch64): Add data members got_irelative_, got_tlsdesc_, rela_irelative_, got_mod_index_offset_, tlsdesc_reloc_info_, tls_base_symbol_defined_. Initialize them in constructor. (Target_aarch64::do_reloc_symbol_index): New method. (Target_aarch64::do_reloc_addend): New method. (Target_aarch64::add_tlsdesc_info): New method. (Target_aarch64::do_dynsym_value): New method. (Target_aarch64::do_make_data_plt): Add new parameters: got, got_irelative. Pass them to Output_data_plt_aarch64_standard. (Target_aarch64::make_data_plt): Add new parameters: got, got_irelative. Pass them to do_make_data_plt. (Target_aarch64::Relocate): Add skip_call_tls_get_addr_ variable. (Target_aarch64::Relocate:tls_gd_to_le): New method. (Target_aarch64::Relocate:tls_ie_to_le): New method. (Target_aarch64::Relocate:tls_desc_gd_to_le): New method. (Target_aarch64::Relocate:tls_desc_gd_to_ie): New method. (Target_aarch64::got_tlsdesc_section): New method. (Target_aarch64::make_local_ifunc_plt_entry): New method. (Target_aarch64::define_tls_base_symbol): New method. (Target_aarch64::reserve_tlsdesc_entries): New method. (Target_aarch64::got_mod_index_entry): New method. (Target_aarch64::rela_tlsdesc_section): New method. (Target_aarch64::rela_irelative_section): New method. (Target_aarch64::Tlsdesc_info): New struct. (Target_aarch64::got_section): Create .got.plt space for IRELATIVE relocations and tlsdesc relocations. (Target_aarch64::optimize_tls_reloc): Implement method. (Output_data_plt_aarch64): Add member variables: tlsdesc_rel_, got_, got_irelative_, irelative_count_, tlsdesc_got_offset_. Initialize them in constructor. (Output_data_plt_aarch64::reserve_tlsdesc_entry): New method. (Output_data_plt_aarch64::has_tlsdesc_entry): New method. (Output_data_plt_aarch64::get_tlsdesc_got_offset): New method. (Output_data_plt_aarch64::get_tlsdesc_plt_offset): New method. (Output_data_plt_aarch64::rela_tlsdesc): New method. (Output_data_plt_aarch64::rela_irelative): New method. (Output_data_plt_aarch64::entry_count): Count IRELATIVE relocations. (Output_data_plt_aarch64::first_plt_entry_offset): Add const attribute. (Output_data_plt_aarch64::get_plt_tlsdesc_entry_size): New method. (Output_data_plt_aarch64::fill_tlsdesc_entry): New method. (Output_data_plt_aarch64::do_get_plt_tlsdesc_entry_size): New method. (Output_data_plt_aarch64::do_fill_tlsdesc_entry): New method. (Output_data_plt_aarch64_standard): New member variables: plt_tlsdesc_entry_size, tlsdesc_plt_entry. (Output_data_plt_aarch64_standard::Output_data_plt_aarch64_standard): New parameter: got, got_irelative. (Output_data_plt_aarch64_standard::do_get_plt_entry_size): New method. (Output_data_plt_aarch64_standard::do_fill_tlsdesc_entry): New method. (Output_data_plt_aarch64::do_write): Replace got_address with gotplt_address. Add irelative_count_ to count. Write tlsdesc entry. (AArch64_relocate_functions::update_movnz): New method. (AArch64_relocate_functions): Correct format. (AArch64_relocate_functions::movnz): New method. (Target_aarch64::Scan::local): Correct format. Move r_sym, got to before the switch. Add new cases to switch. Check ie_to_le relaxation on tlsie relocations. Add code handling tlsgd tlsdesc cases. (Target_aarch64::Scan::global): Move arp to front. Do copy_reloc when needed. Add new cases to switch. Insert dynamic RELATIVE relocation when needed. Add code handling tlsgd, tlsie, tlsdesc cases. Call reloc_name_in_error_message to print unsupported reloc. (Target_aarch64::make_plt_section): Pass got_ and got_irelative_ to make_data_plt. (Target_aarch64::do_finalize_sections): Emit relocs to save COPY relocs. Fill in some more dynamic tags. (Target_aarch64::Relocate::relocate): Handle tlsgd, tlsdesc relocs. Skip call tls_get_addr when tlsgd is relaxed. (Target_aarch64::Relocate::relocate_tls): Correct format. Add code handling tlsgd, tlsdesc relocs, and tls gd->le, ie->le, tlsdesc->le, tlsdesc->ie relaxation.
2014-09-15Add support for MIPS R6.Andrew Bennett2-0/+9
bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. (bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6. * elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2 R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elfn32-mips.c: Likewise. * elfxx-mips.c (MIPSR6_P): New define. (mipsr6_exec_plt_entry): New array. (hi16_reloc_p): Add support for R_MIPS_PCHI16. (lo16_reloc_p): Add support for R_MIPS_PCLO16. (aligned_pcrel_reloc_p): New function. (mips_elf_relocation_needs_la25_stub): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (mips_elf_calculate_relocation): Add support for relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6. (mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16. (_bfd_mips_elf_check_relocs): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (_bfd_mips_elf_relocate_section): Add a check for unaligned pc relative relocs. (_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6 plt entry. (mips_set_isa_flags): Add support for mips32r6 and mips64r6. (_bfd_mips_elf_print_private_bfd_data): Likewise. (mips_32bit_flags_p): Add support for mips32r6. * libbfd.h (bfd_reloc_code_real_names): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. binutils/ * readelf.c (get_machine_flags): Add support for mips32r6 and mips64r6. elfcpp/ * mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants. gas/ * config/tc-mips.c (mips_nan2008): New static global. (mips_flag_nan2008): Removed. (LL_SC_FMT): New define. (COP12_FMT): Updated. (ISA_IS_R6): New define. (ISA_HAS_64BIT_REGS): Add mips64r6. (ISA_HAS_DROR): Likewise. (ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_LEGACY_NAN): New define. (options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6. (mips_ase): Add field rem_rev. (mips_ases): Updated to add which ISA an ASE was removed in. (mips_isa_rev): Add support for mips32r6 and mips64r6. (mips_check_isa_supports_ase): Add support to check if an ASE has been removed in the specified MIPS ISA revision. (validate_mips_insn): Skip '-' character. (macro_build): Likewise. (mips_check_options): Prevent R6 working with fp32, mips16, micromips, or branch relaxation. (file_mips_check_options): Set R6 floating point registers to 64 bit. Also deal with the nan2008 option. (limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (match_check_prev_operand): New static function. (match_same_rs_rt_operand): New static function. (match_non_zero_reg_operand): New static function. (match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (insns_between): Added case to deal with forbidden slots. (append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2 and BFD_RELOC_MIPS_26_PCREL_S2. (match_insn): Add support for operands -A, -B, +' and +". Also skip '-' character. (mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo. (md_parse_option): Add support for mips32r6 and mips64r6. Also update the nan option handling. (md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2. (mips_force_relocation): Prevent forced relaxation for MIPS r6. (md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (s_mipsset): Add support for mips32r6 and mips64r6. (s_nan): Update to support the new nan2008 framework. (tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (mips_elf_final_processing): Updated to use the mips_nan2008. (mips_cpu_info_table): Add entries for mips32r6 and mips64r6. (macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref macros for R6. (mips_fix_adjustable): Make PC relative R6 relocations relative to the symbol and not the section. * configure.ac: Add support for mips32r6 and mips64r6. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/24k-triple-stores-1.s: If testing for r6 prevent non-supported instructions from being tested. * gas/mips/24k-triple-stores-2.s: Likewise. * gas/mips/24k-triple-stores-3.s: Likewise. * gas/mips/24k-triple-stores-6.s: Likewise. * gas/mips/beq.s: Likewise. * gas/mips/eva.s: Likewise. * gas/mips/ld-zero-3.s: Likewise. * gas/mips/mips32-cp2.s: Likewise. * gas/mips/mips32.s: Likewise. * gas/mips/mips4.s: Likewise. * gas/mips/add.s: Don't test the add instructions if r6, and add padding. * gas/mips/add.d: Check for a triple dot not a nop at the end of the disassembly output. * gas/mips/micromips@add.d: Likewise. * gas/mips/mipsr6@24k-branch-delay-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file. * gas/mips/mipsr6@24k-triple-stores-2.d: New file. * gas/mips/mipsr6@24k-triple-stores-3.d: New file. * gas/mips/mipsr6@24k-triple-stores-6.d: New file. * gas/mips/mipsr6@add.d: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file. * gas/mips/mipsr6@beq.d: New file. * gas/mips/mipsr6@bge.d: New file. * gas/mips/mipsr6@bgeu.d: New file. * gas/mips/mipsr6@blt.d: New file. * gas/mips/mipsr6@bltu.d: New file. * gas/mips/mipsr6@branch-misc-1.d: New file. * gas/mips/mipsr6@branch-misc-2-64.d: New file. * gas/mips/mipsr6@branch-misc-2pic-64.d: New file. * gas/mips/mipsr6@branch-misc-4-64.d: New file. * gas/mips/mipsr6@cache.d: New file. * gas/mips/mipsr6@eva.d: New file. * gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file. * gas/mips/mipsr6@jal-svr4pic.d: New file. * gas/mips/mipsr6@ld-zero-2.d: New file. * gas/mips/mipsr6@ld-zero-3.d: New file. * gas/mips/mipsr6@loc-swap-dis.d: New file. * gas/mips/mipsr6@mips32-cp2.d: New file. * gas/mips/mipsr6@mips32-imm.d: New file. * gas/mips/mipsr6@mips32.d: New file. * gas/mips/mipsr6@mips32r2.d: New file. * gas/mips/mipsr6@mips4-fp.d: New file. * gas/mips/mipsr6@mips4-fp.l: New file. * gas/mips/mipsr6@mips4-fp.s: New file. * gas/mips/mipsr6@mips4.d: New file. * gas/mips/mipsr6@mips5-fp.d: New file. * gas/mips/mipsr6@mips5-fp.l: New file. * gas/mips/mipsr6@mips5-fp.s: New file. * gas/mips/mipsr6@mips64.d: New file. * gas/mips/mipsr6@msa-branch.d: New file. * gas/mips/mipsr6@msa.d: New file. * gas/mips/mipsr6@pref.d: New file. * gas/mips/mipsr6@relax-swap3.d: New file. * gas/mips/r6-64-n32.d: New file. * gas/mips/r6-64-n64.d: New file. * gas/mips/r6-64-removed.l: New file. * gas/mips/r6-64-removed.s: New file. * gas/mips/r6-64.s: New file. * gas/mips/r6-attr-none-double.d: New file. * gas/mips/r6-n32.d: New file. * gas/mips/r6-n64.d: New file. * gas/mips/r6-removed.l: New file. * gas/mips/r6-removed.s: New file. * gas/mips/r6.d: New file. * gas/mips/r6.s: New file. * gas/mips/mipsr6@mips32-dsp.d: New file. * gas/mips/mipsr6@mips32-dspr2.d: New file. * gas/mips/mipsr6@mips32r2-ill.l: New file. * gas/mips/mipsr6@mips32r2-ill.s: New file. * gas/mips/cache.s: Add r6 instruction varients. * gas/mips/mips.exp: Add support for the mips32r6 and mips64r6 architectures. Also prevent non r6 supported tests from running. Finally, add in support for running the new r6 tests. (run_dump_test_arch): Add support for mipsr6 tests. (run_list_test_arch): Add support for using files of the form arch@testname.l . include/elf/ * mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (E_MIPS_ARCH_32R6): New define. (E_MIPS_ARCH_64R6): New define. include/opcode/ * mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (mips_check_prev_operand): New struct. (INSN2_FORBIDDEN_SLOT): New define. (INSN_ISA32R6): New define. (INSN_ISA64R6): New define. (INSN_UPTO32R6): New define. (INSN_UPTO64R6): New define. (mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6. (ISA_MIPS32R6): New define. (ISA_MIPS64R6): New define. (CPU_MIPS32R6): New define. (CPU_MIPS64R6): New define. (cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6. ld/ * ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6. opcodes/ * mips-dis.c (mips_arch_choices): Add entries for mips32r6 and mips64r6. (parse_mips_dis_option): Allow MSA and virtualization support for mips64r6. (mips_print_arg_state): Add fields dest_regno and seen_dest. (mips_seen_register): New function. (print_insn_arg): Refactored code to use mips_seen_register function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out the register rather than aborting. (print_insn_args): Add length argument. Add code to correctly calculate the instruction address for pc relative instructions. (validate_insn_args): New static function. (print_insn_mips): Prevent jalx disassembling for r6. Use validate_insn_args. (print_insn_micromips): Use validate_insn_args. all the arguments are valid. * mips-formats.h (PREV_CHECK): New define. * mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (RD_pc): New define. (FS): New define. (I37): New define. (I69): New define. (mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded MIPS R6 instructions from MIPS R2 instructions.
2014-09-02Make Elf_file::section_name() a const function, so that it can be used inCary Coutant2-4/+42
places where we have only a const Elf_file*. elfcpp/ * elfcpp_file.h (Elf_file::shnum): New const function. (Elf_file::shstrndx): New const function. (Elf_file::large_shndx_offset): New const function. (Elf_file::section_name): Add const attribute. (Elf_file::section_header_offset): Likewise. gold/ * dwp.cc (Sized_relobj_dwo::do_section_name): Add const attribute. * dynobj.h (Sized_dynobj::do_section_name): Likewise. * incremental.cc (Sized_relobj_incr::do_section_name): Likewise. (Sized_incr_dynobj::do_section_name): Likewise. * incremental.h (Sized_relobj_incr::do_section_name): Likewise. (Sized_incr_dynobj::do_section_name): Likewise. * object.h (Object::section_name): Likewise. (Object::do_section_name): Likewise. (Sized_relobj_file::do_section_name): Likewise. * plugin.cc (Sized_pluginobj::do_section_name): Likewise. * plugin.h (Sized_pluginobj::do_section_name): Likewise.
2014-08-08gold aarch64 patch to enable linking hello_wolrd.Jing Yu2-1/+5
elfcpp/ChangeLog: 2014-08-08 Han Shen <shenhan@google.com> * aarch64.h (withdrawn): Replaced with R_AARCH64_withdrawn. 2014-08-08 Jing Yu <jingyu@google.com> Han Shen <shenhan@google.com> * Makefile.am (HFILES): Add aarch64-reloc-property.h. (DEFFILES): add aarch64-reloc.def. (TARGETSOURCES): Add aarch64-reloc-property.cc. (ALL_TARGETOBJS): Add aarch64-reloc-property.$(OBJEXT). * Makefile.in: Regenerate. * aarch64-reloc-property.cc: New file. * aarch64-reloc-property.h: New file. * aarch64-reloc.def: New file. * aarch64.cc: Include aarch64-reloc-property.h. Replace spaces with tab to make the format consistent. (Output_data_got_aarch64::symbol_table_): New method. (Target_aarch64::do_plt_address_for_global): New method. (Target_aarch64::do_plt_address_for_local): New method. (Target_aarch64::do_select_as_default_target): New method. (Target_aarch64::do_make_data_plt): New method. (Target_aarch64::make_data_plt): New method. (Output_data_plt_aarch64::has_irelative_section): New method. (Output_data_plt_aarch64::address_for_global): New method. (Output_data_plt_aarch64::address_for_local): New method. (Output_data_plt_aarch64::irelative_rel_): New parameter. (Output_data_plt_aarch64::add_entry): Implement contents. (Output_data_plt_aarch64::set_final_data_size): Fix typo. (Output_data_plt_aarch64::do_write): Remove useless got_base. Set the got_pov entry to plt0. (Output_data_plt_aarch64_standard::do_fill_first_plt_entry): Implement contents. (Output_data_plt_aarch64_standard::do_fill_plt_entry): Implement. (AArch64_howto): New struct. (aarch64_howto[]): New static const array. (AArch64_relocate_functions): New class. (Target_aarch64::Scan::get_reference_flags): Remove method. (Target_aarch64::Scan::local): Implement to support a few relocations. (Target_aarch64::Scan::global): Implement to support a few relocations. (Target_aarch64::make_plt_section): Implement contents. (Target_aarch64::make_plt_entry): Implement contents. (Target_aarch64::do_finalize_sections): Implement contents. (Target_aarch64::Relocate::relocate): Implement a few relocations. (Target_aarch64::relocate_section): Implement contents.
2014-07-29[MIPS] Implement O32 FPXX, FP64 and FP64A ABI extensionsMatthew Fortune2-0/+6
Specification: https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking include/ * elf/mips.h (PT_MIPS_ABIFLAGS, SHT_MIPS_ABIFLAGS): Define. (Val_GNU_MIPS_ABI_FP_OLD_64): Rename from Val_GNU_MIPS_ABI_FP_64. (Val_GNU_MIPS_ABI_FP_64): Redefine. (Val_GNU_MIPS_ABI_FP_XX): Define. (Elf_External_ABIFlags_v0, Elf_Internal_ABIFlags_v0): New structures. (AFL_REG_NONE, AFL_REG_32, AFL_REG_64, AFL_REG_128): Define. (AFL_ASE_DSP, AFL_ASE_DSPR2, AFL_ASE_EVA, AFL_ASE_MCU): Likewise. (AFL_ASE_MDMX, AFL_ASE_MIPS3D, AFL_ASE_MT, AFL_ASE_SMARTMIPS): Likewise. (AFL_ASE_VIRT, AFL_ASE_MSA, AFL_ASE_MIPS16): Likewise. (AFL_ASE_MICROMIPS, AFL_ASE_XPA): Likewise. (AFL_EXT_XLR, AFL_EXT_OCTEON2, AFL_EXT_OCTEONP): Likewise. (AFL_EXT_LOONGSON_3A, AFL_EXT_OCTEON, AFL_EXT_5900): Likewise. (AFL_EXT_4650, AFL_EXT_4010, AFL_EXT_4100, AFL_EXT_3900): Likewise. (AFL_EXT_10000, AFL_EXT_SB1, AFL_EXT_4111, AFL_EXT_4120): Likewise. (AFL_EXT_5400, AFL_EXT_5500, AFL_EXT_LOONGSON_2E): Likewise. (AFL_EXT_LOONGSON_2F): Likewise. (bfd_mips_elf_swap_abiflags_v0_in): Prototype. (bfd_mips_elf_swap_abiflags_v0_out): Likewise. (bfd_mips_isa_ext): Likewise. bfd/ * elfxx-mips.c (ABI_O32_P, MIPS_ELF_ABIFLAGS_SECTION_NAME_P): New macro. (mips_elf_obj_tdata): Add abiflags and abiflags_valid fields. (bfd_mips_elf_swap_abiflags_v0_in): New function. (bfd_mips_elf_swap_abiflags_v0_out): Likewise. (_bfd_mips_elf_section_from_shdr): Handle SHT_MIPS_ABIFLAGS. (_bfd_mips_elf_fake_sections): Likewise. (_bfd_mips_elf_always_size_sections): Handle .MIPS.abiflags. (_bfd_mips_elf_additional_program_headers): Account for new PT_MIPS_ABIFLAGS program header. (_bfd_mips_elf_modify_segment_map): Create PT_MIPS_ABIFLAGS segment and associate with .MIPS.abiflags. (_bfd_mips_elf_gc_mark_extra_sections): New function. (bfd_mips_isa_ext, update_mips_abiflags_isa): New static function. (infer_mips_abiflags): Likewise. (_bfd_mips_elf_final_link): Handle .MIPS.abiflags. (mips_32bit_flags_p): Moved higher. (mips_elf_merge_obj_attributes, _bfd_mips_fp_abi_string): Error checking for FP ABIs. (_bfd_mips_elf_merge_private_bfd_data): Restructure and add abiflags checks. Check EF_MIPS_FP64 flag consistency. (print_mips_ases, print_mips_isa_ext): New static function. (print_mips_fp_abi_value, get_mips_reg_size): Likewise. (_bfd_mips_elf_print_private_bfd_data): Display abiflags data. (_bfd_mips_post_process_headers): Set EI_ABIVERSION = 3 for Val_GNU_MIPS_ABI_FP_64 or Val_GNU_MIPS_ABI_FP_64A. * elfxx-mips.h (_bfd_mips_elf_gc_mark_extra_sections): New prototype. * elf32-mips.c (elf_backend_gc_mark_extra_sections): Implement. * elfn32-mips.c (elf_backend_gc_mark_extra_sections): Implement. * elf64-mips.c (elf_backend_gc_mark_extra_sections): Implement. binutils/ * readelf.c (get_mips_segment_type): Display name for PT_MIPS_ABIFLAGS. (get_mips_section_type_name): Display name for SHT_MIPS_ABIFLAGS. (display_mips_gnu_attribute): Abstracted fp abi printing to... (print_mips_fp_abi_value): New static function. Handle new FP ABIs. (print_mips_ases, print_mips_isa_ext): New static functions. (get_mips_reg_size): Likewise. (process_mips_specific): Display abiflags data. elfcpp/ * elfcpp.h (PT_MIPS_ABIFLAGS): New program header type. gas/ * config/tc-mips.c (mips_flags_frag): New static global. (struct mips_set_options): Add oddspreg field. (file_mips_opts, mips_opts): Initialize oddspreg. (ISA_HAS_ODD_SINGLE_FPR): Add CPU argument and update for R5900 and Loongson-3a. (enum options, md_longopts, md_parse_option): Add -mfpxx, -modd-spreg and -mno-odd-spreg options. (md_begin): Create .MIPS.abiflags section. (fpabi_incompatible_with, fpabi_requires): New static function. (check_fpabi): Likewise. (mips_check_options): Handle fp=xx and oddspreg restrictions. (file_mips_check_options): Set oddspreg by default for fp=xx. (mips_oddfpreg_ok): Re-write function. (check_regno): Check odd numbered registers regardless of FPR size. For fp != 32 use as_bad instead of as_warn. (match_float_constant): Rewrite check regarding FP register width. Add support for generating constants when MXHC1 is present. Handle fp=xx to comply with the ABI. (macro): Update M_LI_DD similarly to match_float_constant. Generate MTHC1 when available. Check that correct code can be generated for fp=xx and fp=64 ABIs. (parse_code_option, s_mipsset): Add fp=xx, oddspreg and nooddspreg options. (mips_convert_ase_flags): New static function. (mips_elf_final_processing): Use fpabi == Val_GNU_MIPS_ABI_FP_OLD_64 to determine when to add the EF_MIPS_FP64 flag. Populate the .MIPS.abiflags section. (md_mips_end): Update .gnu_attribute based on command line and .module as applicable. Use check_fpabi to ensure .gnu.attribute and command line/.module options are consistent. * doc/as.texinfo: Add missing -mgp64/-mfp64 options and document new -mfpxx, -modd-spreg and -mno-odd-spreg options. * doc/c-mips.texi: Document -mfpxx, -modd-spreg, -mno-odd-spreg, gnu_attribute values and FP ABIs. ld/ * emulparams/elf32bmip.sh: Add .MIPS.abiflags. * emulparams/elf32bmipn32-defs.sh: Likewise. * emulparams/elf64bmip-defs.sh: Likewise. opcodes/ * micromips-opc.c (COD, LCD) New macros. (cfc1, ctc1): Remove FP_S attribute. (dmfc1, mfc1, mfhc1): Add LCD attribute. (dmtc1, mtc1, mthc1): Add COD attribute. * mips-opc.c (cfc1, cftc1, ctc, cttc1): Remove FP_S attribute. binutils/testsuite/ * binutils-all/readelf.s: Account for .MIPS.abiflags and .gnu.attributes. * binutils-all/readelf.ss-tmips: Likewise. * binutils-all/strip-3.d: Likewise. gas/testsuite/ * gas/mips/attr-gnu-4-0.d: New. * gas/mips/attr-gnu-4-0.s: Likewise. * gas/mips/attr-gnu-4-1-mfp32.l: Likewise. * gas/mips/attr-gnu-4-1-mfp32.s: Likewise. * gas/mips/attr-gnu-4-1-mfp64.l: Likewise. * gas/mips/attr-gnu-4-1-mfp64.s: Likewise. * gas/mips/attr-gnu-4-1-mfpxx.s: Likewise. * gas/mips/attr-gnu-4-1-msingle-float.l: Likewise. * gas/mips/attr-gnu-4-1-msingle-float.s: Likewise. * gas/mips/attr-gnu-4-1-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-1-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-1.d: Likewise. * gas/mips/attr-gnu-4-1.s: Likewise. * gas/mips/attr-gnu-4-2-mdouble-float.l: Likewise. * gas/mips/attr-gnu-4-2-mdouble-float.s: Likewise. * gas/mips/attr-gnu-4-2-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-2-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-2.d: Likewise. * gas/mips/attr-gnu-4-2.s: Likewise. * gas/mips/attr-gnu-4-3-mhard-float.l: Likewise. * gas/mips/attr-gnu-4-3-mhard-float.s: Likewise. * gas/mips/attr-gnu-4-3.d: Likewise. * gas/mips/attr-gnu-4-3.s: Likewise. * gas/mips/attr-gnu-4-4.l: Likewise. * gas/mips/attr-gnu-4-4.s: Likewise. * gas/mips/attr-gnu-4-5-64.l: Likewise. * gas/mips/attr-gnu-4-5-64.s: Likewise. * gas/mips/attr-gnu-4-5.d: Likewise. * gas/mips/attr-gnu-4-5.l: Likewise. * gas/mips/attr-gnu-4-5.s: Likewise. * gas/mips/attr-gnu-4-6-64.l: Likewise. * gas/mips/attr-gnu-4-6-64.s: Likewise. * gas/mips/attr-gnu-4-6.d: Likewise. * gas/mips/attr-gnu-4-6.l: Likewise. * gas/mips/attr-gnu-4-6.s: Likewise. * gas/mips/attr-gnu-4-6-msingle-float.l: Likewise. * gas/mips/attr-gnu-4-6-msingle-float.s: Likewise. * gas/mips/attr-gnu-4-6-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-6-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-6-noodd.l: Likewise. * gas/mips/attr-gnu-4-6-noodd.s: Likewise. * gas/mips/attr-gnu-4-7-64.l: Likewise. * gas/mips/attr-gnu-4-7-64.s: Likewise. * gas/mips/attr-gnu-4-7-msingle-float.l: Likewise. * gas/mips/attr-gnu-4-7-msingle-float.s: Likewise. * gas/mips/attr-gnu-4-7-msoft-float.l: Likewise. * gas/mips/attr-gnu-4-7-msoft-float.s: Likewise. * gas/mips/attr-gnu-4-7-odd.l: Likewise. * gas/mips/attr-gnu-4-7-odd.s: Likewise. * gas/mips/attr-gnu-4-7.d: Likewise. * gas/mips/attr-gnu-4-7.l: Likewise. * gas/mips/attr-gnu-4-7.s: Likewise. * gas/mips/attr-none-double.d: Likewise. * gas/mips/attr-none-o32-fp64.d: Likewise. * gas/mips/attr-none-o32-fp64-nooddspreg.d * gas/mips/attr-none-o32-fpxx.d: Likewise. * gas/mips/attr-none-single-float.d: Likewise. * gas/mips/attr-none-soft-float.d: Likewise. * gas/mips/elf_arch_mips32r3.d: Likewise. * gas/mips/elf_arch_mips32r5.d: Likewise. * gas/mips/elf_arch_mips64r3.d: Likewise. * gas/mips/elf_arch_mips64r5.d: Likewise. * gas/mips/li-d.d: Likewise. * gas/mips/li-d.s: Likewise. * gas/mips/module-check-warn.l: Likewise. * gas/mips/module-check-warn.s: Likewise. * gas/mips/module-check.d: Likewise. * gas/mips/module-check.s: Likewise. * gas/mips/module-mfp32.d: Likewise. * gas/mips/module-mfp32.s: Likewise. * gas/mips/module-mfp64.d: Likewise. * gas/mips/module-mfp64.s: Likewise. * gas/mips/module-mfp64-noodd.d: Likewise. * gas/mips/module-mfp64-noodd.s: Likewise. * gas/mips/module-mfpxx.d: Likewise. * gas/mips/module-mfpxx.s: Likewise. * gas/mips/module-msingle-float.d: Likewise. * gas/mips/module-msingle-float.s: Likewise. * gas/mips/module-msoft-float.d: Likewise. * gas/mips/module-msoft-float.s: Likewise. * gas/mips/module-set-mfpxx.d: Likewise. * gas/mips/module-set-mfpxx.s: Likewise. * gas/mips/fpxx-oddfpreg.d: Likewise. * gas/mips/fpxx-oddfpreg.l: Likewise. * gas/mips/fpxx-oddfpreg.s: Likewise. * gas/mips/no-odd-spreg.d: Likewise. * gas/mips/odd-spreg.d: Likewise. * gas/elf/section2.e-mips: Adjust expected output. * gas/mips/attr-gnu-abi-fp-1.d: Likewise. * gas/mips/attr-gnu-abi-msa-1.d: Likewise. * gas/mips/call-nonpic-1.d: Likewise. * gas/mips/elf_arch_mips1.d: Likewise. * gas/mips/elf_arch_mips2.d: Likewise. * gas/mips/elf_arch_mips3.d: Likewise. * gas/mips/elf_arch_mips32.d: Likewise. * gas/mips/elf_arch_mips32r2.d: Likewise. * gas/mips/elf_arch_mips4.d: Likewise. * gas/mips/elf_arch_mips5.d: Likewise. * gas/mips/elf_arch_mips64.d: Likewise. * gas/mips/elf_arch_mips64r2.d: Likewise. * gas/mips/elf_ase_micromips-2.d: Likewise. * gas/mips/elf_ase_micromips.d: Likewise. * gas/mips/elf_ase_mips16-2.d: Likewise. * gas/mips/elf_ase_mips16.d: Likewise. * gas/mips/module-defer-warn1.d: Likewise. * gas/mips/module-override.d: Likewise. * gas/mips/n32-consec.d: Likewise. * gas/mips/nan-2008-1.d: Likewise. * gas/mips/nan-2008-2.d: Likewise. * gas/mips/nan-2008-3.d: Likewise. * gas/mips/nan-2008-4.d: Likewise. * gas/mips/nan-legacy-1.d: Likewise. * gas/mips/nan-legacy-2.d: Likewise. * gas/mips/nan-legacy-3.d: Likewise. * gas/mips/nan-legacy-4.d: Likewise. * gas/mips/nan-legacy-5.d: Likewise. * gas/mips/tmips16-e.d: Likewise. * gas/mips/tmips16-f.d: Likewise. * gas/mips/tmipsel16-e.d: Likewise. * gas/mips/tmipsel16-f.d: Likewise. * gas/testsuite/gas/mips/mips.exp: Add new tests. ld/testsuite/ * ld-mips-elf/abiflags-strip1-ph.d: New. * ld-mips-elf/abiflags-strip2-ph.d: Likewise. * ld-mips-elf/abiflags-strip3-ph.d: Likewise. * ld-mips-elf/abiflags-strip4-ph.d: Likewise. * ld-mips-elf/abiflags-strip5-ph.d: Likewise. * ld-mips-elf/abiflags-strip6-ph.d: Likewise. * ld-mips-elf/abiflags-strip7-ph.d: Likewise. * ld-mips-elf/abiflags-strip8-ph.d: Likewise. * ld-mips-elf/abiflags-strip9-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-0-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-0-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-0-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-06.d: Likewise. * ld-mips-elf/attr-gnu-4-07.d: Likewise. * ld-mips-elf/attr-gnu-4-08.d: Likewise. * ld-mips-elf/attr-gnu-4-1-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-1-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-1-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-16.d: Likewise. * ld-mips-elf/attr-gnu-4-17.d: Likewise. * ld-mips-elf/attr-gnu-4-18.d: Likewise. * ld-mips-elf/attr-gnu-4-2-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-2-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-2-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-26.d: Likewise. * ld-mips-elf/attr-gnu-4-27.d: Likewise. * ld-mips-elf/attr-gnu-4-28.d: Likewise. * ld-mips-elf/attr-gnu-4-3-n32-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-3-n64-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-3-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-36.d: Likewise. * ld-mips-elf/attr-gnu-4-37.d: Likewise. * ld-mips-elf/attr-gnu-4-38.d: Likewise. * ld-mips-elf/attr-gnu-4-4-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-46.d: Likewise. * ld-mips-elf/attr-gnu-4-47.d: Likewise. * ld-mips-elf/attr-gnu-4-48.d: Likewise. * ld-mips-elf/attr-gnu-4-5-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-50.d: Likewise. * ld-mips-elf/attr-gnu-4-52.d: Likewise. * ld-mips-elf/attr-gnu-4-53.d: Likewise. * ld-mips-elf/attr-gnu-4-54.d: Likewise. * ld-mips-elf/attr-gnu-4-55.d: Likewise. * ld-mips-elf/attr-gnu-4-56.d: Likewise. * ld-mips-elf/attr-gnu-4-57.d: Likewise. * ld-mips-elf/attr-gnu-4-58.d: Likewise. * ld-mips-elf/attr-gnu-4-6-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-6.s: Likewise. * ld-mips-elf/attr-gnu-4-60.d: Likewise. * ld-mips-elf/attr-gnu-4-61.d: Likewise. * ld-mips-elf/attr-gnu-4-62.d: Likewise. * ld-mips-elf/attr-gnu-4-63.d: Likewise. * ld-mips-elf/attr-gnu-4-64.d: Likewise. * ld-mips-elf/attr-gnu-4-65.d: Likewise. * ld-mips-elf/attr-gnu-4-66.d: Likewise. * ld-mips-elf/attr-gnu-4-67.d: Likewise. * ld-mips-elf/attr-gnu-4-68.d: Likewise. * ld-mips-elf/attr-gnu-4-7-ph.d: Likewise. * ld-mips-elf/attr-gnu-4-7.s: Likewise. * ld-mips-elf/attr-gnu-4-70.d: Likewise. * ld-mips-elf/attr-gnu-4-71.d: Likewise. * ld-mips-elf/attr-gnu-4-72.d: Likewise. * ld-mips-elf/attr-gnu-4-73.d: Likewise. * ld-mips-elf/attr-gnu-4-74.d: Likewise. * ld-mips-elf/attr-gnu-4-75.d: Likewise. * ld-mips-elf/attr-gnu-4-76.d: Likewise. * ld-mips-elf/attr-gnu-4-77.d: Likewise. * ld-mips-elf/attr-gnu-4-78.d: Likewise. * ld-mips-elf/attr-gnu-4-8.s: Likewise. * ld-mips-elf/attr-gnu-4-81.d: Likewise. * ld-mips-elf/empty.s: Likewise. * ld-mips-elf/attr-gnu-4-00.d: Adjust expected output. * ld-mips-elf/attr-gnu-4-01.d: Likewise. * ld-mips-elf/attr-gnu-4-02.d: Likewise. * ld-mips-elf/attr-gnu-4-03.d: Likewise. * ld-mips-elf/attr-gnu-4-04.d: Likewise. * ld-mips-elf/attr-gnu-4-05.d: Likewise. * ld-mips-elf/attr-gnu-4-10.d: Likewise. * ld-mips-elf/attr-gnu-4-11.d: Likewise. * ld-mips-elf/attr-gnu-4-14.d: Likewise. * ld-mips-elf/attr-gnu-4-15.d: Likewise. * ld-mips-elf/attr-gnu-4-2.s: Likewise. * ld-mips-elf/attr-gnu-4-20.d: Likewise. * ld-mips-elf/attr-gnu-4-22.d: Likewise. * ld-mips-elf/attr-gnu-4-24.d: Likewise. * ld-mips-elf/attr-gnu-4-25.d: Likewise. * ld-mips-elf/attr-gnu-4-3.s: Likewise. * ld-mips-elf/attr-gnu-4-30.d: Likewise. * ld-mips-elf/attr-gnu-4-33.d: Likewise. * ld-mips-elf/attr-gnu-4-34.d: Likewise. * ld-mips-elf/attr-gnu-4-35.d: Likewise. * ld-mips-elf/attr-gnu-4-40.d: Likewise. * ld-mips-elf/attr-gnu-4-41.d: Likewise. * ld-mips-elf/attr-gnu-4-42.d: Likewise. * ld-mips-elf/attr-gnu-4-43.d: Likewise. * ld-mips-elf/attr-gnu-4-44.d: Likewise. * ld-mips-elf/attr-gnu-4-45.d: Likewise. * ld-mips-elf/attr-gnu-4-5.s: Likewise. * ld-mips-elf/attr-gnu-4-51.d: Likewise. * ld-mips-elf/attr-gnu-8-00.d: Likewise. * ld-mips-elf/attr-gnu-8-01.d: Likewise. * ld-mips-elf/attr-gnu-8-02.d: Likewise. * ld-mips-elf/attr-gnu-8-10.d: Likewise. * ld-mips-elf/attr-gnu-8-11.d: Likewise. * ld-mips-elf/attr-gnu-8-20.d: Likewise. * ld-mips-elf/attr-gnu-8-22.d: Likewise. * ld-mips-elf/jalx-2.dd: Likewise. * ld-mips-elf/mips16-pic-1.gd: Likewise. * ld-mips-elf/mips16-pic-2.gd: Likewise. * ld-mips-elf/mips16-pic-3.gd: Likewise. * ld-mips-elf/mips16-pic-4a.gd: Likewise. * ld-mips-elf/multi-got-no-shared.d: Likewise. * ld-mips-elf/nan-2008.d: Likewise. * ld-mips-elf/nan-legacy.d: Rework test. * ld-mips-elf/pic-and-nonpic-3a.gd: Likewise. * ld-mips-elf/pic-and-nonpic-3b.gd: Likewise. * ld-mips-elf/pic-and-nonpic-5b.gd: Likewise. * ld-mips-elf/pic-and-nonpic-6.ld: Likewise. * ld-mips-elf/rel32-n32.d: Likewise. * ld-mips-elf/rel32-o32.d: Likewise. * ld-mips-elf/rel64.d: Likewise. * ld-mips-elf/tls-multi-got-1.r: Likewise. * ld-elf/group.ld: Discard .MIPS.abiflags and .gnu.attributes. * ld-elf/orphan-region.ld: Likewise. * ld-elf/orphan.ld: Likewise. * ld-mips-elf/compressed-plt-1.ld: Likewise. * ld-mips-elf/dyn-sec64.ld: Likewise. * ld-mips-elf/got-dump-1.ld: Likewise. * ld-mips-elf/got-dump-2.ld: Likewise. * ld-mips-elf/got-page-1.ld: Likewise. * ld-mips-elf/mips-dyn.ld: Likewise. * ld-mips-elf/mips-lib.ld: Likewise. * ld-mips-elf/pic-and-nonpic-3a.ld: Likewise. * ld-mips-elf/pic-and-nonpic-3b.ld: Likewise. * ld-mips-elf/pic-and-nonpic-4b.ld: Likewise. * ld-mips-elf/pic-and-nonpic-5b.ld: Likewise. * ld-mips-elf/region1.t: Likewise. * ld-mips-elf/stub-dynsym-1.ld: Likewise. * ld-mips-elf/tls-hidden3.ld: Likewise. * ld-mips-elf/vxworks1.ld: Likewise. * ld-scripts/overlay-size.t: Likewise. * ld-mips-elf/elf-rel-got-n32-embed.d: Remove .MIPS.abiflags from objects. * ld-mips-elf/elf-rel-got-n32.d: Likewise. * ld-mips-elf/elf-rel-got-n64-embed.d: Likewise. * ld-mips-elf/elf-rel-got-n64-linux.d: Likewise. * ld-mips-elf/elf-rel-got-n64.d: Likewise. * ld-mips-elf/elf-rel-xgot-n32.d: Likewise. * ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise. * ld-mips-elf/mips-elf.exp: Add new tests.
2014-07-022014-07-02 Jing Yu <jingyu@google.com>Jing Yu3-1/+198
Initial patch to enable gold aarch64 backend. This patch is just a skeleton which almost does nothing. It does not support ILP32 now. gold/ChangeLog: * aarch64.cc: New file * Makefile.am (TARGETSOURCES): Add aarch64.cc (ALL_TARGETOBJS): Add aarch64.$(OBJEXT) * Makefile.in: Regenerate. * configure.tgt: Add entries for aarch64*. * configure.ac: Likewise. * configure: Likewise. elfcpp/ChangeLog: * aarch64.h: New file. New enums for aarch64-elf64 relocations. * elfcpp.h (EM_AARCH64, SHT_AARCH64_ATTRIBUTES, PT_AARCH64_ARCHEXT, PT_AARCH64_UNWIND): New enum constant.
2014-06-23gold/Sasa Stankovic1-1/+1
* mips.cc: New file. * Makefile.am (TARGETSOURCES): Add mips.cc (ALL_TARGETOBJS): Add mips.$(OBJEXT) * configure.tgt: Add entries for mips*. * configure.ac: Likewise. * Makefile.in: Regenerate. * configure: Likewise.
2014-04-22Remove support for the (deprecated) openrisc and or32 configurations and replaceChristian Svensson2-2/+6
with support for the new or1k configuration.
2014-04-152014-04-15 Sasa Stankovic <Sasa.Stankovic@imgtec.com>Cary Coutant3-19/+159
elfcpp/ * mips.h (R _MIPS16_TLS_GD, R_MIPS16_TLS_LDM, R_MIPS16_TLS_DTPREL_HI16, R_MIPS16_TLS_DTPREL_LO16, R_MIPS16_TLS_GOTTPREL, R_MIPS16_TLS_TPREL_HI16, R_MIPS16_TLS_TPREL_LO16, R_MICROMIPS_26_S1, R_MICROMIPS_HI16, R_MICROMIPS_LO16, R_MICROMIPS_GPREL16, R_MICROMIPS_LITERAL, R_MICROMIPS_GOT16, R_MICROMIPS_PC7_S1, R_MICROMIPS_PC10_S1, R_MICROMIPS_PC16_S1, R_MICROMIPS_CALL16, R_MICROMIPS_GOT_DISP, R_MICROMIPS_GOT_PAGE, R_MICROMIPS_GOT_OFST, R_MICROMIPS_GOT_HI16, R_MICROMIPS_GOT_LO16, R_MICROMIPS_SUB, R_MICROMIPS_HIGHER, R_MICROMIPS_HIGHEST, R_MICROMIPS_CALL_HI16, R_MICROMIPS_CALL_LO16, R_MICROMIPS_SCN_DISP, R_MICROMIPS_JALR, R_MICROMIPS_HI0_LO16, R_MICROMIPS_TLS_GD, R_MICROMIPS_TLS_LDM, R_MICROMIPS_TLS_DTPREL_HI16, R_MICROMIPS_TLS_DTPREL_LO16, R_MICROMIPS_TLS_GOTTPREL, R_MICROMIPS_TLS_TPREL_HI16, R_MICROMIPS_TLS_TPREL_LO16, R_MICROMIPS_GPREL7_S2, R_MICROMIPS_PC23_S20, R_MIPS_EH): New enums for relocations (mips16 and micromips). (STO_MIPS_FLAGS): New enum constant. (elf_st_is_mips16): New function. (elf_st_is_micromips): New function. (is_micromips): New function. (abi_n32): New function. (abi_n64): New function. (ODK_NULL, ODK_REGINFO, ODK_EXCEPTIONS, ODK_PAD, ODK_HWPATCH, ODK_FILL, ODK_TAGS, ODK_HWAND, ODK_HWOR, ODK_GP_GROUP, ODK_IDENT): New enum constants. * elfcpp.h (SHT_MIPS_OPTIONS): New enum constant.
2014-03-05Update copyright yearsAlan Modra14-15/+18
2014-03-05Support R_PPC64_ADDR64_LOCALAlan Modra2-0/+6
This adds support for "func@localentry", an expression that returns the ELFv2 local entry point address of function "func". I've excluded dynamic relocation support because that obviously would require glibc changes. include/elf/ * ppc64.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define. bfd/ * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_ADDR64_LOCAL entry. (ppc64_elf_reloc_type_lookup): Support R_PPC64_ADDR64_LOCAL. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * Add BFD_RELOC_PPC64_ADDR64_LOCAL. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-ppc.c (ppc_elf_suffix): Support @localentry. (md_apply_fix): Support R_PPC64_ADDR64_LOCAL. ld/testsuite/ * ld-powerpc/elfv2-2a.s, ld-powerpc/elfv2-2b.s: New files. * ld-powerpc/elfv2-2exe.d, ld-powerpc/elfv2-2so.d: New files. * ld-powerpc/powerpc.exp: Run new test. elfcpp/ * powerpc.h (R_PPC64_REL24_NOTOC, R_PPC64_ADDR64_LOCAL): Define. gold/ * powerpc.cc (Target_powerpc::Scan::local, global): Support R_PPC64_ADDR64_LOCAL. (Target_powerpc::Relocate::relocate): Likewise.
2014-02-06binutils/ChangeLog:Andrew Pinski2-0/+5
2014-02-06 Andrew Pinski <apinski@cavium.com> * readelf.c (get_machine_flags): Handle E_MIPS_MACH_OCTEON3 case. elfcpp/ChangeLog: 2014-02-06 Andrew Pinski <apinski@cavium.com> * mips.h (E_MIPS_MACH_OCTEON3): New enum constant. include/elf/ChangeLog: 2014-02-06 Andrew Pinski <apinski@cavium.com> * mips.h (E_MIPS_MACH_OCTEON3): New machine flag.
2013-11-18Add R_X86_64_PC32_BND/R_X86_64_PLT32_BND suppor to goldH.J. Lu2-0/+7
elfcpp/ * x86_64.h (R_X86_64_PC32_BND): New. (R_X86_64_PLT32_BND): Likewise. gold/ * x86_64.cc (Target_x86_64<size>::Scan::get_reference_flags): Handle R_X86_64_PC32_BND and R_X86_64_PLT32_BND just like R_X86_64_PC32 and R_X86_64_PLT32, respectively. (Target_x86_64<size>::Scan::local): Likewise. (Target_x86_64<size>::Scan::global): Likewise. (Target_x86_64<size>::Relocate::relocate): Likewise. (Target_x86_64<size>::Relocatable_size_for_reloc::get_size_for_reloc): Likewise. (Target_x86_64<size>::Scan::check_non_pic(): Handle R_X86_64_PC32_BND. * testsuite/Makefile.am (check_PROGRAMS): Add exception_x86_64_bnd_test. (exception_x86_64_bnd_test_SOURCES): New macro. (exception_x86_64_bnd_test_DEPENDENCIES): Likewise. (exception_x86_64_bnd_test_LDFLAGS): Likewise. (exception_x86_64_bnd_test_LDADD): Likewise. (exception_x86_64_bnd_1.o): New rule. (exception_x86_64_bnd_2.o): Likewise. * testsuite/Makefile.in: Regenerated.
2013-10-30PowerPC64 ELFv2 support for gold.Alan Modra2-1/+61
elfcpp/ * powerpc.h (EF_PPC64_ABI): New enum constant. (STO_PPC64_LOCAL_BIT, STO_PPC64_LOCAL_MASK): Likewise. (ppc64_decode_local_entry): New function. (ppc64_encode_local_entry): Likewise. gold/ * powerpc.cc (Powerpc_relobj::abiversion, set_abiversion, ppc64_local_entry_offset, ppc64_local_entry_offset, do_read_symbols): New functions. (Powerpc_relobj::e_flags_, st_other_): New vars. (Powerpc_relobj::Powerpc_relobj): Call set_abiversion. (Powerpc_dynobj::abiversion, set_abiversion): New functions. (Powerpc_relobj::e_flags_): New var. (Target_powerpc::first_plt_entry_offset, plt_entry_size): Inline and adjust for ELFv2. (Target_powerpc::abiversion, set_abiversion, stk_toc): New functions. (Powerpc_relobj::do_find_special_sections): Check no .opd in ELFv2. (Powerpc_dynobj::do_find_special_sections): Likewise. (Target_powerpc::do_define_standard_symbols): Define ".TOC.". (Target_powerpc::Branch_info::make_stub): Adjust stub destination to ELFv2 local entry. (Target_powerpc::do_relax): No thread safe barriers needed for ELFv2. (Output_data_plt_powerpc::initial_plt_entry_size_, plt_entry_size): Delete. Replace all uses with first_plt_entry_offset() and plt_entry_size(). (Output_data_plt_powerpc::Output_data_plt_powerpc): Remove reserved_size parm. Update callers. (Output_data_plt_powerpc::entry_count): Update. (Output_data_plt_powerpc::first_plt_entry_offset): Make private and use Target_powerpc::first_plt_entry_offset(). (Output_data_plt_powerpc::get_plt_entry_size): Similarly and rename to plt_entry_size. (Output_data_plt_powerpc::add_ifunc_entry, add_local_ifunc_entry): Adjust reloc for ELFv2. (glink_eh_frame_fde_64): Rename to glink_eh_frame_fde_64v1. (glink_eh_frame_fde_64v2): New. (Stub_table::plt_call_size): Support ELFv2 sizing. (Output_data_glink::add_eh_frame): Use the new FDE. (Output_data_glink::set_final_data_size): Adjust for ELFv2 glink. (Stub_table::do_write): Write ELFv2 stubs and glink. (Target_powerpc::Relocate::relocate): Replaces nop after call with ld 2,24(1) and adjust local offset destination for ELFv2.
2013-10-30Report overflow on PowerPC64 @h and @ha relocations.Alan Modra2-0/+12
This changes the behaviour of @h and @ha on PowerPC64 to report errors on 32-bit overflow. The motivation for this change is that on PowerPC64, most uses of @h and @ha modifiers and their corresponding relocations are to build up 32-bit offsets. We'd like to know when such offsets overflow. Only rarely do people use @h or @ha with the high 32-bit modifiers to build a 64-bit constant. Those uses will now need to use two new modifiers, @high and @higha, if the constant isn't known at assembly time. For now, we won't report overflow at assembly time.. This also fixes an error when applying some of the HIGHER and HIGHEST relocations. include/elf/ * ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA, R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA, R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New. (IS_PPC64_TLS_RELOC): Match new tls relocs. bfd/ * reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA, BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA, BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New. * elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs. Make all _HA and _HI relocs report signed overflow. (ppc64_elf_reloc_type_lookup): Handle new relocs. (must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise. (dec_dynrel_count, ppc64_elf_relocate_section): Likewise. (ppc64_elf_relocate_section): Don't apply 0x8000 adjust to R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST, R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ * config/tc-ppc.c (SEX16): Don't mask. (REPORT_OVERFLOW_HI): Define as zero. (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha, @tprel@high, and @tprel@higha modifiers. (md_assemble): Ignore X_unsigned when applying 16-bit insn fields. Add (disabled) code to check @h and @ha reloc overflow for powerpc64. Handle new relocs. (md_apply_fix): Similarly. elfcpp/ * powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA, R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA, R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define. gold/ * powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs. (Target_powerpc::Scan::global, local): Likewise. (Target_powerpc::Relocate::relocate): Likewise. Check for overflow on all ppc64 @h and @ha relocs.
2013-03-01elfcpp/Cary Coutant2-38/+59
* dwarf.h (enum DW_LANG): Adjust spacing for consistency. (enum DW_SECT): New enum type.
2012-12-17Add copyright noticesNick Clifton2-0/+11
2012-12-10Add copyright noticesNick Clifton1-1/+13
2012-10-30bfd:Nick Clifton2-1/+13
* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and display the new ARM hard-float/soft-float ABI flags for EABI_VER5 (elf32_arm_post_process_headers): Add the hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5. binutils: * readelf.c (decode_ARM_machine_flags): Recognise and display the new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out the code for EABI_VER4 and EABI_VER5 to allow this. elfcpp: * arm.h: New enum for EABI soft- and hard-float flags. gold: * gold.cc (Target_arm::do_adjust_elf_header): Add the hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5. include: * elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define. (EF_ARM_ABI_FLOAT_HARD): Likewise. ld/testsuite: * ld-arm/eabi-hard-float.s: New test source. * ld-arm/eabi-soft-float.s: New test source. * ld-arm/eabi-hard-float.d: New test. * ld-arm/eabi-soft-float.d: New test. * ld-arm/eabi-soft-float-ABI4.d: New test. * ld-arm/eabi-soft-float-r.d: New test. * ld-arm/arm-elf.xp: Use the new tests. binutils: PR binutils/14779 * configure.in: Add checks for wchar.h and mbstate_t. * config.in: Regenerate. * configure: Regenerate. * readelf.c: Conditionally include wchar.h. (print_symbol): Conditionally use mbstate_t.
2012-09-15Add support for tilegx in gold.Walter Lee3-0/+177
* configure.ac (ENABLE_GOLD): support tilegx* * configure: rebuild elfcpp: * tilegx.h: New file. * elfcpp.h: add EM_TILEGX. gold: * tilegx.cc: New file. * Makefile.am (TARGETSOURCES): Add tilegx.cc (ALL_TARGETOBJS): Add tilegx.$(OBJEXT) * configure.tgt: Add entries for tilegx*. * configure.ac: Likewise. * Makefile.in: Rebuild. * configure: Likewise. * testsuite/icf_safe_test.sh (arch_specific_safe_fold): Handle tilegx.
2012-08-14elfcpp/Alan Modra2-11/+40
* powerpc.h: Add more relocs. (R_PPC_REL16*): Rename to R_POWERPC_REL16*. gold/ * powerpc.cc: Update for renamed R_PPC_REL16 relocs. (Output_data_got_powerpc::do_write): Don't rely on base class lookup for replace_constant call. (Output_data_plt_powerpc::do_print_to_mapfile): New function. (Output_data_glink::do_print_to_mapfile): New function. (Target_powerpc::Scan::local): Ignore R_PPC64_TOCSAVE. (Target_powerpc::Relocate::relocate): Likewise.
2012-05-11Handle R_X86_64_64 properly for x32H.J. Lu2-0/+6
elfcpp/ PR gold/14091 * x86_64.h (R_X86_64_RELATIVE64): New. gold/ PR gold/14091 * x86_64.cc (Target_x86_64::Scan::local): For x32, generate R_X86_64_RELATIVE64 instead of R_X86_64_RELATIVE in case of R_X86_64_64.
2012-05-01elfcpp/Cary Coutant2-575/+73
* dwarf.h (enum DW_TAG, enum DW_FORM, enum DW_AT, enum DW_ENCODING) (enum DW_OP, enum DW_CFA): Remove. Include dwarf2.def. gold/ * dwarf_reader.cc (Dwarf_die::read_attributes) (Dwarf_die::skip_attributes, Dwarf_die::int_attribute) (Dwarf_die::uint_attribute): Remove DW_FORM_null. * reduced_debug_output.cc (Output_reduced_debug_info_section::get_die_end): Remove DW_FORM_GNU_ref_index. Add default case.
2012-04-23elfcpp/Cary Coutant2-1/+70
* elfcpp_swap.h (struct Swap_aligned32): New template. gold/ * gdb-index.cc (Gdb_index::do_write): Use Swap_aligned32 for writing CU range table of gdb index.
2012-04-17gold: Add sparc IFUNC support to Gold.David S. Miller2-0/+5
elfcpp/ * sparc.h (R_SPARC_JMP_IREL): New relocation. gold/ * sparc.cc (class Target_sparc): Add rela_ifunc_. (Target_sparc::Target_sparc): Initialize new field. (Target_sparc::do_plt_section_for_global): New function. (Target_sparc::do_plt_section_for_local): New function. (Target_sparc::reloc_needs_plt_for_ifunc): New function. (Target_sparc::make_plt_section): New function, broken out of make_plt_entry. Use ORDER_NON_RELRO_FIRST for ".plt". (Target_sparc::make_plt_entry): Call make_plt_section. (Target_sparc::make_local_ifunc_plt_entry): New function. (Target_sparc::rela_ifunc_section): New function. (Target_sparc::plt_section): Remove const. (Output_data_plt_sparc): Update declarations. Define Global_ifunc and Local_ifunc types. Add global_ifuncs_, local_ifuncs_, ifunc_rel_, and ifunc_count_ fields. (Output_data_plt_sparc::Output_data_plt_sparc): Initialize new fields. (Output_data_plt_sparc::add_entry): Handle IFUNC symbols. (Output_data_plt_sparc::add_local_ifunc_entry): New function. (Output_data_plt_sparc::rela_ifunc): New function. (Output_data_plt_sparc::emit_pending_ifunc_relocs): New function. (Output_data_plt_sparc::has_ifunc_section): New function. (Output_data_plt_sparc::entry_count): Include ifunc_count_. (Output_data_plt_sparc::address_for_global): New function. (Output_data_plt_sparc::address_for_local): New function. (Output_data_plt_sparc::plt_index_to_offset): New function. (Output_data_plt_sparc::set_final_data_size): Use plt_index_to_offset and entry_count. (Output_data_plt_sparc::do_write): Use first_plt_entry_offset and entry_count. (Target_sparc::Scan::get_reference_flags): Add R_SPARC_IRELATIVE and R_SPARC_JMP_IREL to switch. (Target_sparc::Scan::check_non_pic): Likewise. (Target_sparc::Scan::local): Handle IFUNC symbols. (Target_sparc::Scan::local): Likewise. (Target_sparc::Relocate::relocate): Likewise, use plt_address_for_global and plt_address_for_local. (Target_sparc::do_finalize_sections): Call emit_pending_ifunc_relocs. Define __rel_iplt_start and __rel_iplt_end if doing a static link.
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