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Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog
and include/*/ChangeLog files.
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2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
(tag_cpu_arch_combine): Adjust comment in v4t_plus_v6_m with regards
to merging with ARMv8-M Baseline.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Baseline Tag_CPU_arch
value.
gas/
* config/tc-arm.c (arm_ext_v6t2_v8m): New feature for instructions
shared between ARMv6T2 and ARMv8-M.
(move_or_literal_pool): Check mov.w/mvn and movw availability against
arm_ext_v6t2 and arm_ext_v6t2_v8m respectively instead of checking
arm_arch_t2.
(do_t_branch): Error out for wide conditional branch instructions if
targetting ARMv8-M Baseline.
(non_v6t2_wide_only_insn): Add the logic for new wide-only instructions
in ARMv8-M Baseline.
(wide_insn_ok): New function.
(md_assemble): Use wide_insn_ok instead of non_v6t2_wide_only_insn and
adapt error message for unsupported wide instruction to ARMv8-M
Baseline.
(insns): Reorganize instructions shared by ARMv8-M Baseline and
ARMv6t2 architecture.
(arm_cpus): Set feature bit ARM_EXT2_V6T2_V8M for marvell-pj4 and
marvell-whitney cores.
(arm_archs): Define armv8-m.base architecture.
(cpu_arch_ver): Define ARM_ARCH_V8M_BASE architecture version.
(aeabi_set_public_attributes): Add logic to set Tag_CPU_arch to 17 for
ARMv8-M Mainline. Set Tag_DIV_use for ARMv8-M Baseline as well.
gas/testsuite/
* gas/arm/archv8m-base.d: New file.
* gas/arm/attr-march-armv8m.base.d: Likewise.
* gas/arm/armv8m.base-idiv.d: Likewise.
* gas/arm/any-armv8m.d: Adapt to deal with ARMv8-M Baseline.
include/elf/
* arm.h (TAG_CPU_ARCH_V8M_BASE): Declare.
include/opcode/
* arm.h (ARM_EXT2_V6T2_V8M): New extension bit.
(ARM_AEXT2_V8A): New architecture extension bitfield.
(ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
(ARM_AEXT_V8M_BASE): New architecture extension bitfield.
(ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M.
(ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension
bitfield.
(ARM_ARCH_V6KT2): Likewise.
(ARM_ARCH_V6ZT2): Likewise.
(ARM_ARCH_V6KZT2): Likewise.
(ARM_ARCH_V7): Likewise.
(ARM_ARCH_V7A): Likewise.
(ARM_ARCH_V7VE): Likewise.
(ARM_ARCH_V7R): Likewise.
(ARM_ARCH_V7M): Likewise.
(ARM_ARCH_V7EM): Likewise.
(ARM_ARCH_V8A): Likewise.
(ARM_ARCH_V8M_BASE): New architecture bitfield.
(ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M.
(ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension
bitfield and reindent.
(ARM_ARCH_V7A_MP_SEC): Likewise.
(ARM_ARCH_V7R_IDIV): Likewise.
(ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTOV1): Likewise.
opcodes/
* arm-dis.c (arm_opcodes): Guard movw, movt cbz, cbnz, clrex, ldrex,
ldrexb, ldrexh, strex, strexb, strexh shared by ARMv6T2 and ARMv8-M by
ARM_EXT2_V6T2_V8M instead of ARM_EXT_V6T2.
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2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
bfd/
(tag_cpu_arch_combine): Adjust v4t_plus_v6_m and comb array to account
for new TAG_CPU_ARCH_V4T_PLUS_V6_M value. Deal with NULL values in
comb array.
binutils/
* readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Mainline Tag_CPU_arch
value.
(arm_attr_tag_THUMB_ISA_use): Add ARMv8-M Mainline Tag_THUMB_ISA_use
value.
gas/
* config/tc-arm.c (arm_ext_m): Include ARMv8-M.
(arm_ext_v8m): New feature for ARMv8-M.
(arm_ext_atomics): New feature for ARMv8 atomics.
(do_tt): New encoding function for TT* instructions.
(insns): Add new entries for ARMv8-M specific instructions and
reorganize the ones shared by ARMv8-M Mainline and ARMv8-A.
(arm_archs): Define armv8-m.main architecture.
(cpu_arch_ver): Define ARM_ARCH_V8M_MAIN architecture version and
clarify the ordering rule.
(aeabi_set_public_attributes): Use TAG_CPU_ARCH_* macro to refer to
Tag_CPU_arch values for ARMv7e-M detection. Add logic to keep setting
Tag_CPU_arch to ARMv8-A for -march=all. Also set Tag_CPU_arch_profile
to 'A' if extension bit for atomic instructions is set, unless it is
ARMv8-M. Set Tag_THUMB_ISA_use to 3 for ARMv8-M. Set Tag_DIV_use to 0
for ARMv8-M Mainline.
gas/testsuite/
* gas/arm/archv8m.s: New file.
* gas/arm/archv8m-main.d: Likewise.
* gas/arm/attr-march-armv8m.main.d: Likewise.
* gas/arm/any-armv8m.s: Likewise.
* gas/arm/any-armv8m.d: Likewise.
include/elf/
* arm.h (TAG_CPU_ARCH_V8M_MAIN): Declare.
(MAX_TAG_CPU_ARCH): Define to TAG_CPU_ARCH_V8M_MAIN.
(TAG_CPU_ARCH_V4T_PLUS_V6_M): Define to unused value 15.
include/opcode/
* arm.h (ARM_EXT2_ATOMICS): New extension bit.
(ARM_EXT2_V8M): Likewise.
(ARM_EXT_V8): Adjust comment with regards to atomics and remove
mention of legacy use for that bit.
(ARM_AEXT2_V8_1A): New architecture extension bitfield.
(ARM_AEXT2_V8_2A): Likewise.
(ARM_AEXT_V8M_MAIN): Likewise.
(ARM_AEXT2_V8M): Likewise.
(ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield.
(ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A.
(ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A.
(ARM_ARCH_V8M_MAIN): New architecture feature bitfield.
(ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield
and reindent.
(ARM_ARCH_V8A_SIMD): Likewise.
(ARM_ARCH_V8A_CRYPTOV1): Likewise.
(ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of
feature bits.
(ARM_ARCH_V8_1A_SIMD): Likewise.
(ARM_ARCH_V8_1A_CRYPTOV1): Likewise.
opcodes/
* arm-dis.c (arm_opcodes): Guard lda, ldab, ldaex, ldaexb, ldaexh, stl,
stlb, stlh, stlex, stlexb and stlexh by ARM_EXT2_ATOMICS instead of
ARM_EXT_V8.
(thumb32_opcodes): Add entries for wide ARMv8-M instructions.
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include/elf
* arm.h: Add arm SHF_ARM_NOREAD section flag.
bfd * bfd-in2.h: Regenerate.
* section.c: Add SEC_ELF_NOREAD.
* elf32-arm.c (elf32_arm_post_process_headers): Only set
PF_X attribute if a segment only contains section with
SHF_ARM_NOREAD flag.
(elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion.
(elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD
to bfd flag.
(elf32_arm_lookup_section_flags): New function to allow
INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag.
(elf32_arm_special_sections): Add special sections array
to catch section prefix by '.text.noread' pattern.
ld/testsuite
* ld-arm/arm-elf.exp: New tests.
* ld-arm/thumb1-input-section-flag-match.d: New
* ld-arm/thumb1-input-section-flag-match.s: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.d: New
* ld-arm/thumb1-noread-not-present-mixing-two-section.s: New
* ld-arm/thumb1-noread-present-one-section.d: New
* ld-arm/thumb1-noread-present-one-section.s: New
* ld-arm/thumb1-noread-present-two-section.d: New
* ld-arm/thumb1-noread-present-two-section.s: New
binutils
* readelf.c (get_elf_section_flags): Add support for ARM specific
section flags.
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binutils/
* MAINTAINERS: Add myself as MIPS maintainer.
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binutils
* readelf.c(get_machine_flags): Add v2 flag.
gas
* config/rx-defs.h(rx_cpu_type): Add RXV2 type.
* config/tc-rx.c(cpu_type_list): New type lookup table.
(md_parse_option): Use lookup table for choose cpu.
(md_show_usage): Add rxv2 for mcpu option.
* doc/c-rx.texi: Likewise.
* config/rx-parse.y: Add v2 instructions and ACC register.
(rx_check_v2): check v2 type.
include/elf
* rx.h(E_FLAG_RX_V2): New RXv2 type.
include/opcode
* rx.h: Add new instructions.
opcoes
* rx-deocde.opc(rx_decode_opcode): Add new instructions pattern.
* rx-dis.c(register_name): Add new register.
gas/testsuite
* gas/rx/emaca.d: New.
* gas/rx/emaca.sm: New.
* gas/rx/emsba.d: New.
* gas/rx/emsba.sm: New.
* gas/rx/emula.d: New.
* gas/rx/emula.sm: New.
* gas/rx/fadd.d: Add new pattern.
* gas/rx/fadd.sm: Add new pattern.
* gas/rx/fmul.d: Add new pattern.
* gas/rx/fmul.sm: Add new pattern.
* gas/rx/fsqrt.d: New.
* gas/rx/fsqrt.sm: New.
* gas/rx/fsub.d: Add new pattern.
* gas/rx/fsub.sm: Add new pattern.
* gas/rx/ftou.d: New.
* gas/rx/ftou.sm: New.
* gas/rx/maclh.d: New.
* gas/rx/maclh.sm: New.
* gas/rx/maclo.d: Add new pattern.
* gas/rx/maclo.sm: Add new pattern.
* gas/rx/macros.inc: Add new register.
* gas/rx/movco.d: New.
* gas/rx/movco.sm: New.
* gas/rx/movli.d: New.
* gas/rx/movli.sm: New.
* gas/rx/msbhi.d: New.
* gas/rx/msbhi.sm: New.
* gas/rx/msblh.d: New.
* gas/rx/msblh.sm: New.
* gas/rx/msblo.d: New.
* gas/rx/msblo.sm: New.
* gas/rx/mullh.d: New.
* gas/rx/mullh.sm: New.
* gas/rx/mvfacgu.d: New.
* gas/rx/mvfacgu.sm: New.
* gas/rx/mvfachi.d: Add new pattern.
* gas/rx/mvfachi.sm: Add new pattern.
* gas/rx/mvfaclo.d: Add new pattern.
* gas/rx/mvfaclo.sm: Add new pattern.
* gas/rx/mvfacmi.d: Add new pattern.
* gas/rx/mvfacmi.sm: Add new pattern.
* gas/rx/mvfc.d: Add new pattern.
* gas/rx/mvtacgu.d: New.
* gas/rx/mvtacgu.sm: New.
* gas/rx/mvtc.d: Add new pattern.
* gas/rx/popc.d: Add new pattern.
* gas/rx/pushc.d: Add new pattern.
* gas/rx/racl.d: New.
* gas/rx/racl.sm: New.
* gas/rx/racw.d: Add new pattern.
* gas/rx/racw.sm: Add new pattern.
* gas/rx/rdacl.d: New.
* gas/rx/rdacl.sm: New.
* gas/rx/rdacw.d: New.
* gas/rx/rdacw.sm: New.
* gas/rx/rx.exp: Add option.
* gas/rx/stnz.d: Add new pattern.
* gas/rx/stnz.sm: Add new pattern.
* gas/rx/stz.d: Add new pattern.
* gas/rx/stz.sm: Add new pattern.
* gas/rx/utof.d: New.
* gas/rx/utof.sm: New.
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PR binutils/19310
* dwarf.c (display_debug_frames): Recode range test to avoid
undefined behaviour.
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binutils/
* od-macho.c (bfd_mach_o_header_flags_name): Add name
for flags until BFD_MACH_O_MH_APP_EXTENSION_SAFE.
include/mach-o/
* loader.h (bfd_mach_o_header_flags): Add
BFD_MACH_O_MH_APP_EXTENSION_SAFE.
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Missed from f8c2a965.
* configure: Regenerate.
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When the DWARF address size is 32-bit, but the host machine is 64-bit,
objdump fails to spot base addresses specified in the .debug_ranges and
.debug_loc lists.
As an example, here is the output when dumping an example .debug_ranges
section with the pre-patched objdump:
Contents of the .debug_ranges section:
Offset Begin End
00000000 ffffffff 00000004 (start > end)
00000000 00000000 00000004
00000000 ffffffff 00000008 (start > end)
00000000 00000000 00000004
00000000 <End of list>
And this is what the same section looks like when dumped with the
patched version of objdump:
Contents of the .debug_ranges section:
Offset Begin End
00000000 ffffffff 00000004 (base address)
00000000 00000004 00000008
00000000 ffffffff 00000008 (base address)
00000000 00000008 0000000c
00000000 <End of list>
binutils/ChangeLog:
* dwarf.c (is_max_address): New function.
(display_loc_list): Remove out of date comment, use
is_max_address.
(display_debug_ranges): Likewise.
binutils/testsuite/ChangeLog:
* binutils-all/objdump.exp: Add test for .debug_ranges decode.
* binutils-all/dw2-ranges.S: New file.
* binutils-all/dw2-ranges.W: New file.
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binutils/
* MAINTAINERS: Update my email address.
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* objcopy.c (parse_symflags): Use xstrndup in place of strndup.
(copy_main): Likewise.
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binutils * po/ca.po: New Catalan translation.
* configure.ac (ALL_LINGUAS): Add ca.
* configure: Regenerate.
gas * po/fr.po: Updated French translation.
* po/uk.po: Updated Ukraninan translation.
* po/zh_CN.po: New simplified Chinese translation.
* configure.ac (ALL_LINGUAS): Add zh_CN.
* configure: Regenerate.
opcodes * po/zh_CN.po: Updated simplified Chinese translation.
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bfd/
2015-11-13 Tristan Gingold <gingold@adacore.com>
* version.m4: Bump version to 2.26.51
* configure: Regenerate.
binutils/
2015-11-13 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
gas/
2015-11-13 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
gprof/
2015-11-13 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
ld/
2015-11-13 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
opcodes/
2015-11-13 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
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binutils/
2015-11-13 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.26.
gas/
2015-11-13 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.26.
ld/
2015-11-13 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.26.
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This patch fixes all occurences of left-shifting negative constants in C code
which is undefined by the C standard.
binutils/ChangeLog:
* dwarf.c (read_leb128): Fix left shift of negative value.
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readelf ought to notify when a symbol wrongly has both a version
definition and a needed version. This patch does that, and removes
the heuristic that only defined symbols in SHT_NOBITS sections have
verneed entries.
* readelf (process_version_sections): Check DT_VERNEED and
DT_VERDEF for all symbols. Report "*both*" should a symbol
have both a verneed and verdef.
(get_symbol_version_string): Reduce indentation by early
exits. Don't use SHT_NOBITS heuristic to detect case where a
defined symbol has a verneed entry.
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* po/zh_CN.po: Updated (simplified) Chinese translation.
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binutils * binutils.c (process_netbsd_elf_note): New function.
(process_note): Call the new function for NetBSD core notes.
include * common.h (NT_NETBSD_MARCH): Define.
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* objcopy.c (setup_section): Don't omit bfd_copy_private_bfd_data
call when extract_symbol.
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* binutils-all/add-symbol.d: Run test on mips. Support either
order of NEW and NEWDATA symbols.
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PR binutils/19104
binutils * objcopy.c (command_line_switch): Add OPTION_ADD_SYMBOL.
(copy_options): Add add-symbol.
(copy_usage): Likewise.
(parse_symflags): New function.
(need_sym_before): New function.
(create_new_symbol): New function.
(filter_symbols): Add code to insert new symbols.
(copy_main): Process OPTION_ADD_SYMBOL.
* doc/binutils.texi: Document new feature.
* NEWS: Add note about the new feature.
tests * binutils-all/add-symbol.d: New test.
* binutils-all/objcopy.exp: Run the new test.
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The main aim of this patch is to perform more objcopy tests when we
can build executables but not run them. ie. non-native with cross
compiler available.
* binutils-all/objcopy.exp: Delete trailing whitespace. Use
"string equal" rather than "string match" when making simple
string comparisons. Revert 2008-07-08 host_triplet checks.
Perform non-run tests when we can build executable.
(strip_executable, strip_executable_with_saving_a_symbol): Move
run test later. Take extra param on whether to perform run test.
Update callers.
(keep_debug_symbols_and_test_copy): Delete unused vars.
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Calling bfd_copy_private_bfd_data is necessary to copy ELF file header
info.
binutils/
* objcopy.c (copy_object): Don't omit bfd_copy_private_bfd_data
call when extract_symbol.
bfd/
* elf32-v850.c (v850_elf_copy_private_bfd_data): Remove assertion
that input and output .note.renesas sections are same size.
Instead, only copy input to output if they are.
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This commit fixes a few issues in the mechanism for passing information
about ".org" and ".align" directives from the assembler to the linker,
used by the avr target.
In the original commit fdd410ac7a07dfb47dcb992201000582a280d8b2, there
were some mistakes when writing out information about ".align"
directives:
- An align with fill does not write out its information correctly, the
fill data overwrites the alignment data.
- Each alignment directive is recorded at the location where the
previous alignment directive should be recorded, the first alignment
directive is discarded.
In commit 137c83d69fad77677cc818593f9399caa777a0c5, the data produced by
objdump is not correct:
- It's miss-aligned due to a missing whitespace.
- The fill data for align with fill records is not displayed
correctly.
All of the above issues are addressed in this commit, and the test is
improved to cover these cases.
binutils/ChangeLog:
* od-elf32_avr.c (elf32_avr_dump_avr_prop): Fix printing of align
specific data, fix formatting for align and org data.
gas/ChangeLog:
* config/tc-avr.c (avr_output_property_record): Fix overwrite bug
for align and fill records.
(avr_handle_align): Record fill information for align frags.
(create_record_for_frag): Add next frag assertion, use correct
address for align records.
gas/testsuite/ChangeLog:
* gas/avr/avr-prop-1.s: Use fill in some cases.
* gas/avr/avr-prop-1.d: Update expected results.
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bfd * archures.c: Remove support for older ARC. Added support for new
ARC cpus (ARC600, ARC601, ARC700, ARCV2).
* bfd-in2.h: Likewise.
* config.bfd: Likewise.
* cpu-arc.c: Likewise.
* elf32-arc.c: Totally changed file with a refactored
inplementation of the ARC port.
* libbfd.h: Added ARC specific relocation types.
* reloc.c: Likewise.
gas * config/tc-arc.c: Revamped file for ARC support.
* config/tc-arc.h: Likewise.
* doc/as.texinfo: Add new ARC options.
* doc/c-arc.texi: Likewise.
ld * configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*.
* emulparams/arcebelf_prof.sh: New file
* emulparams/arcebelf.sh: Likewise.
* emulparams/arceblinux_prof.sh: Likewise.
* emulparams/arceblinux.sh: Likewise.
* emulparams/arcelf_prof.sh: Likewise.
* emulparams/arcelf.sh: Likewise.
* emulparams/arclinux_prof.sh: Likewise.
* emulparams/arclinux.sh: Likewise.
* emulparams/arcv2elfx.sh: Likewise.
* emulparams/arcv2elf.sh: Likewise.
* emultempl/arclinux.em: Likewise.
* scripttempl/arclinux.sc: Likewise.
* scripttempl/elfarc.sc: Likewise.
* scripttempl/elfarcv2.sc: Likewise
* Makefile.am: Add new ARC emulations.
* Makefile.in: Regenerate.
* NEWS: Mention the new feature.
opcodes * arc-dis.c: Revamped file for ARC support
* arc-dis.h: Likewise.
* arc-ext.c: Likewise.
* arc-ext.h: Likewise.
* arc-opc.c: Likewise.
* arc-fxi.h: New file.
* arc-regs.h: Likewise.
* arc-tbl.h: Likewise.
binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact
and ARCv2.
(get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT.
(guess_is_rela): Likewise.
(dump_relocations): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_16bit_abs_reloc): Likewise.
(is_none_reloc): Likewise.
* NEWS: Mention the new feature.
include * dis-asm.h (arc_get_disassembler): Correct declaration.
* arc-reloc.def: Macro file with definition of all relocation
types.
* arc.h: Changed macros for the newly supported ARC cpus. Altered
enum defining the supported relocations.
* common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added
macro for EM_ARC_COMPACT2.
* arc-func.h: New file.
* arc.h: Likewise.
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* lib/utils-lib.exp (run_dump_test): Handle symbolic link when
copying source file.
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We can't use the output section size to copy input section since
--interleave will shrink the output section. Instead, we change
bfd_convert_section_contents to return the updated input section
size. When we do that, we don't need to adjust the output section
size to skip gap fills.
bfd/
PR binutils/19020
* bfd.c (bfd_convert_section_contents): Add ptr_size parameter.
* bfd-in2.h: Regenerated.
binutils/
PR binutils/19020
* objcopy.c (copy_object): Don't adjust the output section size
when copying from input sections.
(copy_section): Use input section size for the copy. Get the
updated section size from bfd_convert_section_contents.
binutils/testsuite/
PR binutils/19020
* binutils-all/objcopy.exp: Run pr19020a and pr19020b.
* lib/utils-lib.exp (run_dump_test): Support binary input.
* binutils-all/pr19020.in: New file.
* binutils-all/pr19020a.d: Likewise.
* binutils-all/pr19020b.d: Likewise.
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In objcopy, copy_object calls copy_section to copy contents of input
section to output section. When --gap-fill= is used, objcopy extends
the size of output sectios to fill gaps between output sections with
gap fills. In this case, we adjust the output section size to skip
gap files to avoid reading beypond the input section buffer before
calling copy_section and restore the output section size after input
sections have been copied.
binutils/
PR binutils/19005
* objcopy.c (copy_object): Adjust the output section size to
skip gap fills between sections when copying from input sections
to output sections.
ld/testsuite/
PR binutils/19005
* ld-elf/pr19005.d: New file.
* ld-elf/pr19005.s: Likewise.
* ld-elf/pr19005.t: Likewise.
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[opcodes]
* ft32-dis.c (print_insn_ft32): Fix incorrect data field mask.
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binutils PR binutils/15835
* readelf.c (struct elf_section_list): New structure.
(symtab_shndx_hdr): Replace with symtab_shndx_list.
(get_32bit_elf_symbols): Scan for a symbol index table matching
the symbol table in use.
(get_64bit_elf_symbols): Likewise.
(process_section_headers): Handle multiple symbol index sections.
bfd * elf-bfd.h (struct elf_section_list): New structure.
(struct elf_obj_tdata): Replace symtab_shndx_hdr with
symtab_shndx_list. Delete symtab_shndx_section.
(elf_symtab_shndx): Replace macro with elf_symtab_shndx_list.
* elf.c (bfd_elf_get_syms): If symtab index sections are present,
scan them for the section that matches the provided symbol table.
(bfd_section_from_shdr): Record all SHT_SYMTAB_SHNDX sections.
(assign_section_numbers): Use the first symtab index table in the
list.
(_bfd_elf_compute_section_file_positions): Replace use of
symtab_shndx_hdr with use of symtab_shndx_list.
(find_section_in_list): New function.
(assign_file_postions_except_relocs): Use new function.
(_bfd_elf_copy_private_symbol_data): Likewise.
(swap_out_syms): Handle multiple symbol table index sections.
* elf32-m32c.c (m32c_elf_relax_section): Replace use of
symtab_shndx_hdr with use of symtab_shndx_list.
* elf32-rl78.c (rl78_elf_relax_section): Likewise.
* elf32-rx.c (rx_relax_section): Likewise.
* elf32-v850.c (v850_elf_relax_delete_bytes): Likewise.
* elflink.c (bfd_elf_final_link): Likewise.
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include/elf:
* common.h (DF_1_STUB, DF_1_PIE): Define.
ld:
* emulparams/solaris2.sh (GENERATE_PIE_SCRIPT): Set to yes.
* emultempl/elf32.em: Include ldlex.h.
(gld${EMULATION_NAME}_handle_option) [GENERATE_PIE_SCRIPT]
<OPTION_PIE>: Set DF_1_PIE.
binutils:
* readelf.c (process_dynamic_section): Handle DF_1_STUB, DF_1_PIE.
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emitted pieces of text.
* strings.c: Add -s/--output-separator option to specify custom
separator string.
* NEWS: Mention the new feature.
* doc/binutils.text (strings): Document the new command line
option.
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contain absolute paths or paths outside of the current directory - they can.
* doc/binutils.texi (ar): Remove bogus sentance concerning thin
archives and invalid paths.
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PR binutils/18879
* readelf.c (get_unwind_section_word): Check for negative offsets
and very small sections.
(dump_arm_unwind): Warn if the table offset is too large.
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* Makefile.am (TOOL_PROGS): Add readelf.
* Makefile.in: Regenerated.
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(Commit d23d1dff missed pushing the config/iconv.m4 change, and to
regenerate binutils' configure.)
Original description:
This is the second in a series of patches to make a build with an
in-tree GNU libiconv work as designed.
Currently GDB is the only toolchain component which actually uses an
in-tree libiconv. This patch modifies the common AM_ICONV to use an
in-tree libiconv when present and not already provided by libc.
(GDB's workaround uses an in-tree libiconv even when libc provides
iconv(3); I'm not sure when or why that would be desirable.)
config/ChangeLog:
2015-08-24 Yaakov Selkowitz <yselkowi@redhat.com>
* iconv.m4 (AM_ICONV_LINK): Use in-tree libiconv when present.
binutils/ChangeLog:
2015-08-24 Yaakov Selkowitz <yselkowi@redhat.com>
* configure: Regenerate.
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Looks like previous regen wasn't using current sources.
* configure: Regenerate.
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Some targets provide aligned .bss sections, so explicitly align.
msp430 and rl78 emit "magic" symbols when assembling symbol.s, and
mips targets emit STT_OBJECT rather than STT_NOTYPE syms.
* binutils-all/strip-12.s: Align .bss section.
* binutils-all/strip-12.d: Adjust.
* binutils-all/symbols-1.d: Allow extraneous symbols.
* binutils-all/symbols-2.d: Likewise, and V for weakened syms.
* binutils-all/symbols-3.d: Likewise.
* binutils-all/symbols-4.d: Likewise.
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which isn't supported by all ELF targets.
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When copying the sh_link and sh_info fields in stripped section headers,
we also check if the sh_type, sh_flags, /sh_addralign and sh_entsize
fields of the output section match the output. Since --only-keep-debug
turns all non-debug sections into SHT_NOBITS sections, the output
SHT_NOBITS type matches any input type.
bfd/
PR binutils/18785
* elf.c (_bfd_elf_copy_private_bfd_data): When copying the
sh_link and sh_info fields in stripped section headers, we also
check if the sh_type, sh_flags, /sh_addralign and sh_entsize
fields of the output section match the output. Since
--only-keep-debug turns all non-debug sections into SHT_NOBITS
sections, the output SHT_NOBITS type matches any input type.
binutils/testsuite/
PR binutils/18785
* binutils-all/objcopy.exp: Run strip-12.
* binutils-all/strip-12.d: New file.
* binutils-all/strip-12.s: Likewise.
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