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2022-11-28asan: pef: buffer overflowAlan Modra1-1/+1
* pef.c (bfd_pef_parse_traceback_table): Correct size moved when stripping leading dot.
2022-11-28RISC-V: Allow merging 'H' extensionTsukasa OI1-1/+1
Because riscv_merge_std_ext function did not merge the 'H' extension, linked executables lacked 'H' extension when multiple objects are merged. This issue is found while building OpenSBI with 'H' extension (resulting ELF files did not contain "h1p0" in "Tag_RISCV_arch" even if *all* linked object files contained it). This commit adds 'h' to standard_exts variable to merge 'H' extension. bfd/ChangeLog: * elfnn-riscv.c (riscv_merge_std_ext): Add 'H' extension merging.
2022-11-28Automatic date update in version.inGDB Administrator1-1/+1
2022-11-27Automatic date update in version.inGDB Administrator1-1/+1
2022-11-26Automatic date update in version.inGDB Administrator1-1/+1
2022-11-25riscv: Add AIA extension support (Smaia, Ssaia)Christoph Müllner1-0/+4
This commit adds the AIA extensions (Smaia and Ssaia) CSRs. bfd/ChangeLog: * elfxx-riscv.c: Add 'smaia' and 'ssaia' to the list of known standard extensions. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): (riscv_csr_address): Add CSR classes for Smaia/Ssaia. * testsuite/gas/riscv/csr-dw-regnums.d: Add new CSRs. * testsuite/gas/riscv/csr-dw-regnums.s: Likewise. * testsuite/gas/riscv/csr-version-1p10.d: Likewise. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.l: Likewise. * testsuite/gas/riscv/csr.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (CSR_MISELECT): New CSR macro. (CSR_MIREG): Likewise. (CSR_MTOPEI): Likewise. (CSR_MTOPI): Likewise. (CSR_MVIEN): Likewise. (CSR_MVIP): Likewise. (CSR_MIDELEGH): Likewise. (CSR_MIEH): Likewise. (CSR_MVIENH): Likewise. (CSR_MVIPH): Likewise. (CSR_MIPH): Likewise. (CSR_SISELECT): Likewise. (CSR_SIREG): Likewise. (CSR_STOPEI): Likewise. (CSR_STOPI): Likewise. (CSR_SIEH): Likewise. (CSR_SIPH): Likewise. (CSR_HVIEN): Likewise. (CSR_HVICTL): Likewise. (CSR_HVIPRIO1): Likewise. (CSR_HVIPRIO2): Likewise. (CSR_VSISELECT): Likewise. (CSR_VSIREG): Likewise. (CSR_VSTOPEI): Likewise. (CSR_VSTOPI): Likewise. (CSR_HIDELEGH): Likewise. (CSR_HVIENH): Likewise. (CSR_HVIPH): Likewise. (CSR_HVIPRIO1H): Likewise. (CSR_HVIPRIO2H): Likewise. (CSR_VSIEH): Likewise. (CSR_VSIPH): Likewise. (DECLARE_CSR): Add CSRs for Smaia and Ssaia. Changes for v3: - Imply ssaia for smaia - Imply zicsr for ssaia (and transitively smaia) - Move hypervisor CSRs to Ssaia+H - Rebase on upstream/master Changes for v2: - Add hypervisor and VS CSRs - Fix whitespace issue Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2022-11-25Automatic date update in version.inGDB Administrator1-1/+1
2022-11-24Automatic date update in version.inGDB Administrator1-1/+1
2022-11-23PR22509 - Null pointer dereference on coff_slurp_reloc_tableAlan Modra10-10/+17
This extends the commit 4581a1c7d304 fix to more targets, which hardens BFD a little. I think the real underlying problem was the bfd_canonicalize_reloc call in load_specific_debug_section which passed a NULL for "symbols". Fix that too. PR 22509 bfd/ * aoutx.h (swap_ext_reloc_out): Gracefully handle NULL symbols. * i386lynx.c (swap_ext_reloc_out): Likewise. * pdp11.c (pdp11_aout_swap_reloc_out): Likewise. * coff-tic30.c (reloc_processing): Likewise. * coff-tic4x.c (tic4x_reloc_processing): Likewise. * coff-tic54x.c (tic54x_reloc_processing): Likewise. * coff-z80.c (reloc_processing): Likewise. * coff-z8k.c (reloc_processing): Likewise. * ecoff.c (ecoff_slurp_reloc_table): Likewise. * som.c (som_set_reloc_info): Likewise. binutils/ * objdump.c (load_specific_debug_section): Pass syms to bfd_canonicalize_reloc.
2022-11-23asan: NULL deref in filter_symbolsAlan Modra1-0/+1
If tdata->symbols is NULL, make tdata->symcount zero too. This makes wasm_get_symtab_upper_bound return the proper result and stops cascading errors. * wasm-module.c (wasm_scan_name_function_section): Clear tdata->symcount on error.
2022-11-23RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standardXiao Zeng2-0/+13
According to the riscv psabi, R_RISCV_SUB6 only allows 6 least significant bits are valid, but since binutils implementation, we usually get 8 bits field for it. That means, the high 2 bits could be other field and have different purpose. Therefore, we should filter the 8 bits to 6 bits before calculate, and then only encode the valid 6 bits back. By the way, we also need the out-of-range check for R_RISCV_SUB6, and the overflow checks for all R_RISCV_ADD/SUB/SET relocations, but we can add them in the future patches. Passing riscv-gnu-toolchain regressions. bfd/ChangeLog: * elfnn-riscv.c (riscv_elf_relocate_section): Take the R_RISCV_SUB6 lower 6 bits as the significant bit. * elfxx-riscv.c (riscv_elf_add_sub_reloc): Likewise.
2022-11-23Automatic date update in version.inGDB Administrator1-1/+1
2022-11-22x86: Don't define _TLS_MODULE_BASE_ for ld -rH.J. Lu1-1/+1
bfd/ PR ld/29820 * elfxx-x86.c (_bfd_x86_elf_always_size_sections): Don't define _TLS_MODULE_BASE_ for ld -r. ld/ PR ld/29820 * testsuite/ld-x86-64/pr29820.d: New file. * testsuite/ld-x86-64/pr29820.s: Likewise. * testsuite/ld-x86-64/x86-64.ex: Run pr29820.
2022-11-22Automatic date update in version.inGDB Administrator1-1/+1
2022-11-22PR29807, SIGSEGV when linking fuzzed PE objectAlan Modra1-2/+4
PR 29807 * cofflink.c (_bfd_coff_generic_relocate_section): Skip relocs against symbols with a NULL section.
2022-11-22Re: ld: Always output local symbol for relocatable linkAlan Modra1-4/+1
Remove this code dating back to commit 98790d3a95fc entirely, what it was trying to do is done elsewhere. PR ld/29761 * elflink.c (elf_link_output_symstrtab): Don't handle symbols in SEC_EXCLUDE sections here.
2022-11-21Fix ARM and AArch64 assembler tests to work in a multi-arch environment.Nick Clifton3-0/+24
PR 29764 gas * testsuite/gas/arm/cpu-cortex-a76ae.d: Add arm prefix to the -m option passed to objdump. * testsuite/gas/arm/cpu-cortex-a77.d: Likewise. * testsuite/gas/aarch64/cpu-cortex-a76ae.d: Add aarch64 prefix to the -m option passed to objdump. * testsuite/gas/aarch64/cpu-cortex-a77.d: Likewise. bfd * cpu-arm.c (scan): Accept machine names prefixed with "arm:". * cpu-aarch64.c (scan): Accept machine names prefixed with "aarch64:". bin * doc/binutils.texi (objdump): Note that the -m option supports the <architecture>:<machine> syntax.
2022-11-21Automatic date update in version.inGDB Administrator1-1/+1
2022-11-20Automatic date update in version.inGDB Administrator1-1/+1
2022-11-19RISC-V: Add 'Ssstateen' extension and its CSRsTsukasa OI1-1/+3
This commit adds 'Ssstateen' extension, which is a supervisor-visible view of the 'Smstateen' extension. It means, this extension implements sstateen* and hstateen* CSRs of the 'Smstateen' extension. Note that 'Smstateen' extension itself is unchanged but due to implementation simplicity, it is implemented so that 'Smstateen' implies 'Ssstateen' (just like 'M' implies 'Zmmul'). This is based on the latest version of RISC-V Profiles (version 0.9-draft, Frozen): <https://github.com/riscv/riscv-profiles/commit/226b7f643067b29abc6723fac60d5f6d3f9eb901> bfd/ChangeLog: * elfxx-riscv.c (riscv_implicit_subsets): Update implication rules. (riscv_supported_std_s_ext) Add 'Ssstateen' extension. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): Rename CSR_CLASS_SMSTATEEN_AND_H{,_32} to CSR_CLASS_SSSTATEEN_... Add CSR_CLASS_SSSTATEEN. (riscv_csr_address): Support new/renamed CSR classes. * testsuite/gas/riscv/csr.s: Add 'Ssstateen' extension to comment. * testsuite/gas/riscv/csr-version-1p9p1.l: Reflect changes to error messages. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. * testsuite/gas/riscv/ssstateen-csr.s: Test for 'Ssstateen' CSRs. * testsuite/gas/riscv/ssstateen-csr.d: Likewise. * testsuite/gas/riscv/smstateen-csr-s.d: Test to make sure that supervisor/hypervisor part of 'Smstateen' CSRs are accessible from 'RV32IH_Smstateen', not just from 'RV32IH_Ssstateen' that is tested in ssstateen-csr.d. include/ChangeLog: * opcode/riscv-opc.h: Update DECLARE_CSR declarations with new CSR classes.
2022-11-19Automatic date update in version.inGDB Administrator1-1/+1
2022-11-18go32 sanity checkAlan Modra1-0/+4
* coff-stgo32 (go32exe_check_format): Sanity check stubsize against filesize before malloc.
2022-11-18Regen potfiles for sframeAlan Modra1-0/+1
2022-11-18Automatic date update in version.inGDB Administrator1-1/+1
2022-11-17ld: Always call elf_backend_output_arch_local_symsH.J. Lu3-2/+11
Always call elf_backend_output_arch_local_syms since only the backend knows if elf_backend_output_arch_local_syms is needed when all symbols are striped. elf_backend_output_arch_local_syms is defined only for x86, ARM and AARCH64. On x86, elf_backend_output_arch_local_syms must be called to handle local IFUNC symbols even if all symbols are striped. Update ARM and AARCH64 to skip elf_backend_output_arch_local_syms when symbols aren't needed. bfd/ PR ld/29797 * elf32-arm.c (elf32_arm_output_arch_local_syms): Skip if symbols aren't needed. * elfnn-aarch64.c (elfNN_aarch64_output_arch_local_syms): Likewise. * elflink.c (bfd_elf_final_link): Always call elf_backend_output_arch_local_syms if available. ld/ PR ld/29797 * testsuite/ld-elf/linux-x86.exp: Run PR ld/29797 test. * testsuite/ld-elf/pr29797.c: New file.
2022-11-17RISC-V: Add T-Head Int vendor extensionChristoph Müllner1-0/+5
This patch adds the XTheadInt extension, which provides interrupt stack management instructions. The XTheadFmv extension is documented in the RISC-V toolchain contentions: https://github.com/riscv-non-isa/riscv-toolchain-conventions Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2022-11-17RISC-V: Add T-Head Fmv vendor extensionChristoph Müllner1-0/+5
This patch adds the XTheadFmv extension, which allows to access the upper 32 bits of a double-precision floating-point register in RV32. The XTheadFmv extension is documented in the RISC-V toolchain contentions: https://github.com/riscv-non-isa/riscv-toolchain-conventions Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2022-11-17Automatic date update in version.inGDB Administrator1-1/+1
2022-11-16Automatic date update in version.inGDB Administrator1-1/+1
2022-11-15bfd: linker: merge .sframe sectionsIndu Bhagat13-11/+1211
The linker merges all the input .sframe sections. When merging, the linker verifies that all the input .sframe sections have the same abi/arch. The linker uses libsframe library to perform key actions on the .sframe sections - decode, read, and create output data. This implies buildsystem changes to make and install libsframe before libbfd. The linker places the output .sframe section in a new segment of its own: PT_GNU_SFRAME. A new segment is not added, however, if the generated .sframe section is empty. When a section is discarded from the final link, the corresponding entries in the .sframe section for those functions are also deleted. The linker sorts the SFrame FDEs on start address by default and sets the SFRAME_F_FDE_SORTED flag in the .sframe section. This patch also adds support for generation of SFrame unwind information for the .plt* sections on x86_64. SFrame unwind info is generated for IBT enabled PLT, lazy/non-lazy PLT. The existing linker option --no-ld-generated-unwind-info has been adapted to include the control of whether .sframe unwind information will be generated for the linker generated sections like PLT. Changes to the linker script have been made as necessary. ChangeLog: * Makefile.def: Add install dependency on libsframe for libbfd. * Makefile.in: Regenerated. * bfd/Makefile.am: Add elf-sframe.c * bfd/Makefile.in: Regenerated. * bfd/bfd-in2.h (SEC_INFO_TYPE_SFRAME): Regenerated. * bfd/configure: Regenerate. * bfd/configure.ac: Add elf-sframe.lo. * bfd/elf-bfd.h (struct sframe_func_bfdinfo): New struct. (struct sframe_dec_info): Likewise. (struct sframe_enc_info): Likewise. (struct elf_link_hash_table): New member for encoded .sframe object. (struct output_elf_obj_tdata): New member. (elf_sframe): New access macro. (_bfd_elf_set_section_sframe): New declaration. * bfd/elf.c (get_segment_type): Handle new segment PT_GNU_SFRAME. (bfd_section_from_phdr): Likewise. (get_program_header_size): Likewise. (_bfd_elf_map_sections_to_segments): Likewise. * bfd/elf64-x86-64.c (elf_x86_64_link_setup_gnu_properties): Add contents to the .sframe sections or .plt* entries. * bfd/elflink.c (elf_section_ignore_discarded_relocs): Handle SEC_INFO_TYPE_SFRAME. (_bfd_elf_default_action_discarded): Handle .sframe section. (elf_link_input_bfd): Merge .sframe section. (bfd_elf_final_link): Write the output .sframe section. (bfd_elf_discard_info): Handle discarding .sframe section. * bfd/elfxx-x86.c (_bfd_x86_elf_size_dynamic_sections): Create .sframe section for .plt and .plt.sec. (_bfd_x86_elf_finish_dynamic_sections): Handle .sframe from .plt* sections. * bfd/elfxx-x86.h (PLT_SFRAME_FDE_START_OFFSET): New definition. (SFRAME_PLT0_MAX_NUM_FRES): Likewise. (SFRAME_PLTN_MAX_NUM_FRES): Likewise. (struct elf_x86_sframe_plt): New structure. (struct elf_x86_link_hash_table): New member. (struct elf_x86_init_table): New members for .sframe creation. * bfd/section.c: Add new definition SEC_INFO_TYPE_SFRAME. * binutils/readelf.c (get_segment_type): Handle new segment PT_GNU_SFRAME. * ld/ld.texi: Update documentation for --no-ld-generated-unwind-info. * ld/scripttempl/elf.sc: Support .sframe sections. * ld/Makefile.am (TESTSFRAMELIB): Use it. (check-DEJAGNU): Likewise. * ld/Makefile.in: Regenerated. * ld/configure.ac (TESTSFRAMELIB): Set to the .so or .a like TESTBFDLIB. * ld/configure: Regenerated. * bfd/elf-sframe.c: New file. include/ChangeLog: * elf/common.h (PT_GNU_SFRAME): New definition. * elf/internal.h (struct elf_segment_map): Handle new segment type PT_GNU_SFRAME. ld/testsuite/ChangeLog: * ld/testsuite/ld-bootstrap/bootstrap.exp: Add SFRAMELIB. * ld/testsuite/ld-aarch64/aarch64-elf.exp: Add new test sframe-simple-1. * ld/testsuite/ld-aarch64/sframe-bar.s: New file. * ld/testsuite/ld-aarch64/sframe-foo.s: Likewise. * ld/testsuite/ld-aarch64/sframe-simple-1.d: Likewise. * ld/testsuite/ld-sframe/sframe-empty.d: New test. * ld/testsuite/ld-sframe/sframe-empty.s: New file. * ld/testsuite/ld-sframe/sframe.exp: New testsuite. * ld/testsuite/ld-x86-64/sframe-bar.s: New file. * ld/testsuite/ld-x86-64/sframe-foo.s: Likewise. * ld/testsuite/ld-x86-64/sframe-simple-1.d: Likewise. * ld/testsuite/ld-x86-64/sframe-plt-1.d: Likewise. * ld/testsuite/ld-x86-64/sframe-simple-1.d: Likewise. * ld/testsuite/ld-x86-64/x86-64.exp: Add new tests - sframe-simple-1, sframe-plt-1. * ld/testsuite/lib/ld-lib.exp: Add new proc to check if assembler supports SFrame section. * ld/testsuite/ld-sframe/discard.d: New file. * ld/testsuite/ld-sframe/discard.ld: Likewise. * ld/testsuite/ld-sframe/discard.s: Likewise.
2022-11-15Automatic date update in version.inGDB Administrator1-1/+1
2022-11-14pru: bfd: Correct default to no execstackDimitar Dimitrov1-0/+2
Data and instruction memories are strictly separated, so it is not possible to execute instructions from the stack memory on PRU. I don't see any difference in testsuite results with or without this change. bfd/ChangeLog: * elf32-pru.c (elf_backend_default_execstack): Define as 0. ld/ChangeLog: * testsuite/ld-elf/elf.exp (target_defaults_to_execstack): Return 0 for pru. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2022-11-14arm: Add support for Cortex-X1C CPU.Srinath Parvathaneni1-0/+1
This patch adds support for Cortex-X1C CPU in Arm. bfd/ChangeLog: 2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * cpu-arm.c (processors): Add Cortex-X1C CPU entry. gas/ChangeLog: 2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com> * NEWS: Update docs. * config/tc-arm.c (arm_cpus): Add cortex-x1c to -mcpu. * doc/c-arm.texi: Update docs. * testsuite/gas/arm/cpu-cortex-x1c.d: New test.
2022-11-14objcopy renaming section with explicit flagsAlan Modra2-0/+8
This tidies SEC_RELOC handling in bfd, in the process fixing a bug with objcopy when renaming sections. bfd/ * reloc.c (_bfd_generic_set_reloc): Set/clear SEC_RELOC depending on reloc count. * elf64-sparc.c (elf64_sparc_set_reloc): Likewise. binutils/ * objcopy.c (copy_relocations_in_section): Remove now unnecessary clearing of SEC_RELOC. * testsuite/binutils-all/rename-section-01.d: New test. * testsuite/binutils-all/objcopy.exp: Run it. gas/ * write.c (size_seg): Remove unneccesary twiddle of SEC_RELOC. (write_relocs): Likewise. Always call bfd_set_reloc.
2022-11-14Automatic date update in version.inGDB Administrator1-1/+1
2022-11-13Automatic date update in version.inGDB Administrator1-1/+1
2022-11-12Automatic date update in version.inGDB Administrator1-1/+1
2022-11-11PR28834, PR26946 sanity checking section sizeAlan Modra6-45/+94
This patch provides a new function to sanity check section sizes. It's mostly extracted from what we had in bfd_get_full_section_contents but also handles compressed debug sections. Improvements are: - section file offset is taken into account, - added checks that a compressed section can be read from file. The function is then used when handling multiple .debug_* sections that need to be read into a single buffer, to sanity check sizes before allocating the buffer. PR 26946, PR 28834 * Makefile.am (LIBBFD_H_FILES): Add section.c. * compress.c (bfd_get_full_section_contents): Move section size sanity checks.. * section.c (_bfd_section_size_insane): ..to here. New function. * dwarf2.c (read_section): Use _bfd_section_size_insane. (_bfd_dwarf2_slurp_debug_info): Likewise. * Makefile.in: Regenerate. * libbfd.h: Regenerate.
2022-11-11Sanity check SHT_MIPS_OPTIONS sizeAlan Modra1-5/+1
* elfxx-mips.c (_bfd_mips_elf_section_from_shdr): Use bfd_malloc_and_get_section to read contents of .MIPS.options.
2022-11-11Automatic date update in version.inGDB Administrator1-1/+1
2022-11-10mach-o reloc size overflowAlan Modra1-1/+4
* mach-o.c (bfd_mach_o_canonicalize_reloc): Set bfd_error on multiply overflow.
2022-11-10Sanity check reloc count in get_reloc_upper_boundAlan Modra5-34/+69
The idea here is the stop tools from allocating up to 32G per section for the arelent pointer array, only to find a little later that the section reloc count was fuzzed. This usually doesn't hurt much (on systems that allow malloc overcommit) except when compiled with asan. We already do this for ELF targets, and while fixing the logic recently I decided other targets ought to do the same. * elf64-sparc.c (elf64_sparc_get_reloc_upper_bound): Sanity check section reloc count against file size. * mach-o.c (bfd_mach_o_get_reloc_upper_bound): Likewise. * aoutx.h (get_reloc_upper_bound): Likewise, and don't duplicate check done in bfd_get_reloc_upper_bound. * pdp11.c (get_reloc_upper_bound): Likewise. * coffgen.c (coff_get_reloc_upper_bound): Likewise.
2022-11-10Automatic date update in version.inGDB Administrator1-1/+1
2022-11-08ld: Always output local symbol for relocatable linkH.J. Lu1-1/+2
PR ld/29761 * elflink.c (elf_link_output_symstrtab): Don't skip local symbol in SEC_EXCLUDE section for relocatable link.
2022-11-09Automatic date update in version.inGDB Administrator1-1/+1
2022-11-08Automatic date update in version.inGDB Administrator1-1/+1
2022-11-07configure: require libzstd >= 1.4.0Christophe Lyon1-10/+10
gas uses ZSTD_compressStream2 which is only available with libzstd >= 1.4.0, leading to build errors when an older version is installed. This patch updates the check libzstd presence to check its version is >= 1.4.0. However, since gas seems to be the only component requiring such a recent version this may imply that we disable ZSTD support for all components although some would still benefit from an older version. I ran 'autoreconf -f' in all directories containing a configure.ac file, using vanilla autoconf-2.69 and automake-1.15.1. I noticed several errors from autoheader in readline, as well as warnings in intl, but they are unrelated to this patch. This should fix some of the buildbots. OK for trunk? Thanks, Christophe
2022-11-07RISC-V: Remove RV32EF conflictTsukasa OI1-7/+0
Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later versions beginning with the version 20190608-Base-Ratified removed this restriction. Because the 'E' extension is still a draft, the author chose to *just* remove the conflict (not checking the ISA version). Note that, because RV32E is only used with a soft-float calling convention, there's no valid official ABI for RV32EF. It means, even if we can assemble a program with -march=rv32ef -mabi=ilp32e, floating-point registers are kept in an unmanaged state (outside ABI management). The purpose of this commit is to suppress unnecessary errors while parsing an ISA string and/or disassembling, not to allow hard-float with RVE. bfd/ChangeLog: * elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF because only older specifications disallowed it. gas/ChangeLog: * testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly prohibited. * testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
2022-11-07Automatic date update in version.inGDB Administrator1-1/+1
2022-11-06Automatic date update in version.inGDB Administrator1-1/+1
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