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2022-07-01Automatic date update in version.inGDB Administrator1-1/+1
2022-06-30Automatic date update in version.inGDB Administrator1-1/+1
2022-06-29Automatic date update in version.inGDB Administrator1-1/+1
2022-06-28bfd: handle codepage when opening files on MinGWClément Chigot1-3/+9
Even if MS docs say that CP_UTF8 should always be used on newer applications, forcing it might produce undefined filename if the encoding isn't UTF-8. MinGW seems to call ___lc_codepage_func() in order to retrieve the current thread codepage. bfd/ChangeLog: * bfdio.c (_bfd_real_fopen): Retrieve codepage with ___lc_codepage_func() on MinGW.
2022-06-28PowerPC64: align plt_branch stubsAlan Modra1-20/+34
plt_branch stubs are similar to plt_call stubs in that they branch via bctr. Align them too. bfd/ * elf64-ppc.c (ppc_size_one_stub): Align plt_branch stubs as for plt_call stubs. ld/ * testsuite/ld-powerpc/elfv2exe.d: Adjust for plt_branch changes. * testsuite/ld-powerpc/notoc.d: Likewise. * testsuite/ld-powerpc/notoc.wf: Likewise. * testsuite/ld-powerpc/notoc3.d: Likewise. * testsuite/ld-powerpc/pr23937.d: Likewise.
2022-06-28PowerPC64: plt_stub_padAlan Modra1-32/+19
* elf64-ppc.c (plt_stub_pad): Simplify parameters and untangle from plt_stub_size. (ppc_size_one_stub): Call plt_stub_size before plt_stub_pad to provide size. Recalculate size if it might change.
2022-06-28PowerPC64: Tidy stub type changesAlan Modra1-4/+4
It made sense before I started using separate fields for main type and sub type to add a difference in main type to the type (thus keeping sub type unchanged). Not so much now. * elf64-ppc.c (ppc_merge_stub): Simplify stub type change. (ppc_size_one_stub): Likewise.
2022-06-28PR29293, elfnn-aarch64.c: def_protected member unintializedPekka Seppänen1-0/+1
PR 29293 * elfnn-aarch64.c (elfNN_aarch64_link_hash_newfunc): Init def_protected.
2022-06-28RISC-V: Add 'Sstc' extension and its CSRsTsukasa OI1-0/+1
This commit adds "stimecmp / vstimecmp" Extension (Sstc) and its CSRs. bfd/ChangeLog: * elfxx-riscv.c (riscv_supported_std_s_ext): Add 'Sstc' extension to valid 'S' extension list. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): Add CSR classes for 'Sstc' extension. (riscv_csr_address): Add handling for new CSR classes. * testsuite/gas/riscv/csr-dw-regnums.s: Add new CSRs. * testsuite/gas/riscv/csr-dw-regnums.d: Likewise. * testsuite/gas/riscv/csr.s: Add new CSRs. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.l: Likewise. * testsuite/gas/riscv/csr-version-1p10.d: Likewise. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. include/ChangeLog: * opcode/riscv-opc.h (CSR_STIMECMP, CSR_STIMECMPH, CSR_VSTIMECMP, CSR_VSTIMECMPH): New CSR macros.
2022-06-28RISC-V: Add 'Sscofpmf' extension with its CSRsTsukasa OI1-0/+1
This commit adds Count Overflow and Mode-Based Filtering Extension (Sscofpmf) and its CSRs. bfd/ChangeLog: * elfxx-riscv.c (riscv_supported_std_s_ext): Add 'Sscofpmf' extension to valid 'S' extension list. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): Add CSR classes for 'Sscofpmf' extension. (riscv_csr_address): Add handling for new CSR classes. * testsuite/gas/riscv/csr-dw-regnums.s: Add new CSRs. * testsuite/gas/riscv/csr-dw-regnums.d: Likewise. * testsuite/gas/riscv/csr.s: Add new CSRs. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.l: Likewise. * testsuite/gas/riscv/csr-version-1p10.d: Likewise. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. include/ChangeLog: * opcode/riscv-opc.h (CSR_SCOUNTOVF, CSR_MHPMEVENT3H, CSR_MHPMEVENT4H, CSR_MHPMEVENT5H, CSR_MHPMEVENT6H, CSR_MHPMEVENT7H, CSR_MHPMEVENT8H, CSR_MHPMEVENT9H, CSR_MHPMEVENT10H, CSR_MHPMEVENT11H, CSR_MHPMEVENT12H, CSR_MHPMEVENT13H, CSR_MHPMEVENT14H, CSR_MHPMEVENT15H, CSR_MHPMEVENT16H, CSR_MHPMEVENT17H, CSR_MHPMEVENT18H, CSR_MHPMEVENT19H, CSR_MHPMEVENT20H, CSR_MHPMEVENT21H, CSR_MHPMEVENT22H, CSR_MHPMEVENT23H, CSR_MHPMEVENT24H, CSR_MHPMEVENT25H, CSR_MHPMEVENT26H, CSR_MHPMEVENT27H, CSR_MHPMEVENT28H, CSR_MHPMEVENT29H, CSR_MHPMEVENT30H, CSR_MHPMEVENT31H): New CSR macros.
2022-06-28RISC-V: Add 'Smstateen' extension and its CSRsTsukasa OI1-0/+1
This commit adds State Enable Extension (Smstateen) and its CSRs. bfd/ChangeLog: * elfxx-riscv.c (riscv_supported_std_s_ext): Add 'Smstateen' extension to valid 'S' extension list. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): Add CSR classes for 'Smstateen' extension. (riscv_csr_address): Add handling for new CSR classes. * testsuite/gas/riscv/csr-dw-regnums.s: Add new CSRs. * testsuite/gas/riscv/csr-dw-regnums.d: Likewise. * testsuite/gas/riscv/csr.s: Add new CSRs. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.l: Likewise. * testsuite/gas/riscv/csr-version-1p10.d: Likewise. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. include/ChangeLog: * opcode/riscv-opc.h (CSR_MSTATEEN0, CSR_MSTATEEN1, CSR_MSTATEEN2, CSR_MSTATEEN3, CSR_SSTATEEN0, CSR_SSTATEEN1, CSR_SSTATEEN2, CSR_SSTATEEN3, CSR_HSTATEEN0, CSR_HSTATEEN1, CSR_HSTATEEN2, CSR_HSTATEEN3, CSR_MSTATEEN0H, CSR_MSTATEEN1H, CSR_MSTATEEN2H, CSR_MSTATEEN3H, CSR_HSTATEEN0H, CSR_HSTATEEN1H, CSR_HSTATEEN2H, CSR_HSTATEEN3H): New CSR macros.
2022-06-28Automatic date update in version.inGDB Administrator1-1/+1
2022-06-27bfd: prune config.bfd's setting of targ_archsJan Beulich1-5/+1
The final "match all" case can take care of a few explicit entries: Purge those. Also move s12z* into proper position (the table is otherwise sorted, after all).
2022-06-27drop XC16x bitsJan Beulich13-592/+0
Commit 04f096fb9e25 ("Move the xc16x target to the obsolete list") moved the architecture from the "obsolete but still available" to the "obsolete / support removed" list in config.bfd, making the architecture impossible to enable (except maybe via "enable everything" options"). Note that I didn't touch */po/*.po{,t} on the assumption that these would be updated by some (half)automatic means.
2022-06-27Automatic date update in version.inGDB Administrator1-1/+1
2022-06-26Automatic date update in version.inGDB Administrator1-1/+1
2022-06-25arm: Define elf_backend_extern_protected_data to 0 [PR 18705]Fangrui Song1-1/+1
Similar to commit 4fb55bf6a9606eb7b626c30a9f4e71d6c2d4fbb2 for aarch64. Commit b68a20d6675f1360ea4db50a9835c073675b9889 changed ld to produce R_ARM_GLOB_DAT but that defeated the purpose of protected visibility as an optimization. Restore the previous behavior (which matches ld.lld) by defining elf_backend_extern_protected_data to 0.
2022-06-25Automatic date update in version.inGDB Administrator1-1/+1
2022-06-24Automatic date update in version.inGDB Administrator1-1/+1
2022-06-23PowerPC64: fix assertion in ppc_build_one_stub with -Os codeAlan Modra1-1/+2
save_res stubs aren't written in ppc_build_one_stub, their offsets (which are zero) should not be checked. * elf64-ppc.c (ppc_build_one_stub): Don't check save_res offsets.
2022-06-23Re: PowerPC64: stub debug dumpAlan Modra1-41/+61
Let's show the current stub as well as the previous one. Of interest is the current offset and a new field, id. Check that the build hash table traversal is in the same order as sizing traversal too. * elf64-ppc.c (struct ppc_stub_hash_entry): Add id. (struct ppc_link_hash_table): Add stub_id. (stub_hash_newfunc): Init id and symtype. (dump_stub): New function, extracted from.. (dump_previous_stub): ..here. Deleted. (ppc_build_one_stub): Sanity check stub id as well as offset. Show current stub as well as previous. (ppc_size_one_stub): Set stub id. (ppc64_elf_size_stubs): Init stub_id before traversal. (ppc64_elf_build_stubs): Likewise.
2022-06-23aarch64: Allow PC-relative relocations against protected STT_FUNC for -sharedFangrui Song1-1/+1
__attribute__((visibility("protected"))) void *foo() { return (void *)foo; } gcc -fpic -shared -fuse-ld=bfd fails with the confusing diagnostic: relocation R_AARCH64_ADR_PREL_PG_HI21 against symbol `foo' which may bind externally can not be used when making a shared object; recompile with -fPIC Call _bfd_elf_symbol_refs_local_p with local_protected==true to suppress the error. The new behavior matches gold and ld.lld. Note: if some code tries to use direct access relocations to take the address of foo (likely due to -fno-pic), the pointer equality will break, but the error should be reported on the executable link, not on the innocent shared object link. glibc 2.36 will give a warning at relocation resolving time.
2022-06-23aarch64: Define elf_backend_extern_protected_data to 0 [PR 18705]Fangrui Song1-1/+1
Follow-up to commit 90b7a5df152a64d2bea20beb438e8b81049a5c30 ("aarch64: Disallow copy relocations on protected data"). Commit 32f573bcb3aaa1c9defcad79dbb5851fcc02ae2d changed ld to produce R_AARCH64_GLOB_DAT but that defeated the purpose of protected visibility as an optimization. Restore the previous behavior (which matches ld.lld) by defining elf_backend_extern_protected_data to 0.
2022-06-23Automatic date update in version.inGDB Administrator1-1/+1
2022-06-22aarch64: Disallow copy relocations on protected dataFangrui Song1-1/+27
If an executable has copy relocations for extern protected data, that can only work if the shared object containing the definition is built with assumptions (a) the compiler emits GOT-generating relocations (b) the linker produces R_*_GLOB_DAT instead of R_*_RELATIVE. Otherwise the shared object uses its own definition directly and the executable accesses a stale copy. Note: the GOT relocations defeat the purpose of protected visibility as an optimization, and it turns out this never worked perfectly. glibc 2.36 will warn on copy relocations on protected data. Let's produce a warning at link time, matching ld.lld which has been used on many aarch64 OSes. Note: x86 requires GNU_PROPERTY_NO_COPY_ON_PROTECTED to have the error. This is to largely due to GCC 5's "x86-64: Optimize access to globals in PIE with copy reloc" which started to use direct access relocations for external data symbols in -fpie mode. GCC's aarch64 port does not have the change. Nowadays with most builds switching to -fpie/-fpic, aarch64 mostly doesn't need to worry about copy relocations. So for aarch64 we simply don't check GNU_PROPERTY_NO_COPY_ON_PROTECTED.
2022-06-22RISC-V: Reorder the prefixed extensions which are out of order.Nelson Chu1-23/+0
This patch has been pending for almost a year... However, I noticed that llvm can already re-order the extensions, even if they are out of orders. Not really sure if they can also re-order the single letter extensions, but at least we can do this for the multi-letter extensions in binutils. bfd/ * elfxx-riscv.c (riscv_parse_prefixed_ext): Removed the code which are used to check the prefixed extension orders. gas/ * testsuite/gas/riscv/march-fail-order-x-z.d: Removed since we will help tp reorder the prefixed extensions for now. * testsuite/gas/riscv/march-fail-order-x-z.l: Likewise. * testsuite/gas/riscv/march-fail-order-x.d: Likewise. * testsuite/gas/riscv/march-fail-order-x.l: Likewise. * testsuite/gas/riscv/march-fail-order-z.d: Likewise. * testsuite/gas/riscv/march-fail-order-z.l: Likewise.
2022-06-22RISC-V: Use single h extension to control hypervisor CSRs and instructions.Nelson Chu1-11/+5
According to the picture 28.1 in the current ISA spec, h is no larger the multi-letter extension, it is a single extension after v. Therefore, this patch fix the implementation, and use the single h to control hypervisor CSRs and instructions, which we promised to do before. bfd/ * elfxx-riscv.c (riscv_supported_std_ext): Added h with version 1.0 after v. (riscv_supported_std_h_ext): Removed. (riscv_all_supported_ext): Updated since riscv_supported_std_h_ext is removed. (riscv_prefix_ext_class): Removed RV_ISA_CLASS_H. (parse_config): Updated since riscv_prefix_ext_class is removed. (riscv_recognized_prefixed_ext): Likewise. (riscv_get_default_ext_version): Likewise. (riscv_multi_subset_supports): Handle INSN_CLASS_H for hypervisor instructions. (riscv_multi_subset_supports_ext): Likewise. gas/ * config/tc-riscv.c (riscv_csr_class): Added CSR_CLASS_H and CSR_CLASS_H_32 for hypervisor CSRs. (riscv_csr_address): Likewise. * testsuite/gas/riscv/csr-version-1p10.d: Updated since hypervisor CSRs are controlled by single h extension for now. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.l: Likewise. * testsuite/gas/riscv/h-ext-32.d: Added h to architecture string. * testsuite/gas/riscv/h-ext-64.d: Likewise. * testsuite/gas/riscv/march-fail-single-prefix-h: Removed since h is no longer multi-letter extension. * testsuite/gas/riscv/march-fail-unknown-h.d: Likewise. include/ * opcode/riscv-opc.h: Control hypervisor CSRs by h extension, rather than the privileged spec verisons. * opcode/riscv.h (riscv_insn_class): Added INSN_CLASS_H. opcodes/ * riscv-opc.c (riscv_opcodes): Control hypervisor instructions by h extension.
2022-06-22RISC-V: Add 'H' to canonical extension orderingTsukasa OI1-1/+1
This commit adds 'H' to canonical extension ordering based on current consensus (not officially ratified as a new ISA specification manual but discussion for software compatibility is made). bfd/ChangeLog * elfxx-riscv.c (riscv_ext_canonical_order): Add 'H' for canonical extension ordering based on current consensus.
2022-06-22RISC-V: Prepare i18n for required ISA extensionsTsukasa OI1-13/+14
Some strings returned by the riscv_multi_subset_supports_ext function contain not just extension names but words like "and" and "or". This commit wraps such strings with the gettext macro (_) for internationalization in the future. bfd/ChangeLog: * elfxx-riscv.c (riscv_multi_subset_supports_ext): Wrap some strings with the gettext macro to prepare future i18n.
2022-06-22PowerPC64: stub debug dumpAlan Modra1-2/+57
powerpc64le-linux-ld is failing the assertion in ppc_build_one_stub, again apparently, which means a stub will overwrite the tail of a previous stub. The difficulty with debugging these issues is that it's not a problem with the stub that triggers the assertion, but the previous stub in that section. This patch keeps track of the last stub and adds a debug dump. Hopefully that will help. * elf64-ppc.c (enum _ppc64_sec_type): Add sec_stub. (struct _ppc64_elf_section_data): Add u.last_ent. (dump_previous_stub): New function. (ppc_build_one_stub): Keep track of previous stub, and dump it when finding an overlapping stub.
2022-06-22Automatic date update in version.inGDB Administrator1-1/+1
2022-06-21Automatic date update in version.inGDB Administrator1-1/+1
2022-06-20Automatic date update in version.inGDB Administrator1-1/+1
2022-06-19Automatic date update in version.inGDB Administrator1-1/+1
2022-06-18Fix the sorting algorithm for reloc entriesTomoaki Kawada1-2/+10
The optimized insertion sort algorithm in `elf_link_adjust_relocs` incorrectly assembled "runs" from unsorted entries and inserted them to an already-sorted prefix, breaking the loop invariants of insertion sort. This commit updates the run assembly loop to break upon encountering a non-monotonic change in the sort key. PR 29259 bfd/ * elflink.c (elf_link_adjust_relocs): Ensure run being inserted is sorted. ld/ * testsuite/ld-elf/pr29259.d, * testsuite/ld-elf/pr29259.s, * testsuite/ld-elf/pr29259.t: New test.
2022-06-18Automatic date update in version.inGDB Administrator1-1/+1
2022-06-17Automatic date update in version.inGDB Administrator1-1/+1
2022-06-16Revert "Revert "Fix fbsd core matching""Alan Modra1-30/+10
This reverts commit 476288fa2bddecf0f0e13dee826a076309bf01fe.
2022-06-16Automatic date update in version.inGDB Administrator1-1/+1
2022-06-15PR29230, segv in lookup_symbol_in_variable_tableAlan Modra1-9/+42
The PR23230 testcase uses indexed strings without specifying SW_AT_str_offsets_base. In this case we left u.str with garbage (from u.val) which then led to a segfault when attempting to access the string. Fix that by clearing u.str. The patch also adds missing sanity checks in the recently committed read_indexed_address and read_indexed_string functions. PR 29230 * dwarf2.c (read_indexed_address): Return uint64_t. Sanity check idx. (read_indexed_string): Use uint64_t for str_offset. Sanity check idx. (read_attribute_value): Clear u.str for indexed string forms when DW_AT_str_offsets_base is not yet read or missing.
2022-06-15Automatic date update in version.inGDB Administrator1-1/+1
2022-06-14Revert "Fix fbsd core matching"Tom de Vries1-10/+30
This reverts commit a7e29f797cecd5a2f73c27838b09eae1f1b6c657. I accidentally pushed this, so revert.
2022-06-14Fix fbsd core matchingAlan Modra1-30/+10
On Thu, Jun 09, 2022 at 08:59:37AM -0700, John Baldwin wrote: > On 6/9/22 1:58 AM, Tom de Vries via Gdb-patches wrote: > > Hi, > > > > With an --enable-targets=all build and target board unix/-m32 I run into a > > FAIL in test-case gdb.base/corefile.exp: > > ... > > (gdb) file outputs/gdb.base/corefile/corefile^M > > Reading symbols from outputs/gdb.base/corefile/corefile...^M > > (gdb) core-file outputs/gdb.base/corefile/corefile.core^M > > warning: core file may not match specified executable file.^M > > [New LWP 12011]^M > > Core was generated by `outputs/gdb.base/corefile/co'.^M > > Program terminated with signal SIGABRT, Aborted.^M > > (gdb) FAIL: gdb.base/corefile.exp: core-file warning-free > > ... > > > > The warning is there because of this mismatch between core and exec: > > ... > > (gdb) p core_bfd->xvec > > $3 = (const struct bfd_target *) 0x20112a0 <i386_elf32_fbsd_vec> > > (gdb) p exec_bfd->xvec > > $4 = (const struct bfd_target *) 0x2010b00 <i386_elf32_vec> > > ... > > > > In the exec case, the detected architecture is i386_elf32_vec because this bit > > of code in elfcode.h:elf_object_p(): > > ... > > if (ebd->elf_machine_code != EM_NONE > > && i_ehdrp->e_ident[EI_OSABI] != ebd->elf_osabi > > && ebd->elf_osabi != ELFOSABI_NONE) > > goto got_wrong_format_error; > > ... > > prevents i386_elf32_fbsd from matching. > > > > Fix the core matching by copying that code to elfcore.h:elf_core_file_p(). > > > > Tested on x86_64-linux. > > > > Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=29227 > > > > Any comments? Looks good. > Looking at elfcore.h, it seems to have not gotten changes made to elfcode.h over > time and is a bit rotted. I suspect that all of changes made in commit 0aabe54e6222 > that added these lines in elfcode.h (along with several other changes) need to > be applied to this function in elfcore.h, not just adding these lines. Yes, the commit 0aabe54e6222 changes likely should go in too. I'm a little wary of adding all the sanity checks to elf_core_file_p since that might result in some core files not being recognised at all. For example, despite the FIXME I'd guess leaving out the EI_VERSION check was deliberate. The following seems reasonable to me. Please test.
2022-06-14BFD_RELOC_MIPS_16Alan Modra6-8/+6
MIPS should not be using BFD_RELOC_16 for its R_MIPS_16 relocation, since R_MIPS_16 specifies a 16-bit field in a 32-bit word. BFD_RELOC_16, emitted by generic code to handle fixups on 16-bit data directives, expects fixups to operate on the whole of a 16-bit word. This patch corrects the problem by using BFD_RELOC_MIPS_16, a new bfd reloc that is used to generate R_MIPS_16. BFD_RELOC_16 is handled in md_apply_fix for cases where the fixup can be applied at assembly time. Like BFD_RELOC_8, BFD_RELOC_16 now has no corresponding object file relocation, and thus .half, .hword, .short and .dc.w must be resolved at assembly time. BFD_RELOC_MIPS_REL16 is removed by this patch since it isn't used. PR 3243 PR 26542 * reloc.c (BFD_RELOC_MIPS_16): Rename from BFD_RELOC_MIPS_REL16. * elf32-mips.c (mips_reloc_map): Map BFD_RELOC_MIPS_16 to R_MIPS_16. * elf64-mips.c (mips_reloc_map): Likewise, delete BFD_RELOC_MIPS_REL16. * elfn32-mips.c (mips_reloc_map): Likewise. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ * config/tc-mips.c (append_insn): Handle BFD_RELOC_MIPS_16. (macro_build): Likewise. (mips_percent_op <%half>): Generate BFD_RELOC_MIPS_16. (md_apply_fix): Handle BFD_RELOC_16 and BFD_RELOC_MIPS_16 when fx_done. ld/ * testsuite/ld-mips-elf/reloc-local-overflow.d, * testsuite/ld-mips-elf/reloc-local-overflow.s: Rewrite.
2022-06-14Correct R_MIPS_16 n32 howtoAlan Modra1-1/+1
If the howto is actually used, an all-zero dst_mask will result in unchanged section contents on attempting to apply R_MIPS_16. * elfn32-mips.c (elf_mips_howto_table_rela <R_MIPS_16>): Correct dst_mask.
2022-06-14Automatic date update in version.inGDB Administrator1-1/+1
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2022-06-11Automatic date update in version.inGDB Administrator1-1/+1
2022-06-10Automatic date update in version.inGDB Administrator1-1/+1
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