aboutsummaryrefslogtreecommitdiff
path: root/bfd
AgeCommit message (Collapse)AuthorFilesLines
2019-05-23Automatic date update in version.inGDB Administrator1-1/+1
2019-05-22ARM STM32L4XX erratum test failure with MALLOC_PERTURB_Alan Modra2-1/+6
* elf32-arm.c (arm_allocate_glue_section_space): Clear section contents.
2019-05-22vms-alpha gas segfaultAlan Modra2-1/+9
* vms-alpha.c (_bfd_vms_write_etir): Don't attempt further processing on "size error in section".
2019-05-22bfdtest1 segfaults on hppa-hp-hpux10Alan Modra2-15/+20
The archive element cache needs tidying when closing an archive element. This patch fixes these failures: -FAIL: ar long file names (bfdtest1) -FAIL: ar thin archive (bfdtest1) -FAIL: ar thin archive with nested archive (bfdtest1) * som.c (som_bfd_free_cached_info): Call _bfd_generic_close_and_cleanup.
2019-05-22Automatic date update in version.inGDB Administrator1-1/+1
2019-05-21MIPS/LD: Reject tprel_hi and tprel_lo relocations in shared libraryFaraz Shahbazker2-0/+17
bfd/ * elfxx-mips.c (_bfd_mips_elf_check_relocs): Generate error for TLS_TPREL_HI16(/LO16) relocations in shared library. ld/ * testsuite/ld-mips-elf/pic-reloc-5.s: Add tests for %tprel_hi and %tprel_lo relocations. * testsuite/ld-mips-elf/pic-reloc-6.s: Likewise. * testsuite/ld-mips-elf/pic-reloc-5.d: Update accordingly. * testsuite/ld-mips-elf/pic-reloc-6.d: Likewise. * testsuite/ld-mips-elf/pic-reloc-tls.ld: New test linker script file.
2019-05-21MIPS/LD: Fix memory fault linking non-PIC object in to shared libraryFaraz Shahbazker2-8/+16
bfd/ * elfxx-mips.c (_bfd_mips_elf_check_relocs): Add NULL pointer checks. Search the RELA table for n64 relocations. ld/ * testsuite/ld-mips-elf/pic-reloc-5.d: New test. * testsuite/ld-mips-elf/pic-reloc-6.d: New test. * testsuite/ld-mips-elf/pic-reloc-7.d: New test. * testsuite/ld-mips-elf/pic-reloc-5.s: New test source. * testsuite/ld-mips-elf/pic-reloc-6.s: New test source. * testsuite/ld-mips-elf/pic-reloc-7.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2019-05-21[MIPS] Add generation of PLT entries with compact jumps for MIPS R6Matthew Fortune3-12/+138
Add a new option to get the linker to emit PLTs that use compact branches instead of delay slot branches. bfd/ * elfxx-mips.c (LA25_BC): New macro. (mips_elf_link_hash_table)<compact_branches>: New field. (STUB_JALRC): New macro. (mipsr6_o32_exec_plt0_entry_compact): New array. (mipsr6_n32_exec_plt0_entry_compact): Likewise. (mipsr6_n64_exec_plt0_entry_compact): Likewise. (mipsr6_exec_plt_entry_compact): Likewise. (mips_elf_create_la25_stub): Use BC instead of J for stubs when compact_branches is true. (_bfd_mips_elf_finish_dynamic_symbol): Choose the compact PLT for MIPSR6 with compact_branches. Do not reorder the compact branches PLT. Switch the lazy stub for MIPSR6 with compact_branches to use JALRC. (mips_finish_exec_plt): Choose the compact PLT0 for MIPSR6 when compact_branches is true. (_bfd_mips_elf_compact_branches): New function. * elfxx-mips.h (_bfd_mips_elf_compact_branches): New prototype. ld/ * emultempl/mipself.em (compact_branches): New static variable. (mips_create_output_section_statements): Call _bfd_mips_elf_compact_branches. (PARSE_AND_LIST_PROLOGUE): Add OPTION_COMPACT_BRANCHES and OPTION_NO_COMPACT_BRANCHES. (PARSE_AND_LIST_LONGOPTS): Add compact-branches, no-compact-branches. (PARSE_AND_LIST_OPTIONS): Add --compact-branches, --no-compact-branches. (PARSE_AND_LIST_ARGS_CASES): Handle the above. * ld.texinfo: Document --compact-branches, --no-compact-branches. * testsuite/ld-mips-elf/pic-and-nonpic-1-r6.dd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1-r6.nd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.dd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.gd: New test. * testsuite/ld-mips-elf/pic-and-nonpic-1a-r6.s: New test source. * testsuite/ld-mips-elf/pic-and-nonpic-3a-r6.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2019-05-21AArch64: Fix -Werror on buildTamar Christina2-1/+7
This patch fixes a hardcoded `l` specifier on a `bfd_signed_vma`. Instead this now uses BFD_VMA_FMT which fixes the build on 32 bit hosts. Committed under the obvious rule. bfd/ChangeLog: PR ld/24373 * elfnn-aarch64.c (_bfd_aarch64_erratum_843419_branch_to_stub): Fix print formatter.
2019-05-21[binutils][Arm] Fix Branch Future relocation handling and testismsAndre Vieira2-69/+12
bfd/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> PR/target 24460 * elf32-arm.c (get_value_helper): Remove. (elf32_arm_final_link_relocate): Fix branch future relocations. gas/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> * testsuite/gas/arm/armv8_1-m-bf.d: Allow different branch target naming conventions. * testsuite/gas/arm/armv8_1-m-bfl.d: Likewise. * testsuite/gas/arm/armv8_1-m-bfcsel.d: Likewise. * testsuite/gas/arm/armv8_1-m-loloop.d: Likewise. * testsuite/gas/arm/armv8_1-m-bf-rel.d: Skip for vxworks. * testsuite/gas/arm/armv8_1-m-bf-rela.d: New test. * testsuite/gas/arm/armv8_1-m-bfl-rel.d: Skip for vxworks. * testsuite/gas/arm/armv8_1-m-bfl-rela.d: New test. ld/ChangeLog: 2019-05-21 Andre Vieira <andre.simoesdiasvieira@arm.com> * testsuite/ld-arm/arm-elf.exp: Add tests * testsuite/ld-arm/bfs-0.s: New test. * testsuite/ld-arm/bfs-1.s: New test. * testsuite/ld-arm/branch-futures.d: New test.
2019-05-21AArch64: Implement choice between Cortex-A53 erratum workarounds. (PR ld/24373)Tamar Christina4-23/+95
The Cortex-A53 erratum currently has two ways it can resolve the erratum when using the flag --fix-cortex-a53-843419: 1) If the address is within the range of an ADR instruction it rewrites the ADRP into an ADR, and those doesn't need the use of a veneer. 2) If the address is not within range, it adds a branch to a veneer which will execute the final bit of the erratum workaround and branch back to the call site. When we do this we always generate the veneers and we always align the size of the text section to 4KB. This is because we only know which workaround we can use after all linking has finished and all addresses are known. This means even though the veneers are not used, we still generate the section and we still change the size of the input section. This is problematic for small memory devices as this would require the user to take about a ~4KB hit in memory even though it's not even used. Since there's no real way to restart the linking process from the final write phase this patch solves the issue by allowing the user more control over which erratum workaround gets used. Concretely this changes the option --fix-cortex-a53-843419 to take optional arguments --fix-cortex-a53-843419[=full|adr|adrp] - full (default): Use both ADRP and ADR workaround. This is equivalent to not specifying any options and is the default behavior before this patch. - adr: Only use the ADR workaround, this will not cause any increase in binary size but linking will fail if the referenced address is out of range of an ADR instruction. - adrp: Use only the ADRP workaround, this will never rewrite your ADRP. In the cases where the user knows how big their binaries are the `adr` option would prevent the unneeded overhead. bfd/ChangeLog: PR ld/24373 * bfd-in.h (enum erratum_84319_opts): New (bfd_elf64_aarch64_set_options, bfd_elf32_aarch64_set_options): Change int to enum erratum_84319_opts. * bfd-in2.h: Regenerate. * elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Change fix_erratum_843419 to use new enum, remove fix_erratum_843419_adr. (_bfd_aarch64_add_stub_entry_after): Conditionally create erratum stub. (aarch64_size_one_stub): Conditionally size erratum 843419 stubs. (_bfd_aarch64_resize_stubs): Amend comment. (elfNN_aarch64_size_stubs): Don't generate stubs when no workaround requested. (bfd_elfNN_aarch64_set_options): Use new fix_erratum_843419 enum. (_bfd_aarch64_erratum_843419_branch_to_stub): Implement selection of erratum workaround. (clear_erratum_843419_entry): Update erratum conditional. ld/ChangeLog: PR ld/24373 * emultempl/aarch64elf.em (PARSE_AND_LIST_LONGOPTS): Add optional args to flags. * NEWS: Add changes to flag. (PARSE_AND_LIST_OPTIONS): Update help descriptions. (PARSE_AND_LIST_ARGS_CASES): Add new options to parser. * testsuite/ld-aarch64/aarch64-elf.exp: Add new run_dump_tests. * testsuite/ld-aarch64/erratum843419-adr.d: New test. * testsuite/ld-aarch64/erratum843419-adrp.d: New test. * testsuite/ld-aarch64/erratum843419-far-adr.d: New test. * testsuite/ld-aarch64/erratum843419-far-full.d: New test. * testsuite/ld-aarch64/erratum843419-far.s: New test. * testsuite/ld-aarch64/erratum843419-full.d: New test. * testsuite/ld-aarch64/erratum843419-near.s: New test. * testsuite/ld-aarch64/erratum843419-no-args.d: New test.
2019-05-21Fix PR 24571 - Relaxation does not shorten jmp or call to target at ↵Senthil Kumar Selvaraj2-3/+21
pc-relative range boundary The range check done to transform an absolute call/jump to a pc-relative one is off-by-one, and that causes this shortening optimization to be missed if the branch target is right at the range boundary. In the non-shrinkable case, the range is what is mentioned in the ISA - -4094 bytes in the backward direction, and 4096 bytes in the positive direction. In the shrinkable case, the forward jump range increases by two bytes (deleted because of the shortening from call/jmp to rcall/rjmp), and therefore, the range is -4094 in the reverse, and 4098 in the positive direction. Fix the ranges for !shrinkable and shrinkable cases, and add a test caes to ensure jumps to max forward and backward ranges get relaxed to rjmp.
2019-05-21Fix PR 24564 - link fails for some rcalls/rjmps with wraparoundSenthil Kumar Selvaraj2-1/+7
The current code to compute relative distance in the wrap around case does not handle the edge case of the target (after adjusting for implicit PC increment) being exactly half of the wrap around distance. This patch fixes that and adds a testcase. The range for a forward relative jump call is 4096 bytes ((2 * 2047) + (2 bytes for the implicit PC increment)). If the target of the jump is at a distance of 4098 bytes, it is out of range for a forward jump - however, a backward jump can still reach that address if pmem-wrap-around is 8192. Assume address 0 has rjmp to address 4098. With a wrap around of 8192 and *without* adjusting for the implicit PC increment of 2 bytes, rjmp .-4096 will jump to address 4096 (wrap around at 8192 and decreasing addresses from then on). Adjusting 2 bytes for the implicit PC increment, the actual target is 4098. avr_relative_distance_considering_wrap_around though, does the wrap around only if the passed in distance is less than half of the wrap around distance. In this case, it is exactly equal to half (original distance 4098, adjusted distance of 4096 and wraparound of 8192), and the bypassed wrap around causes the reloc overflow error. Fix by wrapping around even if adjusted distance is equal to half of wrap around distance.
2019-05-21Automatic date update in version.inGDB Administrator1-1/+1
2019-05-20Updated translations for various binutils subdirectories.Nick Clifton2-3/+7
bfd * po/fr.po: Updated French translation. binutils* po/ca.po: Updated Catalan translation. gprof * po/de.po: Updated German translation. opcodes * po/fr.po: Updated French translation.
2019-05-20Automatic date update in version.inGDB Administrator1-1/+1
2019-05-19Automatic date update in version.inGDB Administrator1-1/+1
2019-05-18Automatic date update in version.inGDB Administrator1-1/+1
2019-05-17Automatic date update in version.inGDB Administrator1-1/+1
2019-05-16[PATCH 1/57][Arm][GAS]: Add support for +mve and +mve.fpAndre Vieira2-0/+5
bfd/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * elf32-arm.c (elf32_arm_merge_eabi_attributes): Add case for Tag_MVE_arch. binutils/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * readelf.c (arm_attr_tag_MVE_arch): New array for Tag_MVE_arch values. (arm_attr_public_tag arm_attr_public_tags): Add case for Tag_MVE_arch. elfcpp/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * arm.h (Tag_MVE_arch): Define new enum value. gas/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (mve_ext, mve_fp_ext): New features. (armv8_1m_main_ext_table): Add new extensions. (aeabi_set_public_attributes): Translate new features to new build attributes. (arm_convert_symbolic_attribute): Add Tag_MVE_arch. * doc/c-arm.texi: Document new extensions and new build attribute. include/ChangeLog: 2019-05-16 Andre Vieira <andre.simoesdiasvieira@arm.com> * elf/arm.h (Tag_MVE_arch): Define new enum value. * opcode/arm.h (FPU_MVE, FPU_MVE_FP): New MACROs for new features.
2019-05-16Revert "ARM STM32L4XX erratum test failure"Alan Modra2-6/+7
This reverts commit 3a1bb98c3c4f983b950fbaf2797ddcd21fcb5211.
2019-05-16Automatic date update in version.inGDB Administrator1-1/+1
2019-05-15ARM STM32L4XX erratum test failureAlan Modra2-3/+12
Fixes a failure seen with MALLOC_PERTURB_=1. * elf32-arm.c (elf32_arm_write_section): Don't leave error case of STM32L4XX_ERRATUM_BRANCH_TO_VENEER with unitialised section contents.
2019-05-15Automatic date update in version.inGDB Administrator1-1/+1
2019-05-14Add new option to objcopy: --verilog-data-width. Use this option to set the ↵Jamey Hicks2-10/+76
size of byte bundles generated in verilog format files. PR 19921 binutils* objcopy.c: Add new option --verilog-data-width. Use it to set the value of VerilogDataWidth. * doc/binutils.texi: Document the new option. * testsuite/binutils-all/objcopy.exp: Run tests of new option. * testsuite/binutils-all/verilog-1.hex: New file. * testsuite/binutils-all/verilog-2.hex: New file. * testsuite/binutils-all/verilog-4.hex: New file. * testsuite/binutils-all/verilog-8.hex: New file. * NEWS: Mention the new feature. bfd * verilog.c: (VerilogDataWidth): New variable. (verilog_write_record): Emit bytes in VerilogDataWidth bundles.
2019-05-14Automatic date update in version.inGDB Administrator1-1/+1
2019-05-13Automatic date update in version.inGDB Administrator1-1/+1
2019-05-12Automatic date update in version.inGDB Administrator1-1/+1
2019-05-11Automatic date update in version.inGDB Administrator1-1/+1
2019-05-10Automatic date update in version.inGDB Administrator1-1/+1
2019-05-09Automatic date update in version.inGDB Administrator1-1/+1
2019-05-08Do not force the m68k-elf linker to fail if it encoutners a non-ELF format file.Nick Clifton2-2/+10
PR 24523 * elf32-m68k.c (elf32_m68k_merge_private_bfd_data): Return TRUE rather than FALSE if encountering a non-ELF file.
2019-05-08Automatic date update in version.inGDB Administrator1-1/+1
2019-05-07Automatic date update in version.inGDB Administrator1-1/+1
2019-05-06PicoJava weak undefined symbolsAlan Modra2-0/+5
This fixes the recently added ld-elf/pr24511 test failure on pj-elf. Incidentally, pj-elf has failed its gas "pj" test since 2005-12-22 (git commit 54758c3e39). I think that makes the target ripe for obsolescence. bfd/ * elf32-pj.c (pj_elf_reloc): Don't report undefined weak as an error. ld/ * testsuite/ld-undefined/weak-undef.exp: Don't xfail pj.
2019-05-06PowerPC reloc symbols that shouldn't be adjustedAlan Modra4-16/+24
GOT and PLT relocs shouldn't have their symbols replaced with a section symbol plus added. Nor should the HIGHA TLS relocations, which failed to be caught by the range test in ppc_fix_adjustable. bfd/ * reloc.c (BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA), (BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): Sort before BFD_RELOC_PPC64_DTPREL16_HIGHESTA entry. gas/ * config/tc-ppc.c (ppc_fix_adjustable): Exclude all GOT and PLT relocs, and VLE sdarel relocs. * testsuite/gas/ppc/power4.d: Adjust.
2019-05-06Automatic date update in version.inGDB Administrator1-1/+1
2019-05-05Automatic date update in version.inGDB Administrator1-1/+1
2019-05-04PR24511, nm should not mark symbols in .init_array as "t"Alan Modra3-11/+28
This patch restricts the section names matched in coff_section_type, a function that translates section names to symbol type, and arranges to translate section flags to symbol type before looking at names. The latter change resulted in various test failures due to improper section flags being used in tests, and by the plugin support, so fix that too. The new test fails on many ELF targets that lack .init/fini_array in their scripts. I've just xfailed those. pru-elf oddly defines __init_array_begin rather than __init_array_start. I've left that target as a FAIL, and pj-elf too which reports an error for undefined weak symbols. bfd/ PR 24511 * syms.c (coff_section_type): Only allow '.', '$' and numeric following the standard section names. (bfd_decode_symclass): Prioritize section flag tests in decode_section_type before name tests in coff_section_type. * plugin.c (bfd_plugin_canonicalize_symtab): Init fake_section and fake_common_section using BFD_FAKE_SECTION. Use "fake" as their names and choose standard .text section flags for fake_section. ld/ PR 24511 * testsuite/ld-elf/pr14156a.d: Allow for .init/.fini being a data section on hppa64. * testsuite/ld-elf/pr14156b.d: Likewise. * testsuite/ld-scripts/pr18963.t: Map standard sections to set output section flags. * testsuite/ld-scripts/sane1.t: Likewise. * testsuite/ld-elf/init-fini-arrays.s: Reference __init_array_start and __fini_array_start. Define __start et al. * testsuite/ld-elf/pr24511.d: New test.
2019-05-04Automatic date update in version.inGDB Administrator1-1/+1
2019-05-03Automatic date update in version.inGDB Administrator1-1/+1
2019-05-02Treat the .gnu.debuglink and .gnu.debugaltlink sections as debug sections ↵Nick Clifton2-0/+11
when reading them in from COFF/PE format files. PR 24493 * coffcode.h (styp_to_sec_flags): Treat .gnu.debuglink and .gnu.debugaltlink sections as debugging sections.
2019-05-02Automatic date update in version.inGDB Administrator1-1/+1
2019-05-01Automatic date update in version.inGDB Administrator1-1/+1
2019-04-30PowerPC64 GOT indirect to GOT relative optimisationAlan Modra2-3/+216
This implements an optimisation that converts sequences like addis r9,r2,sym@got@ha ld r3,sym@got@l(r9) to addis r9,r2,sym@toc@ha addi r3,r9,sym@toc@l when "sym" is locally defined and can't be overridden. bfd/ * elf64-ppc.c (struct ppc64_elf_obj_tdata): Add has_gotrel. (struct _ppc64_elf_section_data): Likewise. (ppc64_elf_check_relocs): Set above fields. (ppc64_elf_edit_toc): Add a pass over GOT relocs. (ppc64_elf_relocate_section): Edit GOT indirect to GOT relative when possible. ld/ * testsuite/ld-powerpc/elfv2exe.d: Update. * testsuite/ld-powerpc/elfv2so.d: Update. * testsuite/ld-powerpc/tocopt.d: Update. * testsuite/ld-powerpc/tocopt.s: Update. * testsuite/ld-powerpc/tocopt5.d: Update. * testsuite/ld-powerpc/tocopt5.s: Update. * testsuite/ld-powerpc/tocopt7.d: Update. * testsuite/ld-powerpc/tocopt7.s: Update. * testsuite/ld-powerpc/tocopt8.d: Update. * testsuite/ld-powerpc/tocopt8.s: Update.
2019-04-30Automatic date update in version.inGDB Administrator1-1/+1
2019-04-29Automatic date update in version.inGDB Administrator1-1/+1
2019-04-28Automatic date update in version.inGDB Administrator1-1/+1
2019-04-27Automatic date update in version.inGDB Administrator1-1/+1
2019-04-26Don't complain undefined weak dynamic referenceH.J. Lu2-1/+7
When undefined non-weak references in IR objects are optimized out by LTO, we can have weak dynamic referencs to symbols marked with bfd_link_hash_undefined. We shouldn't complain such undefined weak dynamic references. bfd/ PR ld/24486 * elflink.c (elf_link_output_extsym): Don't complain undefined weak dynamic reference. ld/ PR ld/24486 * testsuite/ld-plugin/lto.exp: Run PR ld/24486 tests. * testsuite/ld-plugin/pr24486a.c: New file. * testsuite/ld-plugin/pr24486b.c: Likewise. * testsuite/ld-plugin/pr24486c.c: Likewise.
generated by cgit v1.1 at 2024-09-07 13:00:31 +0000