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2022-11-25riscv: Add AIA extension support (Smaia, Ssaia)Christoph Müllner14-0/+954
This commit adds the AIA extensions (Smaia and Ssaia) CSRs. bfd/ChangeLog: * elfxx-riscv.c: Add 'smaia' and 'ssaia' to the list of known standard extensions. gas/ChangeLog: * config/tc-riscv.c (enum riscv_csr_class): (riscv_csr_address): Add CSR classes for Smaia/Ssaia. * testsuite/gas/riscv/csr-dw-regnums.d: Add new CSRs. * testsuite/gas/riscv/csr-dw-regnums.s: Likewise. * testsuite/gas/riscv/csr-version-1p10.d: Likewise. * testsuite/gas/riscv/csr-version-1p10.l: Likewise. * testsuite/gas/riscv/csr-version-1p11.d: Likewise. * testsuite/gas/riscv/csr-version-1p11.l: Likewise. * testsuite/gas/riscv/csr-version-1p12.d: Likewise. * testsuite/gas/riscv/csr-version-1p12.l: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.d: Likewise. * testsuite/gas/riscv/csr-version-1p9p1.l: Likewise. * testsuite/gas/riscv/csr.s: Likewise. include/ChangeLog: * opcode/riscv-opc.h (CSR_MISELECT): New CSR macro. (CSR_MIREG): Likewise. (CSR_MTOPEI): Likewise. (CSR_MTOPI): Likewise. (CSR_MVIEN): Likewise. (CSR_MVIP): Likewise. (CSR_MIDELEGH): Likewise. (CSR_MIEH): Likewise. (CSR_MVIENH): Likewise. (CSR_MVIPH): Likewise. (CSR_MIPH): Likewise. (CSR_SISELECT): Likewise. (CSR_SIREG): Likewise. (CSR_STOPEI): Likewise. (CSR_STOPI): Likewise. (CSR_SIEH): Likewise. (CSR_SIPH): Likewise. (CSR_HVIEN): Likewise. (CSR_HVICTL): Likewise. (CSR_HVIPRIO1): Likewise. (CSR_HVIPRIO2): Likewise. (CSR_VSISELECT): Likewise. (CSR_VSIREG): Likewise. (CSR_VSTOPEI): Likewise. (CSR_VSTOPI): Likewise. (CSR_HIDELEGH): Likewise. (CSR_HVIENH): Likewise. (CSR_HVIPH): Likewise. (CSR_HVIPRIO1H): Likewise. (CSR_HVIPRIO2H): Likewise. (CSR_VSIEH): Likewise. (CSR_VSIPH): Likewise. (DECLARE_CSR): Add CSRs for Smaia and Ssaia. Changes for v3: - Imply ssaia for smaia - Imply zicsr for ssaia (and transitively smaia) - Move hypervisor CSRs to Ssaia+H - Rebase on upstream/master Changes for v2: - Add hypervisor and VS CSRs - Fix whitespace issue Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2022-11-25Automatic date update in version.inGDB Administrator1-1/+1
2022-11-24sframe/doc: remove usage of xrefautomaticsectiontitleIndu Bhagat1-5/+2
xrefautomaticsectiontitle appears to be available from texinfo 5.0 or greater. As such, it is not worthwhile to add requirement for a minimum necessary makeinfo version. So remove the usage of it. Also align node name with section title where possible. ChangeLog: * libsframe/doc/sframe-spec.texi: Remove usage of xrefautomaticsectiontitle.
2022-11-24gdb: fix typo in debug output messageAndrew Burgess1-1/+1
Spotted a minor type, a missing ')', in a debug message.
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_breakSimon Marchi1-307/+293
Move all the remaining tests to a single test_break proc. It's a bit big, but all of these are kind of tied together. The procs starts by setting breakpoints, checks that we can see them in "info breakpoints", and tries stopping on them. Move all the "set bp_locationX" calls together at the top. Change-Id: Id05f98957e1a3462532d2dbd577cd0a7c7263900 Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_tbreakSimon Marchi1-46/+36
Leave setting bp_location11 in the global scope, so that it's accessible to other procs. Change-Id: I8928f01640d3a1e993649b2168b9eda0724ee1d9 Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_no_break_on_catchpointSimon Marchi1-11/+17
Change-Id: Ifa7070943f1de22c2839fedf5f346d6591bb5a76 Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_break_nonexistent_lineSimon Marchi1-5/+15
Change-Id: I4390dd5da23bae83ccc513ad0de0169ddff7df12 Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_break_defaultSimon Marchi1-25/+37
One special thing here is that the part just above this one, that sets catchpoints and verifies they are not hit, requires that we resume execution to verify that the catchpoints are indeed not hit. I guess it was previously achieved by the until command, but it doesn't happen now that the until is moved into test_break_default. Add a gdb_continue_to_end after setting the catchpoints. If any catchpoint were to be hit, it would catch the problem. Change-Id: I5d4b43da91886b1beda9f6e56b05aa04331a9c05 Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_break_silent_and_moreSimon Marchi1-56/+62
This one is a bit tricky. The clear tests seem to depend on the various breakpoints that have been set before, starting with the "silent" breakpoints. So, move all this in a single chunk, it can always be split later if needed. Change-Id: I7ba61a5b130ade63eda0c4790534840339f8a72f Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_break_line_convenience_varSimon Marchi1-5/+11
Change-Id: I593002373da971a0a4d6b5355d3fe321873479ab Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_break_user_callSimon Marchi1-22/+32
Change-Id: I9151ce9db9435722b758f41c6606b461bf15f320 Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_finish_argumentsSimon Marchi1-22/+28
Change-Id: Id84babed1eeb3ce7d14b94ff332795964e8ead51 Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: use proc_with_prefix for ↵Simon Marchi1-1/+1
test_next_with_recursion This one is already in a proc, just make the proc use proc_with_prefix, for consistency. Change-Id: I313ecf5097ff04526c29396529baeba84e37df5a Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_break_optimized_prologueSimon Marchi1-51/+48
Change-Id: Ibf17033c8ce72aa5cfe1b739be2902e84a5e945d Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_rbreak_shlibSimon Marchi1-18/+18
Change-Id: I130e8914c2713095aab03e84aba1481b4c7af978 Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_break_file_line_convenience_varSimon Marchi1-6/+8
Change-Id: I0c31b037669b2917e062bf431372fb6531f8f53c Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24gdb/testsuite/gdb.base/break.exp: split test_break_commands_clearSimon Marchi1-8/+16
Change-Id: Ia58f90117d52fc419fc494836d9b4ed5d902fe9b Approved-By: Kevin Buettner <kevinb@redhat.com>
2022-11-24Impport libiberty commit: 885b6660c17f from gcc mainline. Fix gas's ↵Nick Clifton4-6/+24
acinclude.m4 to stop a potwntial configure time warning message.
2022-11-24readelf: Do not require EI_OSABI for IFUNC.Martin Liska1-5/+3
PR 29718 binutils/ChangeLog: * readelf.c (get_symbol_type): Consider STT_GNU_IFUNC as reserved name.
2022-11-24x86: widen applicability and use of CheckRegSizeJan Beulich5-23/+79
First of all make operand_type_register_match() apply to all sized operands, i.e. in Intel Syntax also to respective memory ones. This addresses gas wrongly accepting certain SIMD insns where register and memory operand sizes should match but don't. This apparently has affected all templates with one memory-only operand and one or more register ones, both permitting at least two sizes, due to CheckRegSize not taking effect. Then also add CheckRegSize to a couple of non-SIMD templates matching that same pattern of memory-only vs register operands. This replaces bogus (for Intel Syntax) diagnostics referring to a wrong suffix (when none was used at all) by "type mismatch" ones, just like already emitted for insns where the template allows a register operand alongside a memory one at any particular position. This also is a prereq to limiting (ideally eliminating in the long run) suffix "derivation" in Intel Syntax mode. While making the code adjustment also flip order of checks to do the cheaper one first in both cases.
2022-11-24x86: add missing CheckRegSizeJan Beulich2-6/+6
To properly and predictably determine operand size encoding (operand size or REX.W prefixes), consistent operand sizes need to be specified. Add CheckRegSize where this was previously missing.
2022-11-24x86: correct handling of LAR and LSLJan Beulich9-26/+116
Both uniformly only ever take 16-bit memory operands while at the same time requiring matching (in size) register operands, which then also should disassemble that way. This in particular requires splitting each of the templates for the assembler and separating decode of the register and memory forms in the disassembler.
2022-11-24Tidy objdump printing of section sizeAlan Modra1-2/+2
* objdump.c (load_specific_debug_section): Use PRIx64 format.
2022-11-24Constify nm format arrayAlan Modra1-2/+2
* nm.c (formats, format): Make const.
2022-11-24PR16995, m68k coldfire emac immediate to macsr incorrect disassemblyAlan Modra1-2/+2
Mode/reg bits for these insns are 000 Dy, 001 Ay, and 111 100 for the move immediate. * m68k-opc.c (m68k_opcodes): Only accept 000 and 001 as mode for move reg to macsr/mask insns.
2022-11-24gas: Disable --gcodeview on PE targets with no O_secrelMark Harmstone2-5/+5
2022-11-24Automatic date update in version.inGDB Administrator1-1/+1
2022-11-23gdb/arm: Include FType bit in EXC_RETURN pattern on v8mTorbjörn SVENSSON1-6/+13
For v8m, the EXC_RETURN pattern, without security extension, consists of FType, Mode and SPSEL. These are the same bits that are used in v7m. This patch extends the list of patterns to include also the FType bit and not just Mode and SPSEL bits for v8m targets without security extension. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
2022-11-23regen POTFILES.inAlan Modra1-0/+2
2022-11-23PR22509 - Null pointer dereference on coff_slurp_reloc_tableAlan Modra11-11/+18
This extends the commit 4581a1c7d304 fix to more targets, which hardens BFD a little. I think the real underlying problem was the bfd_canonicalize_reloc call in load_specific_debug_section which passed a NULL for "symbols". Fix that too. PR 22509 bfd/ * aoutx.h (swap_ext_reloc_out): Gracefully handle NULL symbols. * i386lynx.c (swap_ext_reloc_out): Likewise. * pdp11.c (pdp11_aout_swap_reloc_out): Likewise. * coff-tic30.c (reloc_processing): Likewise. * coff-tic4x.c (tic4x_reloc_processing): Likewise. * coff-tic54x.c (tic54x_reloc_processing): Likewise. * coff-z80.c (reloc_processing): Likewise. * coff-z8k.c (reloc_processing): Likewise. * ecoff.c (ecoff_slurp_reloc_table): Likewise. * som.c (som_set_reloc_info): Likewise. binutils/ * objdump.c (load_specific_debug_section): Pass syms to bfd_canonicalize_reloc.
2022-11-23asan: NULL deref in filter_symbolsAlan Modra1-0/+1
If tdata->symbols is NULL, make tdata->symcount zero too. This makes wasm_get_symtab_upper_bound return the proper result and stops cascading errors. * wasm-module.c (wasm_scan_name_function_section): Clear tdata->symcount on error.
2022-11-23Document the memory_tagged argument for memory region callbacksLuis Machado3-5/+20
There were no comments in some instances (gdb/defs.h, gdb/core.c and gdb/linux-tdep.c), so address that by adding comments where those are missing.
2022-11-23Fix gdb.cp/gdb2495.exp on powerpc64leTom de Vries1-9/+33
On powerpc64le-linux I ran into this FAIL: ... (gdb) p exceptions.throw_function()^M terminate called after throwing an instance of 'int'^M ^M Program received signal SIGABRT, Aborted.^M 0x00007ffff7979838 in raise () from /lib64/libc.so.6^M The program being debugged was signaled while in a function called from GDB.^M GDB remains in the frame where the signal was received.^M To change this behavior use "set unwindonsignal on".^M Evaluation of the expression containing the function^M (SimpleException::throw_function()) will be abandoned.^M When the function is done executing, GDB will silently stop.^M (gdb) FAIL: gdb.cp/gdb2495.exp: call a function that raises an exception \ without a handler. ... The following happens: - we start an inferior call - an internal breakpoint is set on the global entry point of std::terminate - the inferior call uses the local entry point - the breakpoint is not triggered - we run into std::terminate We can fix this by simply adding the missing gdbarch_skip_entrypoint call in create_std_terminate_master_breakpoint, but we try to do this a bit more generic, by: - adding a variant of function create_internal_breakpoint which takes a minimal symbol instead of an address as argument - in the new function: - using both gdbarch_convert_from_func_ptr_addr and gdbarch_skip_entrypoint - documenting why we don't need to use gdbarch_addr_bits_remove - adding a note about possibly needing gdbarch_deprecated_function_start_offset. - using the new function in: - create_std_terminate_master_breakpoint - create_exception_master_breakpoint_hook, which currently uses only gdbarch_convert_from_func_ptr_addr. Note: we could use the new function in more locations in breakpoint.c, but as we're not aware of any related failures, we declare this out of scope for this patch. Tested on x86_64-linux, powerpc64le-linux. Co-Authored-By: Ulrich Weigand <uweigand@de.ibm.com> Tested-by: Carl Love <cel@us.ibm.com> PR tdep/29793 Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=29793
2022-11-23RISC-V: Make R_RISCV_SUB6 conforms to riscv ABI standardXiao Zeng2-0/+13
According to the riscv psabi, R_RISCV_SUB6 only allows 6 least significant bits are valid, but since binutils implementation, we usually get 8 bits field for it. That means, the high 2 bits could be other field and have different purpose. Therefore, we should filter the 8 bits to 6 bits before calculate, and then only encode the valid 6 bits back. By the way, we also need the out-of-range check for R_RISCV_SUB6, and the overflow checks for all R_RISCV_ADD/SUB/SET relocations, but we can add them in the future patches. Passing riscv-gnu-toolchain regressions. bfd/ChangeLog: * elfnn-riscv.c (riscv_elf_relocate_section): Take the R_RISCV_SUB6 lower 6 bits as the significant bit. * elfxx-riscv.c (riscv_elf_add_sub_reloc): Likewise.
2022-11-23gas: Add --gcodeview optionMark Harmstone11-4/+1018
2022-11-23ld: Add section contributions substream to PDB filesMark Harmstone6-5/+162
2022-11-23Automatic date update in version.inGDB Administrator1-1/+1
2022-11-22aarch64-fbsd: Use a static regset for the TLS register set.John Baldwin3-49/+44
This uses custom collect/supply regset handlers which pass the TLS register number from the gdbarch_tdep as the base register number. Approved-By: Simon Marchi <simon.marchi@efficios.com>
2022-11-22arm-fbsd: Use a static regset for the TLS register set.John Baldwin3-46/+43
This uses custom collect/supply regset handlers which pass the TLS register number from the gdbarch_tdep as the base register number. Approved-By: Simon Marchi <simon.marchi@efficios.com>
2022-11-22fbsd-nat: Pass an optional register base to the register set helpers.John Baldwin2-30/+41
This is needed to permit using the helpers for register sets with a variable base. In particular regnum needs to be converted into a relative register number before passed to regcache_map_supplies. Approved-By: Simon Marchi <simon.marchi@efficios.com>
2022-11-22fbsd-nat: Use regset supply/collect methods.John Baldwin1-4/+4
fbsd-nat includes various helper routines for fetching and storing register sets via ptrace where the register set is described by a regset. These helper routines directly invoke the supply/collect_regset regcache methods which doesn't permit a regset to provide custom logic when fetching or storing a register set. Instead, just use the function pointers from the struct regset directly. Approved-By: Simon Marchi <simon.marchi@efficios.com>
2022-11-22regcache: Add collect/supply_regset variants that accept a register base.John Baldwin2-10/+37
Some register sets described by an array of regcache_map_entry structures do not have fixed register numbers in their associated architecture but do describe a block of registers whose numbers are at fixed offsets relative to some base register value. An example of this are the TLS register sets for the ARM and AArch64 architectures. Currently OS-specific architectures create register maps and register sets dynamically using the register base number. However, this requires duplicating the code to create the register map and register set. To reduce duplication, add variants of the collect_regset and supply_regset regcache methods which accept a base register number. For valid register map entries (i.e. not REGCACHE_MAP_SKIP), add this base register number to the value from the map entry to determine the final register number. Approved-By: Simon Marchi <simon.marchi@efficios.com>
2022-11-22x86: Don't define _TLS_MODULE_BASE_ for ld -rH.J. Lu4-1/+20
bfd/ PR ld/29820 * elfxx-x86.c (_bfd_x86_elf_always_size_sections): Don't define _TLS_MODULE_BASE_ for ld -r. ld/ PR ld/29820 * testsuite/ld-x86-64/pr29820.d: New file. * testsuite/ld-x86-64/pr29820.s: Likewise. * testsuite/ld-x86-64/x86-64.ex: Run pr29820.
2022-11-23Don't use "long" in readelf for file offsetsAlan Modra5-499/+532
The aim here is to improve readelf handling of large 64-bit object files on LLP64 hosts (Windows) where long is only 32 bits. The patch changes more than just file offsets. Addresses and sizes are also changed to avoid "long". Most places get to use uint64_t even where size_t may be more appropriate, because that allows some overflow checks to be implemented easily (*alloc changes). * dwarf.c (cmalloc, xcmalloc, xcrealloc, xcalloc2): Make nmemb parameter uint64_t. * dwarf.h: Update prototypes. (struct dwarf_section): Make num_relocs uint64_t. * elfcomm.c (setup_archive): Update error format. * elfcomm.h (struct archive_info): Make sym_size, longnames_size, nested_member_origin, next_arhdr_offset uint64_t. * readelf.c (struct filedata): Make archive_file_offset, archive_file_size, string_table_length, dynamic_addr, dynamic_nent, dynamic_strings_length, num_dynamic_syms, dynamic_syminfo_offset uint64_t. (many functions): Replace uses of "unsigned long" with "uint64_t" or "size_t".
2022-11-23Re: readelf: use fseeko64 or fseeko if possibleAlan Modra1-51/+74
Replace the macros with a small wrapper function that verifies the fseek offset arg isn't overlarge. * readelf.c (FSEEK_FUNC): Delete, replace uses with.. (fseek64): ..this new function. (process_program_headers): Don't cast p_offset to long.
2022-11-22gdb/arm: Fix obvious typo in b0b23e06c3aTorbjörn SVENSSON1-2/+2
As part of the rebase of the patch, I managed to loose the local changes I had for the comments from Tomas in https://sourceware.org/pipermail/gdb-patches/2022-November/193413.html This patch corrects the obvious two typos. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
2022-11-22binutils/configure.ac: integrate last changeMichael Matz2-2/+2
Integrate back checks for fseeko{,64} into configure.ac, so that regeneration works. binutils/ * configure.ac: Add fseeko, fseeko64 checks. * configure: Regenerate.
2022-11-22opcodes: Correct address for ARC's "isa_config" aux regShahab Vahedi2-1/+7
This patch changes the address for "isa_config" auxiliary register from 0xC2 to the correct value 0xC1. Moreover, it only exists in arc700+ and not all ARCs. opcodes/ChangeLog: * arc-regs.h: Change isa_config address to 0xc1. isa_config exists for ARC700 and ARCV2 and not ARCALL.
2022-11-22gdb/testsuite: remove gcc restriction from gdb.dwarf2/clang-cli-macro.expBruno Larsen1-3/+0
With the recent changes to the dwarf assembler, there is no longer a need to test for gcc in gdb.dwarf2/clang-cli-macro.exp and mark it as untested. This commit removes that logic.
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