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2016-08-23[AArch64] Add SVE condition codesusers/ARM/sveRichard Sandiford13-90/+274
2016-08-23[AArch64][SVE 32/32] Add SVE testsRichard Sandiford14-0/+79417
2016-08-23[AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford10-117/+9451
2016-08-23[AArch64][SVE 30/32] Add SVE instruction classesRichard Sandiford5-0/+217
2016-08-23[AArch64][SVE 29/32] Add new SVE core & FP register operandsRichard Sandiford8-20/+74
2016-08-23[AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford12-53/+258
2016-08-23[AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford12-100/+657
2016-08-23[AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford11-49/+317
2016-08-23[AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford12-74/+972
2016-08-23[AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford12-19/+148
2016-08-23[AArch64][SVE 23/32] Add SVE pattern and prfop operandsRichard Sandiford8-11/+180
2016-08-23[AArch64][SVE 22/32] Add qualifiers for merging and zeroing predicationRichard Sandiford3-4/+62
2016-08-23[AArch64][SVE 21/32] Add Zn and Pn registersRichard Sandiford12-33/+424
2016-08-23[AArch64][SVE 20/32] Add support for tied operandsRichard Sandiford4-16/+47
2016-08-23[AArch64][SVE 19/32] Refactor address-printing codeRichard Sandiford1-36/+56
2016-08-23[AArch64][SVE 18/32] Tidy definition of aarch64-opc.c:int_regRichard Sandiford1-18/+11
2016-08-23[AArch64][SVE 17/32] Add a prefix parameter to print_register_listRichard Sandiford1-13/+16
2016-08-23[AArch64][SVE 16/32] Use specific insert/extract methods for fpimmRichard Sandiford7-6/+28
2016-08-23[AArch64][SVE 15/32] Add {insert,extract}_all_fields helpersRichard Sandiford2-14/+42
2016-08-23[AArch64][SVE 14/32] Make aarch64_logical_immediate_p take an element sizeRichard Sandiford2-29/+30
2016-08-23[AArch64][SVE 13/32] Add an F_STRICT flagRichard Sandiford3-6/+14
2016-08-23[AArch64][SVE 12/32] Make more use of bfd_booleanRichard Sandiford1-12/+24
2016-08-23[AArch64][SVE 11/32] Tweak aarch64_reg_parse_32_64 interfaceRichard Sandiford1-36/+51
2016-08-23[AArch64][SVE 10/32] Move range check out of parse_aarch64_imm_floatRichard Sandiford1-8/+6
2016-08-23[AArch64][SVE 09/32] Improve error messages for invalid floatsRichard Sandiford3-6/+23
2016-08-23[AArch64][SVE 08/32] Generalise aarch64_double_precision_fmovableRichard Sandiford1-33/+29
2016-08-23[AArch64][SVE 07/32] Replace hard-coded uses of REG_TYPE_R_Z_BHSDQ_VRichard Sandiford1-22/+31
2016-08-23[AArch64][SVE 06/32] Generalise parse_neon_reg_listRichard Sandiford1-5/+8
2016-08-23[AArch64][SVE 05/32] Rename parse_neon_type_for_operandRichard Sandiford1-2/+2
2016-08-23[AArch64][SVE 04/32] Rename neon_type_el to vector_type_elRichard Sandiford1-16/+16
2016-08-23[AArch64][SVE 03/32] Rename neon_el_type to vector_el_typeRichard Sandiford1-4/+4
2016-08-23[AArch64][SVE 02/32] Avoid hard-coded limit in indented_printRichard Sandiford1-5/+1
2016-08-23[AArch64][SVE 01/32] Remove parse_neon_operand_typeRichard Sandiford1-27/+4
2016-08-23[AArch64] Add V8_2_INSN macroRichard Sandiford2-2/+9
2016-08-23[AArch64] Make more use of CORE/FP/SIMD_INSNRichard Sandiford2-67/+72
2016-08-23[AArch64] Add OP parameter to aarch64-tbl.h macrosRichard Sandiford2-722/+727
2016-08-23Fix duplicate FAILs from ld testsuiteAlan Modra2-10/+9
2016-08-23R_OR1K_GOTOFF_* relocationsAlan Modra2-1/+10
2016-08-23Automatic date update in version.inGDB Administrator1-1/+1
2016-08-22Fix PR gdb/20505 - Make vDSO detection work with core filesPedro Alves4-29/+97
2016-08-22Free the string buffer used by the chew program to hold each file it parses.Nick Clifton2-0/+6
2016-08-22Prevent a seg-fault in gprof when parsing a corrupt core file.Nick Clifton2-0/+13
2016-08-22Error on unsupported PowerPC ifuncsAlan Modra2-10/+45
2016-08-22Automatic date update in version.inGDB Administrator1-1/+1
2016-08-21Automatic date update in version.inGDB Administrator1-1/+1
2016-08-20Automatic date update in version.inGDB Administrator1-1/+1
2016-08-19Fix missing files for ld when test suite not compiled in the source directoryCarl E. Love7-22/+23
2016-08-19[AArch64] Match instruction "STP with base register" in prologueYao Qi2-2/+8
2016-08-19null-terminate string in linespec_location_completerYao Qi2-1/+7
2016-08-19ARM: Issue a warning when the MRRC and MRRC2 instructions are used with the s...Tamar Christina5-0/+51
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