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-rw-r--r--sim/aarch64/ChangeLog5
-rw-r--r--sim/aarch64/simulator.c12
2 files changed, 11 insertions, 6 deletions
diff --git a/sim/aarch64/ChangeLog b/sim/aarch64/ChangeLog
index dcb4ac9..a632bb4 100644
--- a/sim/aarch64/ChangeLog
+++ b/sim/aarch64/ChangeLog
@@ -1,3 +1,8 @@
+2016-12-01 Jim Wilson <jim.wilson@linaro.org>
+
+ * sim/aarch64/simulator.c (fsturs): Switch use of rn and st variables.
+ (fsturd, fsturq): Likewise
+
2016-08-15 Mike Frysinger <vapier@gentoo.org>
* interp.c: Include bfd.h.
diff --git a/sim/aarch64/simulator.c b/sim/aarch64/simulator.c
index e5ada18..4fa5dc1 100644
--- a/sim/aarch64/simulator.c
+++ b/sim/aarch64/simulator.c
@@ -7497,8 +7497,8 @@ fsturs (sim_cpu *cpu, int32_t offset)
unsigned int st = INSTR (4, 0);
TRACE_DECODE (cpu, "emulated at line %d", __LINE__);
- aarch64_set_mem_u32 (cpu, aarch64_get_reg_u64 (cpu, st, 1) + offset,
- aarch64_get_vec_u32 (cpu, rn, 0));
+ aarch64_set_mem_u32 (cpu, aarch64_get_reg_u64 (cpu, rn, 1) + offset,
+ aarch64_get_vec_u32 (cpu, st, 0));
}
/* Store 64 bit unscaled signed 9 bit. */
@@ -7509,8 +7509,8 @@ fsturd (sim_cpu *cpu, int32_t offset)
unsigned int st = INSTR (4, 0);
TRACE_DECODE (cpu, "emulated at line %d", __LINE__);
- aarch64_set_mem_u64 (cpu, aarch64_get_reg_u64 (cpu, st, 1) + offset,
- aarch64_get_vec_u64 (cpu, rn, 0));
+ aarch64_set_mem_u64 (cpu, aarch64_get_reg_u64 (cpu, rn, 1) + offset,
+ aarch64_get_vec_u64 (cpu, st, 0));
}
/* Store 128 bit unscaled signed 9 bit. */
@@ -7522,9 +7522,9 @@ fsturq (sim_cpu *cpu, int32_t offset)
FRegister a;
TRACE_DECODE (cpu, "emulated at line %d", __LINE__);
- aarch64_get_FP_long_double (cpu, rn, & a);
+ aarch64_get_FP_long_double (cpu, st, & a);
aarch64_set_mem_long_double (cpu,
- aarch64_get_reg_u64 (cpu, st, 1)
+ aarch64_get_reg_u64 (cpu, rn, 1)
+ offset, a);
}