aboutsummaryrefslogtreecommitdiff
path: root/opcodes
diff options
context:
space:
mode:
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog25
-rw-r--r--opcodes/sparc-dis.c22
-rw-r--r--opcodes/sparc-opc.c52
3 files changed, 90 insertions, 9 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 56b7f96..f798a7a 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,28 @@
+2016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * sparc-dis.c (MASK_V9): Add SPARC_OPCODE_ARCH_V9{C,D,E,V,M}.
+ (compute_arch_mask): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and
+ bfd_mach_sparc_v9{c,d,e,v,m}.
+ * sparc-opc.c (MASK_V9C): Define.
+ (MASK_V9D): Likewise.
+ (MASK_V9E): Likewise.
+ (MASK_V9V): Likewise.
+ (MASK_V9M): Likewise.
+ (v6): Add MASK_V9{C,D,E,V,M}.
+ (v6notlet): Likewise.
+ (v7): Likewise.
+ (v8): Likewise.
+ (v9): Likewise.
+ (v9andleon): Likewise.
+ (v9a): Likewise.
+ (v9b): Likewise.
+ (v9c): Define.
+ (v9d): Likewise.
+ (v9e): Likewise.
+ (v9v): Likewise.
+ (v9m): Likewise.
+ (sparc_opcode_archs): Add entry for v9{c,d,e,v,m}.
+
2016-06-15 Nick Clifton <nickc@redhat.com>
* nds32-dis.c (nds32_parse_audio_ext): Change printing of integer
diff --git a/opcodes/sparc-dis.c b/opcodes/sparc-dis.c
index 435ad66..c6f73ff 100644
--- a/opcodes/sparc-dis.c
+++ b/opcodes/sparc-dis.c
@@ -28,7 +28,12 @@
/* Bitmask of v9 architectures. */
#define MASK_V9 ((1 << SPARC_OPCODE_ARCH_V9) \
| (1 << SPARC_OPCODE_ARCH_V9A) \
- | (1 << SPARC_OPCODE_ARCH_V9B))
+ | (1 << SPARC_OPCODE_ARCH_V9B) \
+ | (1 << SPARC_OPCODE_ARCH_V9C) \
+ | (1 << SPARC_OPCODE_ARCH_V9D) \
+ | (1 << SPARC_OPCODE_ARCH_V9E) \
+ | (1 << SPARC_OPCODE_ARCH_V9V) \
+ | (1 << SPARC_OPCODE_ARCH_V9M))
/* 1 if INSN is for v9 only. */
#define V9_ONLY_P(insn) (! ((insn)->architecture & ~MASK_V9))
/* 1 if INSN is for v9. */
@@ -241,6 +246,21 @@ compute_arch_mask (unsigned long mach)
case bfd_mach_sparc_v8plusb :
case bfd_mach_sparc_v9b :
return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9B);
+ case bfd_mach_sparc_v8plusc :
+ case bfd_mach_sparc_v9c :
+ return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9C);
+ case bfd_mach_sparc_v8plusd :
+ case bfd_mach_sparc_v9d :
+ return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9D);
+ case bfd_mach_sparc_v8pluse :
+ case bfd_mach_sparc_v9e :
+ return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9E);
+ case bfd_mach_sparc_v8plusv :
+ case bfd_mach_sparc_v9v :
+ return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9V);
+ case bfd_mach_sparc_v8plusm :
+ case bfd_mach_sparc_v9m :
+ return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9M);
}
abort ();
}
diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c
index e40ce37..14e4cce 100644
--- a/opcodes/sparc-opc.c
+++ b/opcodes/sparc-opc.c
@@ -37,17 +37,25 @@
#define MASK_V9 SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9)
#define MASK_V9A SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9A)
#define MASK_V9B SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9B)
+#define MASK_V9C SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9C)
+#define MASK_V9D SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9D)
+#define MASK_V9E SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9E)
+#define MASK_V9V SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9V)
+#define MASK_V9M SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9M)
/* Bit masks of architectures supporting the insn. */
#define v6 (MASK_V6 | MASK_V7 | MASK_V8 | MASK_LEON \
| MASK_SPARCLET | MASK_SPARCLITE \
- | MASK_V9 | MASK_V9A | MASK_V9B)
+ | MASK_V9 | MASK_V9A | MASK_V9B \
+ | MASK_V9C | MASK_V9D | MASK_V9E | MASK_V9V | MASK_V9M)
/* v6 insns not supported on the sparclet. */
#define v6notlet (MASK_V6 | MASK_V7 | MASK_V8 | MASK_LEON \
- | MASK_SPARCLITE | MASK_V9 | MASK_V9A | MASK_V9B)
+ | MASK_SPARCLITE | MASK_V9 | MASK_V9A | MASK_V9B \
+ | MASK_V9C | MASK_V9D | MASK_V9E | MASK_V9V | MASK_V9M)
#define v7 (MASK_V7 | MASK_V8 | MASK_LEON | MASK_SPARCLET \
- | MASK_SPARCLITE | MASK_V9 | MASK_V9A | MASK_V9B)
+ | MASK_SPARCLITE | MASK_V9 | MASK_V9A | MASK_V9B \
+ | MASK_V9C | MASK_V9D | MASK_V9E | MASK_V9V | MASK_V9M)
/* Although not all insns are implemented in hardware, sparclite is defined
to be a superset of v8. Unimplemented insns trap and are then theoretically
implemented in software.
@@ -55,16 +63,28 @@
suggest it is. Rather than complicating things, the sparclet assembler
recognizes all v8 insns. */
#define v8 (MASK_V8 | MASK_LEON | MASK_SPARCLET | MASK_SPARCLITE \
- | MASK_V9 | MASK_V9A | MASK_V9B)
+ | MASK_V9 | MASK_V9A | MASK_V9B \
+ | MASK_V9C | MASK_V9D | MASK_V9E | MASK_V9V | MASK_V9M)
#define sparclet (MASK_SPARCLET)
/* sparclet insns supported by leon. */
#define letandleon (MASK_SPARCLET | MASK_LEON)
#define sparclite (MASK_SPARCLITE)
-#define v9 (MASK_V9 | MASK_V9A | MASK_V9B)
+#define v9 (MASK_V9 | MASK_V9A | MASK_V9B \
+ | MASK_V9C | MASK_V9D | MASK_V9E | MASK_V9V | MASK_V9M)
/* v9 insns supported by leon. */
-#define v9andleon (MASK_V9 | MASK_V9A | MASK_V9B | MASK_LEON)
-#define v9a (MASK_V9A | MASK_V9B)
-#define v9b (MASK_V9B)
+#define v9andleon (MASK_V9 | MASK_V9A | MASK_V9B \
+ | MASK_V9C | MASK_V9D | MASK_V9E | MASK_V9V | MASK_V9M \
+ | MASK_LEON)
+#define v9a (MASK_V9A | MASK_V9B \
+ | MASK_V9C | MASK_V9D | MASK_V9E | MASK_V9V | MASK_V9M)
+#define v9b (MASK_V9B \
+ | MASK_V9C | MASK_V9D | MASK_V9E | MASK_V9V | MASK_V9M)
+#define v9c (MASK_V9C | MASK_V9D | MASK_V9E | MASK_V9V | MASK_V9M)
+#define v9d (MASK_V9D | MASK_V9E | MASK_V9V | MASK_V9M)
+#define v9e (MASK_V9E | MASK_V9V | MASK_V9M)
+#define v9v (MASK_V9V | MASK_V9M)
+#define v9m (MASK_V9M)
+
/* v6 insns not supported by v9. */
#define v6notv9 (MASK_V6 | MASK_V7 | MASK_V8 | MASK_LEON \
| MASK_SPARCLET | MASK_SPARCLITE)
@@ -89,6 +109,22 @@ const struct sparc_opcode_arch sparc_opcode_archs[] =
{ "v9a", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A },
/* v9 with cheetah additions */
{ "v9b", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B },
+ /* v9 with UA2005 and T1 additions. */
+ { "v9c", (MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B
+ | MASK_V9C) },
+ /* v9 with UA2007 and T3 additions. */
+ { "v9d", (MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B
+ | MASK_V9C | MASK_V9D) },
+ /* v9 with OSA2011 and T4 additions modulus integer multiply-add. */
+ { "v9e", (MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B
+ | MASK_V9C | MASK_V9D | MASK_V9E) },
+ /* V9 with OSA2011 and T4 additions, integer multiply and Fujitsu fp
+ multiply-add. */
+ { "v9v", (MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B
+ | MASK_V9C | MASK_V9D | MASK_V9E | MASK_V9V) },
+ /* v9 with OSA2015 and M7 additions. */
+ { "v9m", (MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B
+ | MASK_V9C | MASK_V9D | MASK_V9E | MASK_V9V | MASK_V9M) },
{ NULL, 0 }
};