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Diffstat (limited to 'opcodes/xc16x-asm.c')
-rw-r--r--opcodes/xc16x-asm.c40
1 files changed, 20 insertions, 20 deletions
diff --git a/opcodes/xc16x-asm.c b/opcodes/xc16x-asm.c
index 65b709a..8d6aa81 100644
--- a/opcodes/xc16x-asm.c
+++ b/opcodes/xc16x-asm.c
@@ -94,7 +94,7 @@ parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
*strp += 4;
return NULL;
}
- return _("Missing 'pof:' prefix");
+ return _("Missing 'pof:' prefix");
}
/* Handle 'pag:' prefixes (i.e. skip over them). */
@@ -379,7 +379,7 @@ xc16x_cgen_parse_operand (CGEN_CPU_DESC cd,
return errmsg;
}
-cgen_parse_fn * const xc16x_cgen_parse_handlers[] =
+cgen_parse_fn * const xc16x_cgen_parse_handlers[] =
{
parse_insn_normal,
};
@@ -409,9 +409,9 @@ CGEN_ASM_INIT_HOOK
Returns NULL for success, an error message for failure. */
-char *
+char *
xc16x_cgen_build_insn_regex (CGEN_INSN *insn)
-{
+{
CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
const char *mnem = CGEN_INSN_MNEMONIC (insn);
char rxbuf[CGEN_MAX_RX_ELEMENTS];
@@ -450,18 +450,18 @@ xc16x_cgen_build_insn_regex (CGEN_INSN *insn)
/* Copy any remaining literals from the syntax string into the rx. */
for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
{
- if (CGEN_SYNTAX_CHAR_P (* syn))
+ if (CGEN_SYNTAX_CHAR_P (* syn))
{
char c = CGEN_SYNTAX_CHAR (* syn);
- switch (c)
+ switch (c)
{
/* Escape any regex metacharacters in the syntax. */
- case '.': case '[': case '\\':
- case '*': case '^': case '$':
+ case '.': case '[': case '\\':
+ case '*': case '^': case '$':
#ifdef CGEN_ESCAPE_EXTENDED_REGEX
- case '?': case '{': case '}':
+ case '?': case '{': case '}':
case '(': case ')': case '*':
case '|': case '+': case ']':
#endif
@@ -491,20 +491,20 @@ xc16x_cgen_build_insn_regex (CGEN_INSN *insn)
}
/* Trailing whitespace ok. */
- * rx++ = '[';
- * rx++ = ' ';
- * rx++ = '\t';
- * rx++ = ']';
- * rx++ = '*';
+ * rx++ = '[';
+ * rx++ = ' ';
+ * rx++ = '\t';
+ * rx++ = ']';
+ * rx++ = '*';
/* But anchor it after that. */
- * rx++ = '$';
+ * rx++ = '$';
* rx = '\0';
CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
- if (reg_err == 0)
+ if (reg_err == 0)
return NULL;
else
{
@@ -703,7 +703,7 @@ xc16x_cgen_assemble_insn (CGEN_CPU_DESC cd,
const CGEN_INSN *insn = ilist->insn;
recognized_mnemonic = 1;
-#ifdef CGEN_VALIDATE_INSN_SUPPORTED
+#ifdef CGEN_VALIDATE_INSN_SUPPORTED
/* Not usually needed as unsupported opcodes
shouldn't be in the hash lists. */
/* Is this insn supported by the selected cpu? */
@@ -763,7 +763,7 @@ xc16x_cgen_assemble_insn (CGEN_CPU_DESC cd,
if (strlen (start) > 50)
/* xgettext:c-format */
sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
- else
+ else
/* xgettext:c-format */
sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
}
@@ -772,11 +772,11 @@ xc16x_cgen_assemble_insn (CGEN_CPU_DESC cd,
if (strlen (start) > 50)
/* xgettext:c-format */
sprintf (errbuf, _("bad instruction `%.50s...'"), start);
- else
+ else
/* xgettext:c-format */
sprintf (errbuf, _("bad instruction `%.50s'"), start);
}
-
+
*errmsg = errbuf;
return NULL;
}