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-rw-r--r--include/ChangeLog5
-rw-r--r--include/elf/arc-reloc.def7
-rw-r--r--include/opcode/arc.h3
3 files changed, 15 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog
index c7ac36b..8c16d79 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,8 @@
+2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
+
+ * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
+ * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
+
2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
* opcode/arc.h (flag_class_t): Update.
diff --git a/include/elf/arc-reloc.def b/include/elf/arc-reloc.def
index 36a3516..10703d2 100644
--- a/include/elf/arc-reloc.def
+++ b/include/elf/arc-reloc.def
@@ -490,3 +490,10 @@ ARC_RELOC_HOWTO(ARC_S21H_PCREL_PLT, 77, \
replace_disp21h, \
signed, \
( ME ( ( ( ( L + A ) - P ) >> 1 ) ) ))
+
+ARC_RELOC_HOWTO(ARC_NPS_CMEM16, 78, \
+ 2, \
+ 16, \
+ replace_bits16, \
+ dont, \
+ ( S + A ))
diff --git a/include/opcode/arc.h b/include/opcode/arc.h
index 7cd78e4..2811877 100644
--- a/include/opcode/arc.h
+++ b/include/opcode/arc.h
@@ -437,6 +437,9 @@ extern const unsigned arc_num_aux_regs;
extern const struct arc_opcode arc_relax_opcodes[];
extern const unsigned arc_num_relax_opcodes;
+/* Macro used for generating one class of NPS instructions. */
+#define NPS_CMEM_HIGH_VALUE 0x57f0
+
/* Macros to help generating regular pattern instructions. */
#define FIELDA(word) (word & 0x3F)
#define FIELDB(word) (((word & 0x07) << 24) | (((word >> 3) & 0x07) << 12))