diff options
Diffstat (limited to 'gas/config/tc-mips.c')
| -rw-r--r-- | gas/config/tc-mips.c | 75 |
1 files changed, 60 insertions, 15 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index ecd3c8e..d7a1ff3 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -3463,6 +3463,10 @@ validate_mips_insn (const struct mips_opcode *opcode, used_bits &= ~(1 << (operand->lsb + 5)); if (operand->type == OP_ENTRY_EXIT_LIST) used_bits &= ~(mask & 0x700); + /* interAptiv MR2 SAVE/RESTORE instructions have a discontiguous + operand field that cannot be fully described with LSB/SIZE. */ + if (operand->type == OP_SAVE_RESTORE_LIST && operand->lsb == 6) + used_bits &= ~0x6000; } /* Skip prefix characters. */ if (decode_operand && (*s == '+' || *s == 'm' || *s == '-')) @@ -5555,6 +5559,39 @@ match_entry_exit_operand (struct mips_arg_info *arg, return TRUE; } +/* Encode regular MIPS SAVE/RESTORE instruction operands according to + the argument register mask AMASK, the number of static registers + saved NSREG, the $ra, $s0 and $s1 register specifiers RA, S0 and S1 + respectively, and the frame size FRAME_SIZE. */ + +static unsigned int +mips_encode_save_restore (unsigned int amask, unsigned int nsreg, + unsigned int ra, unsigned int s0, unsigned int s1, + unsigned int frame_size) +{ + return ((nsreg << 23) | ((frame_size & 0xf0) << 15) | (amask << 15) + | (ra << 12) | (s0 << 11) | (s1 << 10) | ((frame_size & 0xf) << 6)); +} + +/* Encode MIPS16 SAVE/RESTORE instruction operands according to the + argument register mask AMASK, the number of static registers saved + NSREG, the $ra, $s0 and $s1 register specifiers RA, S0 and S1 + respectively, and the frame size FRAME_SIZE. */ + +static unsigned int +mips16_encode_save_restore (unsigned int amask, unsigned int nsreg, + unsigned int ra, unsigned int s0, unsigned int s1, + unsigned int frame_size) +{ + unsigned int args; + + args = (ra << 6) | (s0 << 5) | (s1 << 4) | (frame_size & 0xf); + if (nsreg || amask || frame_size == 0 || frame_size > 16) + args |= (MIPS16_EXTEND | (nsreg << 24) | (amask << 16) + | ((frame_size & 0xf0) << 16)); + return args; +} + /* OP_SAVE_RESTORE_LIST matcher. */ static bfd_boolean @@ -5562,6 +5599,7 @@ match_save_restore_list_operand (struct mips_arg_info *arg) { unsigned int opcode, args, statics, sregs; unsigned int num_frame_sizes, num_args, num_statics, num_sregs; + unsigned int arg_mask, ra, s0, s1; offsetT frame_size; opcode = arg->insn->insn_opcode; @@ -5570,6 +5608,9 @@ match_save_restore_list_operand (struct mips_arg_info *arg) args = 0; statics = 0; sregs = 0; + ra = 0; + s0 = 0; + s1 = 0; do { unsigned int regno1, regno2; @@ -5605,7 +5646,7 @@ match_save_restore_list_operand (struct mips_arg_info *arg) sregs |= 1 << 8; else if (regno1 == 31) /* Add $ra to insn. */ - opcode |= 0x40; + ra = 1; else return FALSE; regno1 += 1; @@ -5621,10 +5662,10 @@ match_save_restore_list_operand (struct mips_arg_info *arg) return FALSE; else if (args == 0xf) /* All $a0-$a3 are args. */ - opcode |= MIPS16_ALL_ARGS << 16; + arg_mask = MIPS_SVRS_ALL_ARGS; else if (statics == 0xf) /* All $a0-$a3 are statics. */ - opcode |= MIPS16_ALL_STATICS << 16; + arg_mask = MIPS_SVRS_ALL_STATICS; else { /* Count arg registers. */ @@ -5648,14 +5689,14 @@ match_save_restore_list_operand (struct mips_arg_info *arg) return FALSE; /* Encode args/statics. */ - opcode |= ((num_args << 2) | num_statics) << 16; + arg_mask = (num_args << 2) | num_statics; } /* Encode $s0/$s1. */ if (sregs & (1 << 0)) /* $s0 */ - opcode |= 0x20; + s0 = 1; if (sregs & (1 << 1)) /* $s1 */ - opcode |= 0x10; + s1 = 1; sregs >>= 2; /* Encode $s2-$s8. */ @@ -5667,7 +5708,6 @@ match_save_restore_list_operand (struct mips_arg_info *arg) } if (sregs != 0) return FALSE; - opcode |= num_sregs << 24; /* Encode frame size. */ if (num_frame_sizes == 0) @@ -5685,16 +5725,18 @@ match_save_restore_list_operand (struct mips_arg_info *arg) set_insn_error (arg->argnum, _("invalid frame size")); return FALSE; } - if (frame_size != 128 || (opcode >> 16) != 0) - { - frame_size /= 8; - opcode |= (((frame_size & 0xf0) << 16) - | (frame_size & 0x0f)); - } + frame_size /= 8; /* Finally build the instruction. */ - if ((opcode >> 16) != 0 || frame_size == 0) - opcode |= MIPS16_EXTEND; + if (mips_opts.mips16) + opcode |= mips16_encode_save_restore (arg_mask, num_sregs, ra, s0, s1, + frame_size); + else if (!mips_opts.micromips) + opcode |= mips_encode_save_restore (arg_mask, num_sregs, ra, s0, s1, + frame_size); + else + abort (); + arg->insn->insn_opcode = opcode; return TRUE; } @@ -19665,6 +19707,9 @@ static const struct mips_cpu_info mips_cpu_info_table[] = { "1004kf1_1", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, /* interaptiv is the new name for 1004kf */ { "interaptiv", 0, ASE_DSP | ASE_MT, ISA_MIPS32R2, CPU_MIPS32R2 }, + { "interaptiv-mr2", 0, + ASE_DSP | ASE_EVA | ASE_MT | ASE_MIPS16E2 | ASE_MIPS16E2_MT, + ISA_MIPS32R3, CPU_INTERAPTIV_MR2 }, /* M5100 family */ { "m5100", 0, ASE_MCU, ISA_MIPS32R5, CPU_MIPS32R5 }, { "m5101", 0, ASE_MCU, ISA_MIPS32R5, CPU_MIPS32R5 }, |