diff options
| -rw-r--r-- | cpu/ChangeLog | 5 | ||||
| -rw-r--r-- | cpu/epiphany.cpu | 4 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/epiphany-ibld.c | 4 |
4 files changed, 13 insertions, 4 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 87cec69..fd26cb7 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,8 @@ +2019-12-11 Alan Modra <amodra@gmail.com> + + * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than + shift left to avoid UB on left shift of negative values. + 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu: Fix comment describing the 128-bit instruction format. diff --git a/cpu/epiphany.cpu b/cpu/epiphany.cpu index 33c81d0..9f873b3 100644 --- a/cpu/epiphany.cpu +++ b/cpu/epiphany.cpu @@ -149,11 +149,11 @@ (df f-simm8 "branch displacement" (PCREL-ADDR RELOC) 15 8 INT ((value pc) (sra SI (sub SI value pc) 1)) - ((value pc) (add SI (sll SI value 1) pc))) + ((value pc) (add SI (mul SI value 2) pc))) (df f-simm24 "branch displacement" (PCREL-ADDR RELOC) 31 24 INT ((value pc) (sra SI (sub SI value pc) 1)) - ((value pc) (add SI (sll SI value 1) pc))) + ((value pc) (add SI (mul SI value 2) pc))) (df f-sdisp3 "signed immediate 3 bit" () 9 3 INT #f #f) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 4d22d51..de76acc 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2019-12-11 Alan Modra <amodra@gmail.com> + + * epiphany-ibld.c: Regenerate. + 2019-12-10 Alan Modra <amodra@gmail.com> PR 24960 diff --git a/opcodes/epiphany-ibld.c b/opcodes/epiphany-ibld.c index 83cfaf3..6e6fd7b 100644 --- a/opcodes/epiphany-ibld.c +++ b/opcodes/epiphany-ibld.c @@ -1100,7 +1100,7 @@ epiphany_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 31, 24, 32, total_length, pc, & value); - value = ((((value) << (1))) + (pc)); + value = ((((value) * (2))) + (pc)); fields->f_simm24 = value; } break; @@ -1111,7 +1111,7 @@ epiphany_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, pc, & value); - value = ((((value) << (1))) + (pc)); + value = ((((value) * (2))) + (pc)); fields->f_simm8 = value; } break; |