diff options
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/aarch64-asm.c | 16 |
2 files changed, 13 insertions, 8 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 09f0341..110739a 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2016-12-08 Maciej W. Rozycki <macro@imgtec.com> + + * aarch64-asm.c (aarch64_ins_reglane): Rename `index' local + variable to `reglane_index'. + 2016-12-08 Luis Machado <lgustavo@codesourcery.com> * ppc-dis.c (get_powerpc_dialect): Check NULL info->section. diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index cfe6630..6d7072c 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -125,28 +125,28 @@ aarch64_ins_reglane (const aarch64_operand *self, const aarch64_opnd_info *info, { /* index for e.g. SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>] or SQDMLAL <Va><d>, <Vb><n>, <Vm>.<Ts>[<index>]. */ - unsigned index = info->reglane.index; + unsigned reglane_index = info->reglane.index; if (inst->opcode->op == OP_FCMLA_ELEM) /* Complex operand takes two elements. */ - index *= 2; + reglane_index *= 2; switch (info->qualifier) { case AARCH64_OPND_QLF_S_H: /* H:L:M */ - assert (index < 8); - insert_fields (code, index, 0, 3, FLD_M, FLD_L, FLD_H); + assert (reglane_index < 8); + insert_fields (code, reglane_index, 0, 3, FLD_M, FLD_L, FLD_H); break; case AARCH64_OPND_QLF_S_S: /* H:L */ - assert (index < 4); - insert_fields (code, index, 0, 2, FLD_L, FLD_H); + assert (reglane_index < 4); + insert_fields (code, reglane_index, 0, 2, FLD_L, FLD_H); break; case AARCH64_OPND_QLF_S_D: /* H */ - assert (index < 2); - insert_field (FLD_H, code, index, 0); + assert (reglane_index < 2); + insert_field (FLD_H, code, reglane_index, 0); break; default: assert (0); |