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-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/microblaze/allinsn.d6
-rw-r--r--gas/testsuite/gas/microblaze/allinsn.s8
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/microblaze-opc.h4
-rw-r--r--opcodes/microblaze-opcm.h2
6 files changed, 28 insertions, 2 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index f460b47..2661ff4 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,10 @@
2012-11-21 David Holsgrove <david.holsgrove@xilinx.com>
+ * gas/microblaze/allinsn.s: Add swapb, swaph
+ * gas/microblaze/allinsn.d: Likewise
+
+2012-11-21 David Holsgrove <david.holsgrove@xilinx.com>
+
* gas/microblaze/allinsn.s: Test use of SHR, SLR
* gas/microblaze/allinsn.d: Likewise
diff --git a/gas/testsuite/gas/microblaze/allinsn.d b/gas/testsuite/gas/microblaze/allinsn.d
index 4a03340..b454fdb 100644
--- a/gas/testsuite/gas/microblaze/allinsn.d
+++ b/gas/testsuite/gas/microblaze/allinsn.d
@@ -41,3 +41,9 @@ Disassembly of section .text:
30: b0000000 imm 0
34: 31600000 addik r11, r0, 0
38: 940bc802 mts rshr, r11
+
+0000003c <swapb>:
+ 3c: 900001e0 swapb r0, r0
+
+00000040 <swaph>:
+ 40: 900001e2 swaph r0, r0
diff --git a/gas/testsuite/gas/microblaze/allinsn.s b/gas/testsuite/gas/microblaze/allinsn.s
index 437444f..ffe91ca 100644
--- a/gas/testsuite/gas/microblaze/allinsn.s
+++ b/gas/testsuite/gas/microblaze/allinsn.s
@@ -46,4 +46,12 @@ regslr:
regshr:
la r11,r0,r0
mts rshr,r11
+ .text
+ .global swapb
+swapb:
+ swapb r0,r0
+ .text
+ .global swaph
+swaph:
+ swaph r0,r0
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index e5d08b0..ed74935 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2012-11-21 David Holsgrove <david.holsgrove@xilinx.com>
+
+ * microblaze-opc.h (op_code_struct): Add swapb, swaph Increase MAX_OPCODES.
+ * microblaze-opcm.h (microblaze_instr): Likewise
+
2012-11-21 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* microblaze-opcm.h: Add REG_SLR_MASK, REG_SHR_MASK, REG_SHR and REG_SLR
diff --git a/opcodes/microblaze-opc.h b/opcodes/microblaze-opc.h
index 0447fc5..404985b 100644
--- a/opcodes/microblaze-opc.h
+++ b/opcodes/microblaze-opc.h
@@ -101,7 +101,7 @@
#define DELAY_SLOT 1
#define NO_DELAY_SLOT 0
-#define MAX_OPCODES 287
+#define MAX_OPCODES 289
struct op_code_struct
{
@@ -402,6 +402,8 @@ struct op_code_struct
{"clz", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900000E0, OPCODE_MASK_H34, clz, special_inst },
{"mbar", INST_TYPE_IMM5, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xB8020004, OPCODE_MASK_HN, mbar, special_inst },
{"sleep", INST_TYPE_NONE, INST_PC_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xBA020004, OPCODE_MASK_HN, invalid_inst, special_inst }, /* translates to mbar 16. */
+ {"swapb", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E0, OPCODE_MASK_H4, swapb, arithmetic_inst },
+ {"swaph", INST_TYPE_RD_R1, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0x900001E2, OPCODE_MASK_H4, swaph, arithmetic_inst },
{"", 0, 0, 0, 0, 0, 0, 0, 0},
};
diff --git a/opcodes/microblaze-opcm.h b/opcodes/microblaze-opcm.h
index a2a42d0..124cdec 100644
--- a/opcodes/microblaze-opcm.h
+++ b/opcodes/microblaze-opcm.h
@@ -27,7 +27,7 @@ enum microblaze_instr
{
add, rsub, addc, rsubc, addk, rsubk, addkc, rsubkc, clz, cmp, cmpu,
addi, rsubi, addic, rsubic, addik, rsubik, addikc, rsubikc, mul,
- mulh, mulhu, mulhsu,
+ mulh, mulhu, mulhsu,swapb,swaph,
idiv, idivu, bsll, bsra, bsrl, get, put, nget, nput, cget, cput,
ncget, ncput, muli, bslli, bsrai, bsrli, mului, or, and, xor,
andn, pcmpbf, pcmpbc, pcmpeq, pcmpne, sra, src, srl, sext8, sext16,