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-rw-r--r--bfd/ChangeLog7
-rw-r--r--bfd/elf32-arm.c23
-rw-r--r--ld/testsuite/ChangeLog5
-rw-r--r--ld/testsuite/ld-arm/arm-elf.exp5
-rw-r--r--ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d92
5 files changed, 125 insertions, 7 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 915fa22..2302ae4 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2010-05-07 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * elf32-arm.c (struct a8_erratum_reloc): Add hash member. Move
+ sym_name to improve packing.
+ (cortex_a8_erratum_scan): Check for PLT entries.
+ (elf32_arm_size_stubs): Save the target symbol for a8 relocs.
+
2010-05-07 Tristan Gingold <gingold@adacore.com>
* Makefile.in: Regenerate with automake 1.11.1.
diff --git a/bfd/elf32-arm.c b/bfd/elf32-arm.c
index 2c24bdd..18fddc6 100644
--- a/bfd/elf32-arm.c
+++ b/bfd/elf32-arm.c
@@ -2409,9 +2409,10 @@ struct a8_erratum_fix {
struct a8_erratum_reloc {
bfd_vma from;
bfd_vma destination;
+ struct elf32_arm_link_hash_entry *hash;
+ const char *sym_name;
unsigned int r_type;
unsigned char st_type;
- const char *sym_name;
bfd_boolean non_a8_stub;
};
@@ -4101,6 +4102,7 @@ cortex_a8_erratum_scan (bfd *input_bfd,
{
char *error_message = NULL;
struct elf_link_hash_entry *entry;
+ bfd_boolean use_plt = FALSE;
/* We don't care about the error returned from this
function, only if there is glue or not. */
@@ -4110,12 +4112,18 @@ cortex_a8_erratum_scan (bfd *input_bfd,
if (entry)
found->non_a8_stub = TRUE;
- if (found->r_type == R_ARM_THM_CALL
- && found->st_type != STT_ARM_TFUNC)
- force_target_arm = TRUE;
- else if (found->r_type == R_ARM_THM_CALL
- && found->st_type == STT_ARM_TFUNC)
- force_target_thumb = TRUE;
+ /* Keep a simpler condition, for the sake of clarity. */
+ if (htab->splt != NULL && found->hash != NULL
+ && found->hash->root.plt.offset != (bfd_vma) -1)
+ use_plt = TRUE;
+
+ if (found->r_type == R_ARM_THM_CALL)
+ {
+ if (found->st_type != STT_ARM_TFUNC || use_plt)
+ force_target_arm = TRUE;
+ else
+ force_target_thumb = TRUE;
+ }
}
/* Check if we have an offending branch instruction. */
@@ -4682,6 +4690,7 @@ elf32_arm_size_stubs (bfd *output_bfd,
a8_relocs[num_a8_relocs].st_type = st_type;
a8_relocs[num_a8_relocs].sym_name = sym_name;
a8_relocs[num_a8_relocs].non_a8_stub = created_stub;
+ a8_relocs[num_a8_relocs].hash = hash;
num_a8_relocs++;
}
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 545cf5b..565a624 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2010-05-07 Daniel Jacobowitz <dan@codesourcery.com>
+
+ * ld-arm/cortex-a8-fix-bl-rel-plt.d: New file.
+ * ld-arm/arm-elf.exp (armelftests): Run cortex-a8-fix-bl-rel-plt.d.
+
2010-05-06 Joseph Myers <joseph@codesourcery.com>
* ld-elf/orphan-region.d: Use ld -N.
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index 5c4351b..6180393 100644
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -194,6 +194,11 @@ set armelftests {
"-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-thumb-target.s cortex-a8-fix-bl-rel.s}
{{objdump -dr cortex-a8-fix-bl-rel-thumb.d}}
"cortex-a8-fix-bl-rel-thumb"}
+ {"Cortex-A8 erratum fix, relocate bl.w to PLT"
+ "-EL --section-start=.plt=0x8e00 -Ttext=0x8f00 --fix-cortex-a8 -shared"
+ "-EL" {cortex-a8-thumb-target.s cortex-a8-fix-bl-rel.s}
+ {{objdump -dr cortex-a8-fix-bl-rel-plt.d}}
+ "cortex-a8-fix-bl-rel-thumb"}
{"Cortex-A8 erratum fix, relocate b<cond>.w to Thumb"
"-EL -Ttext=0x8f00 --fix-cortex-a8" "-EL" {cortex-a8-thumb-target.s cortex-a8-fix-bcc-rel.s}
{{objdump -dr cortex-a8-fix-bcc-rel-thumb.d}}
diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d
new file mode 100644
index 0000000..e885a17
--- /dev/null
+++ b/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d
@@ -0,0 +1,92 @@
+
+.*: file format .*
+
+
+Disassembly of section \.plt:
+
+00008e00 <\.plt>:
+ 8e00: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
+ 8e04: e59fe004 ldr lr, \[pc, #4\] ; 8e10 <targetfn-0xf0>
+ 8e08: e08fe00e add lr, pc, lr
+ 8e0c: e5bef008 ldr pc, \[lr, #8\]!
+ 8e10: 0000827c \.word 0x0000827c
+ 8e14: e28fc600 add ip, pc, #0
+ 8e18: e28cca08 add ip, ip, #32768 ; 0x8000
+ 8e1c: e5bcf27c ldr pc, \[ip, #636\]! ; 0x27c
+
+Disassembly of section \.text:
+
+00008f00 <targetfn>:
+ 8f00: 4770 bx lr
+ 8f02: bf00 nop
+ 8f04: f3af 8000 nop\.w
+
+00008f08 <_start>:
+ 8f08: bf00 nop
+ 8f0a: eb01 0002 add\.w r0, r1, r2
+ 8f0e: f7ff ef82 blx 8e14 <targetfn-0xec>
+ 8f12: eb01 0002 add\.w r0, r1, r2
+ 8f16: f7ff ef7e blx 8e14 <targetfn-0xec>
+ 8f1a: eb01 0002 add\.w r0, r1, r2
+ 8f1e: f7ff ef7a blx 8e14 <targetfn-0xec>
+ 8f22: eb01 0002 add\.w r0, r1, r2
+ 8f26: f7ff ef76 blx 8e14 <targetfn-0xec>
+ 8f2a: eb01 0002 add\.w r0, r1, r2
+ 8f2e: f7ff ef72 blx 8e14 <targetfn-0xec>
+ 8f32: eb01 0002 add\.w r0, r1, r2
+ 8f36: f7ff ef6e blx 8e14 <targetfn-0xec>
+ 8f3a: eb01 0002 add\.w r0, r1, r2
+ 8f3e: f7ff ef6a blx 8e14 <targetfn-0xec>
+ 8f42: eb01 0002 add\.w r0, r1, r2
+ 8f46: f7ff ef66 blx 8e14 <targetfn-0xec>
+ 8f4a: eb01 0002 add\.w r0, r1, r2
+ 8f4e: f7ff ef62 blx 8e14 <targetfn-0xec>
+ 8f52: eb01 0002 add\.w r0, r1, r2
+ 8f56: f7ff ef5e blx 8e14 <targetfn-0xec>
+ 8f5a: eb01 0002 add\.w r0, r1, r2
+ 8f5e: f7ff ef5a blx 8e14 <targetfn-0xec>
+ 8f62: eb01 0002 add\.w r0, r1, r2
+ 8f66: f7ff ef56 blx 8e14 <targetfn-0xec>
+ 8f6a: eb01 0002 add\.w r0, r1, r2
+ 8f6e: f7ff ef52 blx 8e14 <targetfn-0xec>
+ 8f72: eb01 0002 add\.w r0, r1, r2
+ 8f76: f7ff ef4e blx 8e14 <targetfn-0xec>
+ 8f7a: eb01 0002 add\.w r0, r1, r2
+ 8f7e: f7ff ef4a blx 8e14 <targetfn-0xec>
+ 8f82: eb01 0002 add\.w r0, r1, r2
+ 8f86: f7ff ef46 blx 8e14 <targetfn-0xec>
+ 8f8a: eb01 0002 add\.w r0, r1, r2
+ 8f8e: f7ff ef42 blx 8e14 <targetfn-0xec>
+ 8f92: eb01 0002 add\.w r0, r1, r2
+ 8f96: f7ff ef3e blx 8e14 <targetfn-0xec>
+ 8f9a: eb01 0002 add\.w r0, r1, r2
+ 8f9e: f7ff ef3a blx 8e14 <targetfn-0xec>
+ 8fa2: eb01 0002 add\.w r0, r1, r2
+ 8fa6: f7ff ef36 blx 8e14 <targetfn-0xec>
+ 8faa: eb01 0002 add\.w r0, r1, r2
+ 8fae: f7ff ef32 blx 8e14 <targetfn-0xec>
+ 8fb2: eb01 0002 add\.w r0, r1, r2
+ 8fb6: f7ff ef2e blx 8e14 <targetfn-0xec>
+ 8fba: eb01 0002 add\.w r0, r1, r2
+ 8fbe: f7ff ef2a blx 8e14 <targetfn-0xec>
+ 8fc2: eb01 0002 add\.w r0, r1, r2
+ 8fc6: f7ff ef26 blx 8e14 <targetfn-0xec>
+ 8fca: eb01 0002 add\.w r0, r1, r2
+ 8fce: f7ff ef22 blx 8e14 <targetfn-0xec>
+ 8fd2: eb01 0002 add\.w r0, r1, r2
+ 8fd6: f7ff ef1e blx 8e14 <targetfn-0xec>
+ 8fda: eb01 0002 add\.w r0, r1, r2
+ 8fde: f7ff ef1a blx 8e14 <targetfn-0xec>
+ 8fe2: eb01 0002 add\.w r0, r1, r2
+ 8fe6: f7ff ef16 blx 8e14 <targetfn-0xec>
+ 8fea: eb01 0002 add\.w r0, r1, r2
+ 8fee: f7ff ef12 blx 8e14 <targetfn-0xec>
+ 8ff2: eb01 0002 add\.w r0, r1, r2
+ 8ff6: f7ff ef0e blx 8e14 <targetfn-0xec>
+ 8ffa: eb01 0002 add\.w r0, r1, r2
+ 8ffe: f000 e808 blx 9010 <_start\+0x108>
+ 9002: eb01 0002 add\.w r0, r1, r2
+ 9006: f7ff ef06 blx 8e14 <targetfn-0xec>
+ 900a: 4770 bx lr
+ 900c: f3af 8000 nop\.w
+ 9010: eaffff7f b 8e14 <targetfn-0xec>