diff options
| -rw-r--r-- | sim/mips/ChangeLog | 14 | ||||
| -rw-r--r-- | sim/testsuite/mips64r5900-elf/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/testsuite/mips64r5900-elf/f-rsqrt.s | 179 |
3 files changed, 197 insertions, 0 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 4b05f8a..245053b 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,17 @@ +start-sanitize-r5900 +Thu Nov 5 19:40:12 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * r5900.igen (DIV): Do not clear clear SO/SU when already set. + + * r5900.igen (RSQRT.S): Do not compute 1/srqt(abs(T)) when T + negative, compute S/sqrt(abs(T)) instead. Correctly set FCSR + bits. + + * r5900.igen (RSQRT.S): Handle overflow/underflow better. Check + sign of FT not FS. + (r59fp_store): Clarify "bad value" abort messages. + +end-sanitize-r5900 start-sanitize-tx3904 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com> diff --git a/sim/testsuite/mips64r5900-elf/ChangeLog b/sim/testsuite/mips64r5900-elf/ChangeLog index c9c920b..1c9111e 100644 --- a/sim/testsuite/mips64r5900-elf/ChangeLog +++ b/sim/testsuite/mips64r5900-elf/ChangeLog @@ -1,3 +1,7 @@ +Thu Nov 5 20:22:21 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * f-rsqrt.s: Add tests for 0/sqrt(0) etc. + Thu Oct 29 12:07:06 1998 Frank Ch. Eigler <fche@cygnus.com> * t-psrlvw.s (test_psrlvw): Add test for sign-extension in insn. diff --git a/sim/testsuite/mips64r5900-elf/f-rsqrt.s b/sim/testsuite/mips64r5900-elf/f-rsqrt.s new file mode 100644 index 0000000..feb3454 --- /dev/null +++ b/sim/testsuite/mips64r5900-elf/f-rsqrt.s @@ -0,0 +1,179 @@ +.include "t-macros.i" + + start + + ### $f3 = $f2 / sqrt ($f1) + +test_rsqrt: + loadfp $f1 4.0 + loadfp $f2 1.0 + rsqrt.s $f3, $f2, $f1 + checkfp 0 $f3 0.5 + + ################ + + +## +1.0 / sqrt (+0.0) +## -> 0x7fffffff (+Max) D+SD +test_rsqrt_1: + clearfcsr + loadfp $f1, +1.0 + loadfp $f2, +0.0 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00010021 $f3 0x7fffffff + + +## -1.0 / sqrt (+0.0) +## -> 0xffffffff (-Max) D+SD +test_rsqrt_2: + clearfcsr + loadfp $f1, -1.0 + loadfp $f2, +0.0 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00010021 $f3 0xffffffff + + +## 0 / sqrt (-0) +##and 0 / sqrt (0) +## ->0x7fffffff I + SI +test_rsqrt_3a: + clearfcsr + loadfp $f1, +0.0 + loadfp $f2, -0.0 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00020041 $f3 0x7fffffff + +test_rsqrt_3b: + clearfcsr + loadfp $f1, +0.0 + loadfp $f2, +0.0 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00020041 $f3 0x7fffffff + + +## Correctly: +## (-0) / sqrt (-0) +## ->FFFFFFFF (I + SI) +test_rsqrt_4a: + clearfcsr + loadfp $f1, -0.0 + loadfp $f2, -0.0 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00020041 $f3 0xffffffff + +test_rsqrt_4b: + clearfcsr + loadfp $f1, -0.0 + loadfp $f2, +0.0 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00020041 $f3 0xffffffff + + +## (max) / sqrt (min*2) -> no O+SO +## +test_rsqrt_5aa: + clearfcsr + loadfpx $f1, 0x7fffffff + loadfpx $f2, 0x00800001 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00000001 $f3 0x7fffffff + +test_rsqrt_5ab: + clearfcsr + loadfpx $f1, 0x7fffffff + loadfpx $f2, 0x80800001 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00020041 $f3 0x7fffffff + +test_rsqrt_5ba: + clearfcsr + loadfpx $f1, 0xffffffff + loadfpx $f2, 0x00800001 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00000001 $f3 0xffffffff + +test_rsqrt_5bb: + clearfcsr + loadfpx $f1, 0xffffffff + loadfpx $f2, 0x80800001 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00020041 $f3 0xffffffff + + +## (max) / sqrt (min*2) -> no U+SU +## +test_rsqrt_6aa: + clearfcsr + loadfpx $f1, 0x00800001 + loadfpx $f2, 0x7fffffff + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00000001 $f3 0x00000000 + +test_rsqrt_6ab: + clearfcsr + loadfpx $f1, 0x00800001 + loadfpx $f2, 0xffffffff + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00020041 $f3 0x00000000 + +test_rsqrt_6ba: + clearfcsr + loadfpx $f1, 0x80800001 + loadfpx $f2, 0x7fffffff + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00000001 $f3 0x80000000 + +test_rsqrt_6bb: + clearfcsr + loadfpx $f1, 0x80800001 + loadfpx $f2, 0xffffffff + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00020041 $f3 0x80000000 + + +## Correctly: +## (max/min) / sqrt ([+-]0) +## ->MAX/MIN (D + SD) +test_rsqrt_7aa: + clearfcsr + loadfpx $f1, 0x7fffffff + loadfpx $f2, 0x00000000 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00010021 $f3 0x7fffffff + +test_rsqrt_7ab: + clearfcsr + loadfpx $f1, 0x7fffffff + loadfpx $f2, 0x80000000 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00010021 $f3 0x7fffffff + +test_rsqrt_7ba: + clearfcsr + loadfpx $f1, 0xffffffff + loadfpx $f2, 0x00000000 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00010021 $f3 0xffffffff + +test_rsqrt_7bb: + clearfcsr + loadfpx $f1, 0xffffffff + loadfpx $f2, 0x80000000 + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00010021 $f3 0xffffffff + + +## Like max/sqrt but check that bits are set/cleared +## +test_rsqrt_9aa: + clearfcsr + loadfpx $f1, 0x7fffffff + loadfpx $f2, 0x00000000 + rsqrt.s $f3, $f1, $f2 + loadfpx $f1, 0x00800001 + loadfpx $f2, 0xffffffff + rsqrt.s $f3, $f1, $f2 + checkfpx 1 0x00020061 $f3 0x00000000 + + + exit0 |