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-rw-r--r--gas/testsuite/gas/aarch64/rcpc3-fp-fail.d3
-rw-r--r--gas/testsuite/gas/aarch64/rcpc3-fp-fail.l13
-rw-r--r--gas/testsuite/gas/aarch64/rcpc3-fp-fail.s27
-rw-r--r--gas/testsuite/gas/aarch64/rcpc3-fp.d26
-rw-r--r--gas/testsuite/gas/aarch64/rcpc3-fp.s21
-rw-r--r--opcodes/aarch64-tbl.h4
6 files changed, 94 insertions, 0 deletions
diff --git a/gas/testsuite/gas/aarch64/rcpc3-fp-fail.d b/gas/testsuite/gas/aarch64/rcpc3-fp-fail.d
new file mode 100644
index 0000000..31c1279
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rcpc3-fp-fail.d
@@ -0,0 +1,3 @@
+#name: RCPC3 fp load/store illegal
+#as: -march=armv8.3-a+rcpc3 -mno-verbose-error
+#error_output: rcpc3-fp-fail.l
diff --git a/gas/testsuite/gas/aarch64/rcpc3-fp-fail.l b/gas/testsuite/gas/aarch64/rcpc3-fp-fail.l
new file mode 100644
index 0000000..20c08f8
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rcpc3-fp-fail.l
@@ -0,0 +1,13 @@
+[^:]+: Assembler messages:
+[^:]+:3: Error: register element index out of range 0 to 1 at operand 1 -- `stl1 {v1.d}\[-1\],\[x1\]'
+[^:]+:6: Error: register element index out of range 0 to 1 at operand 1 -- `stl1 {v1.d}\[2\],\[x1\]'
+[^:]+:8: Error: register element index out of range 0 to 1 at operand 1 -- `ldap1 {v2.d}\[-1\],\[sp\]'
+[^:]+:11: Error: register element index out of range 0 to 1 at operand 1 -- `ldap1 {v2.d}\[2\],\[sp\]'
+[^:]+:13: Error: immediate value out of range -256 to 255 at operand 2 -- `ldapur b1,\[x1,#-257\]'
+[^:]+:16: Error: immediate value out of range -256 to 255 at operand 2 -- `ldapur b1,\[x1,#256\]'
+[^:]+:18: Error: immediate value out of range -256 to 255 at operand 2 -- `stlur q1,\[x1,#-257\]'
+[^:]+:21: Error: immediate value out of range -256 to 255 at operand 2 -- `stlur q1,\[x1,#256\]'
+[^:]+:23: Error: invalid addressing mode at operand 2 -- `ldapur b1,\[x1\],#255'
+[^:]+:24: Error: invalid addressing mode at operand 2 -- `ldapur b1,\[x1,#-255\]!'
+[^:]+:26: Error: invalid addressing mode at operand 2 -- `stlur b1,\[x1\],#255'
+[^:]+:27: Error: invalid addressing mode at operand 2 -- `stlur b1,\[x1,#-255\]!'
diff --git a/gas/testsuite/gas/aarch64/rcpc3-fp-fail.s b/gas/testsuite/gas/aarch64/rcpc3-fp-fail.s
new file mode 100644
index 0000000..d5d9200
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rcpc3-fp-fail.s
@@ -0,0 +1,27 @@
+.text
+
+ stl1 { v1.d }[-1], [x1] // BAD
+ stl1 { v1.d }[0], [x1] // OK
+ stl1 { v1.d }[1], [x1] // OK
+ stl1 { v1.d }[2], [x1] // BAD
+
+ ldap1 { v2.d }[-1], [sp] // BAD
+ ldap1 { v2.d }[0], [sp] // OK
+ ldap1 { v2.d }[1], [sp] // OK
+ ldap1 { v2.d }[2], [sp] // BAD
+
+ ldapur b1, [x1, #-257] // BAD
+ ldapur b1, [x1, #-256] // OK
+ ldapur b1, [x1, #255] // OK
+ ldapur b1, [x1, #256] // BAD
+
+ stlur q1, [x1, #-257] // BAD
+ stlur q1, [x1, #-256] // OK
+ stlur q1, [x1, #255] // OK
+ stlur q1, [x1, #256] // BAD
+
+ ldapur b1, [x1], #255 // BAD
+ ldapur b1, [x1, #-255]! // BAD
+
+ stlur b1, [x1], #255 // BAD
+ stlur b1, [x1, #-255]! // BAD
diff --git a/gas/testsuite/gas/aarch64/rcpc3-fp.d b/gas/testsuite/gas/aarch64/rcpc3-fp.d
new file mode 100644
index 0000000..b070e42
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rcpc3-fp.d
@@ -0,0 +1,26 @@
+#name: RCPC3 fp load/store
+#as: -march=armv8.2-a+rcpc3
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+ 0: 0d4187e1 ldap1 {v1.d}\[0], \[sp]
+ 4: 4d418422 ldap1 {v2.d}\[1], \[x1]
+ 8: 0d018443 stl1 {v3.d}\[0], \[x2]
+ c: 4d018464 stl1 {v4.d}\[1], \[x3]
+ 10: 1d400be1 ldapur b1, \[sp\]
+ 14: 1d500be1 ldapur b1, \[sp, #-256\]
+ 18: 1d4ffbe1 ldapur b1, \[sp, #255\]
+ 1c: 5d400842 ldapur h2, \[x2\]
+ 20: 9d400863 ldapur s3, \[x3\]
+ 24: dd400884 ldapur d4, \[x4\]
+ 28: 1dc00be1 ldapur q1, \[sp\]
+ 2c: 1d000be1 stlur b1, \[sp\]
+ 30: 1d100be1 stlur b1, \[sp, #-256\]
+ 34: 1d0ffbe1 stlur b1, \[sp, #255\]
+ 38: 9d000863 stlur s3, \[x3\]
+ 3c: dd000884 stlur d4, \[x4\]
+ 40: 1d800be1 stlur q1, \[sp\]
diff --git a/gas/testsuite/gas/aarch64/rcpc3-fp.s b/gas/testsuite/gas/aarch64/rcpc3-fp.s
new file mode 100644
index 0000000..d99f96d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/rcpc3-fp.s
@@ -0,0 +1,21 @@
+.text
+
+ ldap1 {v1.d}[0], [sp]
+ ldap1 {v2.d}[1], [x1]
+ stl1 {v3.d}[0], [x2]
+ stl1 {v4.d}[1], [x3]
+
+ ldapur b1, [sp]
+ ldapur b1, [sp, #-256]
+ ldapur b1, [sp, #255]
+ ldapur h2, [x2]
+ ldapur s3, [x3]
+ ldapur d4, [x4]
+ ldapur q1, [sp]
+
+ stlur b1, [sp]
+ stlur b1, [sp, #-256]
+ stlur b1, [sp, #255]
+ stlur s3, [x3]
+ stlur d4, [x4]
+ stlur q1, [sp]
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 8855c83..66d68c0 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -4221,6 +4221,10 @@ const struct aarch64_opcode aarch64_opcode_table[] =
RCPC3_INSN ("stilp", 0x19000800, 0x3fe0ec00, rcpc3, OP3 (Rt, Rs, RCPC3_ADDR_OPT_PREIND_WB), QL_R2NIL, F_RCPC3_SIZE),
RCPC3_INSN ("ldapr", 0x19c00800, 0x3ffffc00, rcpc3, OP2 (Rt, RCPC3_ADDR_POSTIND), QL_R1NIL, F_RCPC3_SIZE),
RCPC3_INSN ("stlr", 0x19800800, 0x3ffffc00, rcpc3, OP2 (Rt, RCPC3_ADDR_PREIND_WB), QL_R1NIL, F_RCPC3_SIZE),
+ RCPC3_INSN ("stl1", 0x0d018400, 0xbffffc00, rcpc3, OP2 (LEt, SIMD_ADDR_SIMPLE), QL_SIMD_IMM_D, F_OD(1)),
+ RCPC3_INSN ("ldap1", 0x0d418400, 0xbffffc00, rcpc3, OP2 (LEt, SIMD_ADDR_SIMPLE), QL_SIMD_IMM_D, F_OD(1)),
+ RCPC3_INSN ("ldapur", 0x1d400800, 0x3f600C00, rcpc3, OP2 (Ft, RCPC3_ADDR_OFFSET), QL_LDST_FP, F_RCPC3_SIZE),
+ RCPC3_INSN ("stlur", 0x1d000800, 0x3f600C00, rcpc3, OP2 (Ft, RCPC3_ADDR_OFFSET), QL_LDST_FP, F_RCPC3_SIZE),
/* Move wide (immediate). */
CORE_INSN ("movn", 0x12800000, 0x7f800000, movewide, OP_MOVN, OP2 (Rd, HALF), QL_DST_R, F_SF | F_HAS_ALIAS),
CORE_INSN ("mov", 0x12800000, 0x7f800000, movewide, OP_MOV_IMM_WIDEN, OP2 (Rd, IMM_MOV), QL_DST_R, F_SF | F_ALIAS | F_CONV),