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authorHans-Peter Nilsson <hp@axis.com>2022-02-14 23:50:42 +0100
committerHans-Peter Nilsson <hp@bitrange.com>2022-02-14 23:50:42 +0100
commit46f238477f5e83cba9dc79d1e14c0f6acbeda37b (patch)
tree4866c500cfcdfcffcd1cc09ba66c4bc045fb9bec /sim
parent56ba3848dc13ea58359f7eb1a5440297bfe82c6e (diff)
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sim/testsuite/cris/hw/rv-n-cris/irq1.ms: Disable due to randomness
For reasons that remain largely to be investigated (besides the apparent lack of synchronization between two processes), this test fails randomly, with two different sets of common outputs. Curiously, that doesn't happen for the other similar tests. There's a comment that mentions this, though that doesn't make it a sustainable part of a test-suite. (Known-blinking tests should be disabled until fixed.) sim/testsuite/cris: * hw/rv-n-cris/irq1.ms: Disable by use of a never-matched "progos" value.
Diffstat (limited to 'sim')
-rw-r--r--sim/testsuite/cris/hw/rv-n-cris/irq1.ms1
1 files changed, 1 insertions, 0 deletions
diff --git a/sim/testsuite/cris/hw/rv-n-cris/irq1.ms b/sim/testsuite/cris/hw/rv-n-cris/irq1.ms
index f3e6f2e..a7c82dc 100644
--- a/sim/testsuite/cris/hw/rv-n-cris/irq1.ms
+++ b/sim/testsuite/cris/hw/rv-n-cris/irq1.ms
@@ -1,3 +1,4 @@
+#progos: nowhere:disabled-due-to-randomness
#mach: crisv10 crisv32
#sim(crisv10): --hw-device "/rv/trace? true"
#sim(crisv32): --hw-device "/rv/trace? true"