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authorDenis Chertykov <chertykov@gmail.com>2016-07-19 09:47:23 +0300
committerDenis Chertykov <chertykov@gmail.com>2016-07-19 09:47:23 +0300
commit59f48f5a45d2300da401f1fccab31ba436217469 (patch)
treeea97cd072d3453b013e1baf3b724a5271dd22368 /sim
parenta4717ffb7bbc1415275c6c51029729c8b5de9c12 (diff)
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Update PC when simulate break instruction.
PR target/ 19401 * avr/interp.c (step_once): Pass break instruction address to sim_engine_halt function which writes that to PC. Remove code that follows that function call as it is unreachable.
Diffstat (limited to 'sim')
-rw-r--r--sim/ChangeLog7
-rw-r--r--sim/avr/interp.c3
2 files changed, 8 insertions, 2 deletions
diff --git a/sim/ChangeLog b/sim/ChangeLog
index 76c384d..d7cc92c 100644
--- a/sim/ChangeLog
+++ b/sim/ChangeLog
@@ -1,3 +1,10 @@
+2016-07-19 Pitchumani Sivanupandi <pitchumani.s@atmel.com>
+
+ PR target/ 19401
+ * avr/interp.c (step_once): Pass break instruction address to
+ sim_engine_halt function which writes that to PC. Remove code that
+ follows that function call as it is unreachable.
+
2016-02-03 Maciej W. Rozycki <macro@linux-mips.org>
* MAINTAINERS (Past sim maintainers): Add Thiemo Seufer.
diff --git a/sim/avr/interp.c b/sim/avr/interp.c
index 31a9940..fcce9b2 100644
--- a/sim/avr/interp.c
+++ b/sim/avr/interp.c
@@ -911,8 +911,7 @@ step_once (SIM_CPU *cpu)
case OP_break:
/* Stop on this address. */
- sim_engine_halt (CPU_STATE (cpu), cpu, NULL, cpu->pc, sim_stopped, SIM_SIGTRAP);
- cpu->pc = ipc;
+ sim_engine_halt (CPU_STATE (cpu), cpu, NULL, ipc, sim_stopped, SIM_SIGTRAP);
break;
case OP_bld: