sim: move default model to the runtime sim state

This kills off another compile-time option by moving the setting to
the individual arch runtimes.  This will allow dynamic selection by
the arch when doing a single build with multiple arches.

The sim_model_init rework is a little funky.  In the past it was
disabled entirely if no default model was set.  We maintain the
spirit of the logic by gating the fallback logic on whether the
port has defined any models.

5 files changed, 8 insertions, 37 deletions

diff --git a/sim/riscv/ChangeLog b/sim/riscv/ChangeLog
index 1c98ed5..ec4f69a 100644
--- a/sim/riscv/ChangeLog
+++ b/sim/riscv/ChangeLog
@@ -1,5 +1,12 @@
 2021-06-30  Mike Frysinger  <vapier@gentoo.org>
 
+	* configure.ac: Delete SIM_AC_OPTION_DEFAULT_MODEL call.
+	* interp.c (sim_open): Set STATE_MODEL_NAME.
+	* aclocal.m4: Regenerate.
+	* configure: Regenerate.
+
+2021-06-30  Mike Frysinger  <vapier@gentoo.org>
+
 	* interp.c (sim_open): Set STATE_MACHS.
 	(riscv_sim_machs): New decl.
 	* machs.c (sim_machs): Rename to ...
diff --git a/sim/riscv/aclocal.m4 b/sim/riscv/aclocal.m4
index 39198e5..3b7f0c1 100644
--- a/sim/riscv/aclocal.m4
+++ b/sim/riscv/aclocal.m4
@@ -13,5 +13,4 @@
 
 m4_ifndef([AC_CONFIG_MACRO_DIRS], [m4_defun([_AM_CONFIG_MACRO_DIRS], [])m4_defun([AC_CONFIG_MACRO_DIRS], [_AM_CONFIG_MACRO_DIRS($@)])])
 m4_include([../m4/sim_ac_option_bitsize.m4])
-m4_include([../m4/sim_ac_option_default_model.m4])
 m4_include([../m4/sim_ac_output.m4])
diff --git a/sim/riscv/configure b/sim/riscv/configure
index b8b789a..c2e53cc 100755
--- a/sim/riscv/configure
+++ b/sim/riscv/configure
@@ -628,12 +628,10 @@ PACKAGE_TARNAME
 PACKAGE_NAME
 PATH_SEPARATOR
 SHELL
-sim_default_model
 sim_bitsize'
 ac_subst_files=''
 ac_user_opts='
 enable_option_checking
-enable_sim_default_model
 enable_sim_bitsize
 '
       ac_precious_vars='build_alias
@@ -1246,8 +1244,6 @@ Optional Features:
   --disable-option-checking  ignore unrecognized --enable/--with options
   --disable-FEATURE       do not include FEATURE (same as --enable-FEATURE=no)
   --enable-FEATURE[=ARG]  include FEATURE [ARG=yes]
-  --enable-sim-default-model=model
-                          Specify default model to simulate
   --enable-sim-bitsize=N  Specify target bitsize (32 or 64)
 
 Report bugs to the package provider.
@@ -1680,29 +1676,6 @@ ac_compiler_gnu=$ac_cv_c_compiler_gnu
 
 
 
-# Select the default model for the target.
-riscv_model=
-case "${target}" in
-riscv32*) riscv_model="RV32G" ;;
-riscv*) riscv_model="RV64G" ;;
-esac
-
-default_sim_default_model="${riscv_model}"
-# Check whether --enable-sim-default-model was given.
-if test "${enable_sim_default_model+set}" = set; then :
-  enableval=$enable_sim_default_model; case "${enableval}" in
-  yes|no) as_fn_error $? "\"Missing argument to --enable-sim-default-model\"" "$LINENO" 5;;
-  *)	sim_default_model="-DWITH_DEFAULT_MODEL='\"${enableval}\"'";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_default_model" != x""; then
-  echo "Setting default model = $sim_default_model" 6>&1
-fi
-else
-  sim_default_model="-DWITH_DEFAULT_MODEL='\"${default_sim_default_model}\"'"
-fi
-
-
-
 # Select the bitsize of the target.
 riscv_addr_bitsize=
 case "${target}" in
@@ -1790,7 +1763,6 @@ ac_config_commands="$ac_config_commands stamp-h"
 
 
 
-
 SIM_COMMON_BUILD_TRUE='#'
 SIM_COMMON_BUILD_FALSE=
 
diff --git a/sim/riscv/configure.ac b/sim/riscv/configure.ac
index 01afe51..6edb28c 100644
--- a/sim/riscv/configure.ac
+++ b/sim/riscv/configure.ac
@@ -2,14 +2,6 @@ dnl Process this file with autoconf to produce a configure script.
 AC_INIT(Makefile.in)
 AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config])
 
-# Select the default model for the target.
-riscv_model=
-case "${target}" in
-riscv32*) riscv_model="RV32G" ;;
-riscv*) riscv_model="RV64G" ;;
-esac
-SIM_AC_OPTION_DEFAULT_MODEL(${riscv_model})
-
 # Select the bitsize of the target.
 riscv_addr_bitsize=
 case "${target}" in
diff --git a/sim/riscv/interp.c b/sim/riscv/interp.c
index 8908ed1..202412a 100644
--- a/sim/riscv/interp.c
+++ b/sim/riscv/interp.c
@@ -66,6 +66,7 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback,
 
   /* Set default options before parsing user options.  */
   STATE_MACHS (sd) = riscv_sim_machs;
+  STATE_MODEL_NAME (sd) = WITH_TARGET_WORD_BITSIZE == 32 ? "RV32G" : "RV64G";
   current_target_byte_order = BFD_ENDIAN_LITTLE;
 
   /* The cpu data is kept in a separately allocated chunk of memory.  */