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| author | Andrew Cagney <cagney@redhat.com> | 1998-11-23 05:50:21 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1998-11-23 05:50:21 +0000 |
| commit | a83d7d870f21777725939c88f72aef0f3944dec0 (patch) | |
| tree | 00cb49847a09796d63c9f3eb7e87dd4b9c733c0b /sim/mips/sim-main.h | |
| parent | 9935b2e7f3c9f694c5ecb522b851c4a2cc507c29 (diff) | |
| download | gdb-a83d7d870f21777725939c88f72aef0f3944dec0.zip gdb-a83d7d870f21777725939c88f72aef0f3944dec0.tar.gz gdb-a83d7d870f21777725939c88f72aef0f3944dec0.tar.bz2 | |
Switch mips-lsi-elf mips16 simulator to igen (from gencode).
Diffstat (limited to 'sim/mips/sim-main.h')
| -rw-r--r-- | sim/mips/sim-main.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h index 42c152c..20f13a3 100644 --- a/sim/mips/sim-main.h +++ b/sim/mips/sim-main.h @@ -495,7 +495,7 @@ memset (&(CPU)->pending, 0, sizeof ((CPU)->pending)) /* For backward compatibility */ #define PENDING_FILL(R,VAL) \ -{ \ +do { \ if ((R) >= FGRIDX && (R) < FGRIDX + NR_FGR) \ { \ PENDING_SCHED(FGR[(R) - FGRIDX], VAL, 1, -1); \ @@ -503,7 +503,7 @@ memset (&(CPU)->pending, 0, sizeof ((CPU)->pending)) } \ else \ PENDING_SCHED(GPR[(R)], VAL, 1, -1); \ -} +} while (0) |