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| author | Andrew Cagney <cagney@redhat.com> | 1997-11-06 14:24:57 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1997-11-06 14:24:57 +0000 |
| commit | 95469cebdd302ffd71ec96252e988c996ad6d1ca (patch) | |
| tree | b31623127018d2c84d0ac244ada659e77726a052 /sim/mips/sim-main.h | |
| parent | 549bf9505169c883039f229f1f12ad6dd2260e32 (diff) | |
| download | gdb-95469cebdd302ffd71ec96252e988c996ad6d1ca.zip gdb-95469cebdd302ffd71ec96252e988c996ad6d1ca.tar.gz gdb-95469cebdd302ffd71ec96252e988c996ad6d1ca.tar.bz2 | |
Replace global IPC with function argument cia or current instruction
address.
Pass cia into calls to sim_engine_stop so that breakpoints et.al. work.
Diffstat (limited to 'sim/mips/sim-main.h')
| -rw-r--r-- | sim/mips/sim-main.h | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h index fedc2a5..2307423 100644 --- a/sim/mips/sim-main.h +++ b/sim/mips/sim-main.h @@ -296,9 +296,7 @@ struct _sim_cpu { /* The following are internal simulator state variables: */ #define CPU_CIA(CPU) (PC) - address_word ipc; /* internal Instruction PC */ address_word dspc; /* delay-slot PC */ -#define IPC ((STATE_CPU (sd,0))->ipc) #define DSPC ((STATE_CPU (sd,0))->dspc) /* Issue a delay slot instruction immediatly by re-calling |