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| author | Andrew Cagney <cagney@redhat.com> | 1998-04-02 19:35:39 +0000 |
|---|---|---|
| committer | Andrew Cagney <cagney@redhat.com> | 1998-04-02 19:35:39 +0000 |
| commit | 69d5a56645fdfd5d9cc9f57986224b0636010161 (patch) | |
| tree | d4ae76050ff337489375b4171bea76c1783243db /sim/mips/sim-main.h | |
| parent | 7cdd6cac82faad2083029b2ac014d44d869f76c0 (diff) | |
| download | gdb-69d5a56645fdfd5d9cc9f57986224b0636010161.zip gdb-69d5a56645fdfd5d9cc9f57986224b0636010161.tar.gz gdb-69d5a56645fdfd5d9cc9f57986224b0636010161.tar.bz2 | |
Re-do load/store operations so that they work for both 32 and 64 bit
ISAs.
Enable tx39 as igen again.
Diffstat (limited to 'sim/mips/sim-main.h')
| -rw-r--r-- | sim/mips/sim-main.h | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h index acbb527..6cd51d9 100644 --- a/sim/mips/sim-main.h +++ b/sim/mips/sim-main.h @@ -824,15 +824,22 @@ decode_coproc (SD, CPU, cia, (instruction)) #define AccessLength_DOUBLEWORD (7) #define AccessLength_QUADWORD (15) +#if (WITH_IGEN) +#define LOADDRMASK (WITH_TARGET_WORD_BITSIZE == 64 \ + ? AccessLength_DOUBLEWORD /*7*/ \ + : AccessLength_WORD /*3*/) +#define PSIZE (WITH_TARGET_ADDRESS_BITSIZE) +#endif + int address_translation PARAMS ((SIM_DESC sd, sim_cpu *, address_word cia, address_word vAddr, int IorD, int LorS, address_word *pAddr, int *CCA, int raw)); #define AddressTranslation(vAddr,IorD,LorS,pAddr,CCA,host,raw) \ address_translation (SD, CPU, cia, vAddr, IorD, LorS, pAddr, CCA, raw) -void load_memory PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, uword64* memvalp, uword64* memval1p, int CCA, int AccessLength, address_word pAddr, address_word vAddr, int IorD)); +void load_memory PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, uword64* memvalp, uword64* memval1p, int CCA, unsigned int AccessLength, address_word pAddr, address_word vAddr, int IorD)); #define LoadMemory(memvalp,memval1p,CCA,AccessLength,pAddr,vAddr,IorD,raw) \ load_memory (SD, CPU, cia, memvalp, memval1p, CCA, AccessLength, pAddr, vAddr, IorD) -void store_memory PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int CCA, int AccessLength, uword64 MemElem, uword64 MemElem1, address_word pAddr, address_word vAddr)); +void store_memory PARAMS ((SIM_DESC sd, sim_cpu *cpu, address_word cia, int CCA, unsigned int AccessLength, uword64 MemElem, uword64 MemElem1, address_word pAddr, address_word vAddr)); #define StoreMemory(CCA,AccessLength,MemElem,MemElem1,pAddr,vAddr,raw) \ store_memory (SD, CPU, cia, CCA, AccessLength, MemElem, MemElem1, pAddr, vAddr) |