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authorDave Brolley <brolley@redhat.com>2003-10-31 18:23:47 +0000
committerDave Brolley <brolley@redhat.com>2003-10-31 18:23:47 +0000
commit9a29f3cae56f0b97155c400dcf6bc865882fbc79 (patch)
tree03376148e0ccc30bbb1429e998fb84bc2d731517 /sim/frv
parent6066c3de513998f9c90c14385bf5e1b9ab626cc0 (diff)
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2003-10-31 Dave Brolley <brolley@redhat.com>
* frv-sim.h (REGNUM_LR): Removed. (REGNUM_SPR_MIN,REGNUM_SPR_MAX): New macros. * frv.c (frvbf_fetch_register): Fetch SPR registers based on REGNUM_SPR_MIN and REGNUM_SPR_MAX. Check whether SPRs are implemented. Return 0 for an unimplemented register. Return the length of the data for an implemented register. (frvbf_store_register): Ditto.
Diffstat (limited to 'sim/frv')
-rw-r--r--sim/frv/ChangeLog10
-rw-r--r--sim/frv/frv-sim.h3
-rw-r--r--sim/frv/frv.c33
3 files changed, 38 insertions, 8 deletions
diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog
index 63c8e98..5a76eac 100644
--- a/sim/frv/ChangeLog
+++ b/sim/frv/ChangeLog
@@ -1,3 +1,13 @@
+2003-10-31 Dave Brolley <brolley@redhat.com>
+
+ * frv-sim.h (REGNUM_LR): Removed.
+ (REGNUM_SPR_MIN,REGNUM_SPR_MAX): New macros.
+ * frv.c (frvbf_fetch_register): Fetch SPR registers based on
+ REGNUM_SPR_MIN and REGNUM_SPR_MAX. Check whether SPRs are implemented.
+ Return 0 for an unimplemented register. Return the length of the data
+ for an implemented register.
+ (frvbf_store_register): Ditto.
+
2003-10-30 Andrew Cagney <cagney@redhat.com>
* traps.c: Replace "struct symbol_cache_entry" with "struct
diff --git a/sim/frv/frv-sim.h b/sim/frv/frv-sim.h
index a28df49..53d131f 100644
--- a/sim/frv/frv-sim.h
+++ b/sim/frv/frv-sim.h
@@ -33,7 +33,8 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#define GR_REGNUM_MAX 63
#define FR_REGNUM_MAX 127
#define PC_REGNUM 128
-#define LR_REGNUM 145
+#define SPR_REGNUM_MIN 129
+#define SPR_REGNUM_MAX (SPR_REGNUM_MIN + 4096 - 1)
/* Initialization of the frv cpu. */
void frv_initialize (SIM_CPU *, SIM_DESC);
diff --git a/sim/frv/frv.c b/sim/frv/frv.c
index 7f48256..cc71eca 100644
--- a/sim/frv/frv.c
+++ b/sim/frv/frv.c
@@ -44,12 +44,22 @@ frvbf_fetch_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
SETTSI (buf, GET_H_FR (rn - GR_REGNUM_MAX - 1));
else if (rn == PC_REGNUM)
SETTSI (buf, GET_H_PC ());
- else if (rn == LR_REGNUM)
- SETTSI (buf, GET_H_SPR (H_SPR_LR));
+ else if (rn >= SPR_REGNUM_MIN && rn <= SPR_REGNUM_MAX)
+ {
+ /* Make sure the register is implemented. */
+ FRV_REGISTER_CONTROL *control = CPU_REGISTER_CONTROL (current_cpu);
+ int spr = rn - SPR_REGNUM_MIN;
+ if (! control->spr[spr].implemented)
+ return 0;
+ SETTSI (buf, GET_H_SPR (spr));
+ }
else
- SETTSI (buf, 0xdeadbeef);
+ {
+ SETTSI (buf, 0xdeadbeef);
+ return 0;
+ }
- return -1;
+ return len;
}
/* The contents of BUF are in target byte order. */
@@ -63,10 +73,19 @@ frvbf_store_register (SIM_CPU *current_cpu, int rn, unsigned char *buf, int len)
SET_H_FR (rn - GR_REGNUM_MAX - 1, GETTSI (buf));
else if (rn == PC_REGNUM)
SET_H_PC (GETTSI (buf));
- else if (rn == LR_REGNUM)
- SET_H_SPR (H_SPR_LR, GETTSI (buf));
+ else if (rn >= SPR_REGNUM_MIN && rn <= SPR_REGNUM_MAX)
+ {
+ /* Make sure the register is implemented. */
+ FRV_REGISTER_CONTROL *control = CPU_REGISTER_CONTROL (current_cpu);
+ int spr = rn - SPR_REGNUM_MIN;
+ if (! control->spr[spr].implemented)
+ return 0;
+ SET_H_SPR (spr, GETTSI (buf));
+ }
+ else
+ return 0;
- return -1;
+ return len;
}
/* Cover fns to access the general registers. */