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| author | Alan Modra <amodra@gmail.com> | 2020-01-04 08:11:43 +1030 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2020-01-04 19:20:33 +1030 |
| commit | c9ae58fe32e88914b67988d5bfde184f79c7070f (patch) | |
| tree | 0309d33de137777438078077b3ed9fa1c8cec76d /opcodes | |
| parent | 5f57d4ecf51c2f420dae56dfb9fc525d1979ec7c (diff) | |
| download | gdb-c9ae58fe32e88914b67988d5bfde184f79c7070f.zip gdb-c9ae58fe32e88914b67988d5bfde184f79c7070f.tar.gz gdb-c9ae58fe32e88914b67988d5bfde184f79c7070f.tar.bz2 | |
ubsan: m32r: left shift of negative value
cpu/
* m32r.cpu (f-disp8): Avoid left shift of negative values.
(f-disp16, f-disp24): Likewise.
opcodes/
* m32r-ibld.c: Regenerate.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/m32r-ibld.c | 6 |
2 files changed, 7 insertions, 3 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index d72dcec..5dfb1fc 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,9 @@ 2020-01-04 Alan Modra <amodra@gmail.com> + * m32r-ibld.c: Regenerate. + +2020-01-04 Alan Modra <amodra@gmail.com> + * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value. 2020-01-04 Alan Modra <amodra@gmail.com> diff --git a/opcodes/m32r-ibld.c b/opcodes/m32r-ibld.c index 9ab98cf..8d5ce60 100644 --- a/opcodes/m32r-ibld.c +++ b/opcodes/m32r-ibld.c @@ -723,7 +723,7 @@ m32r_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 16, 16, 32, total_length, pc, & value); - value = ((((value) << (2))) + (pc)); + value = ((((value) * (4))) + (pc)); fields->f_disp16 = value; } break; @@ -731,7 +731,7 @@ m32r_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 24, 32, total_length, pc, & value); - value = ((((value) << (2))) + (pc)); + value = ((((value) * (4))) + (pc)); fields->f_disp24 = value; } break; @@ -739,7 +739,7 @@ m32r_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 8, 32, total_length, pc, & value); - value = ((((value) << (2))) + (((pc) & (-4)))); + value = ((((value) * (4))) + (((pc) & (-4)))); fields->f_disp8 = value; } break; |