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| author | Tatsuyuki Ishi <ishitatsuyuki@gmail.com> | 2024-02-21 02:55:50 +0900 |
|---|---|---|
| committer | Nelson Chu <nelson@rivosinc.com> | 2024-02-29 15:02:51 +0800 |
| commit | 04d352509cd6d4719bf9d80312228cc6015c410f (patch) | |
| tree | 13332ccdf9f626cfe4ab78325ccb906ff327bdb8 /opcodes | |
| parent | dc1470f1d8779e151fb231639014597582bb7f4e (diff) | |
| download | gdb-04d352509cd6d4719bf9d80312228cc6015c410f.zip gdb-04d352509cd6d4719bf9d80312228cc6015c410f.tar.gz gdb-04d352509cd6d4719bf9d80312228cc6015c410f.tar.bz2 | |
RISC-V: Add assembly support for TLSDESC.
gas/
* tc-riscv.c (percent_op_*): Add support for %tlsdesc_hi,
%tlsdesc_load_lo, %tlsdesc_add_lo and %tlsdesc_call. percent_op_rtype
renamed to percent_op_relax_only as this matcher is extended to handle
jalr as well which is not R-type.
(riscv_ip): Apply the percent_op_relax_only rename and update comment.
(md_apply_fix): Add TLSDESC_* to relaxable list. Add TLSDESC_HI20 to
TLS relocation check list.
* testsuite/gas/riscv/tlsdesc.*: New test cases for TLSDESC relocation
generation.
opcodes/
* riscv-opc.c (riscv_opcodes): Add a new syntax for jalr with
%tlsdesc_call annotations.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/riscv-opc.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index fdd05ac..dcc592e 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -384,6 +384,7 @@ const struct riscv_opcode riscv_opcodes[] = {"jalr", 0, INSN_CLASS_I, "s,j", MATCH_JALR|(X_RA << OP_SH_RD), MASK_JALR|MASK_RD, match_opcode, INSN_ALIAS|INSN_JSR }, {"jalr", 0, INSN_CLASS_I, "d,s", MATCH_JALR, MASK_JALR|MASK_IMM, match_opcode, INSN_ALIAS|INSN_JSR }, {"jalr", 0, INSN_CLASS_I, "d,o(s)", MATCH_JALR, MASK_JALR, match_opcode, INSN_JSR }, +{"jalr", 0, INSN_CLASS_I, "d,s,1", MATCH_JALR, MASK_JALR|MASK_IMM, match_opcode, INSN_JSR }, {"jalr", 0, INSN_CLASS_I, "d,s,j", MATCH_JALR, MASK_JALR, match_opcode, INSN_JSR }, {"j", 0, INSN_CLASS_C, "Ca", MATCH_C_J, MASK_C_J, match_opcode, INSN_ALIAS|INSN_BRANCH }, {"j", 0, INSN_CLASS_I, "a", MATCH_JAL, MASK_JAL|MASK_RD, match_opcode, INSN_ALIAS|INSN_BRANCH }, |