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authorJan Beulich <jbeulich@suse.com>2023-07-04 17:01:56 +0200
committerJan Beulich <jbeulich@suse.com>2023-07-04 17:01:56 +0200
commit37c5374291224ed7e061fe001094cdacac7d9821 (patch)
treecd0333c5fa9aabab8fb4fdd5107c76a83bfe1e81 /opcodes
parent1f83c96159d55af9caa96aa8f335ca1fd501a953 (diff)
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x86: flag EVEX masking when destination is GPR(-like)
Masking is not permitted in this case. See the code comment for how this is being dealt with. To avoid excess special casing of modes, have OP_M() call OP_E_memory() directly.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/i386-dis.c17
1 files changed, 16 insertions, 1 deletions
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 7c41302..d5e3547 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -11641,6 +11641,11 @@ print_register (instr_info *ins, unsigned int reg, unsigned int rexmask,
{
const char (*names)[8];
+ /* Masking is invalid for insns with GPR destination. Set the flag uniformly,
+ as the consumer will inspect it only for the destination operand. */
+ if (bytemode != mask_mode && ins->vex.mask_register_specifier)
+ ins->illegal_masking = true;
+
USED_REX (rexmask);
if (ins->rex & rexmask)
reg += 8;
@@ -12375,6 +12380,12 @@ OP_E (instr_info *ins, int bytemode, int sizeflag)
return true;
}
+ /* Masking is invalid for insns with GPR-like memory destination. Set the
+ flag uniformly, as the consumer will inspect it only for the destination
+ operand. */
+ if (ins->vex.mask_register_specifier)
+ ins->illegal_masking = true;
+
return OP_E_memory (ins, bytemode, sizeflag);
}
@@ -13157,10 +13168,14 @@ OP_XS (instr_info *ins, int bytemode, int sizeflag)
static bool
OP_M (instr_info *ins, int bytemode, int sizeflag)
{
+ /* Skip mod/rm byte. */
+ MODRM_CHECK;
+ ins->codep++;
+
if (ins->modrm.mod == 3)
/* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
return BadOp (ins);
- return OP_E (ins, bytemode, sizeflag);
+ return OP_E_memory (ins, bytemode, sizeflag);
}
static bool