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author | Yao Qi <yao.qi@linaro.org> | 2015-10-02 11:36:00 +0100 |
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committer | Yao Qi <yao.qi@linaro.org> | 2015-10-02 15:23:58 +0100 |
commit | 36f4aab18ccf897b405f137d6cd4f9673bd947fc (patch) | |
tree | 5d416d7c90ef4bc235703c9e5bdf0746487d9d22 /opcodes | |
parent | 7232d38966babb802e9d8d0e9e591346a7b93d96 (diff) | |
download | gdb-36f4aab18ccf897b405f137d6cd4f9673bd947fc.zip gdb-36f4aab18ccf897b405f137d6cd4f9673bd947fc.tar.gz gdb-36f4aab18ccf897b405f137d6cd4f9673bd947fc.tar.bz2 |
[aarch64] expose disas_aarch64_insn and rename it to aarch64_decode_insn
We want to use disas_aarch64_insn inside GDB to decode instructions, so
this patch exposes it and rename it to aarch64_decode_insn to follow
the conventions of other interfaces.
include/opcode:
2015-10-02 Yao Qi <yao.qi@linaro.org>
* aarch64.h (aarch64_decode_insn): Declare it.
opcodes:
2015-10-02 Yao Qi <yao.qi@linaro.org>
* aarch64-dis.c (disas_aarch64_insn): Remove static. Change
argument insn type to aarch64_insn. Rename to ...
(aarch64_decode_insn): ... it.
(print_insn_aarch64_word): Caller updated.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 7 | ||||
-rw-r--r-- | opcodes/aarch64-dis.c | 9 |
2 files changed, 12 insertions, 4 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 051c42b..124ead7 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,12 @@ 2015-10-02 Yao Qi <yao.qi@linaro.org> + * aarch64-dis.c (disas_aarch64_insn): Remove static. Change + argument insn type to aarch64_insn. Rename to ... + (aarch64_decode_insn): ... it. + (print_insn_aarch64_word): Caller updated. + +2015-10-02 Yao Qi <yao.qi@linaro.org> + * aarch64-dis.c (disas_aarch64_insn): Remove argument PC. (print_insn_aarch64_word): Caller updated. diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index e0faeb5..fe3caac 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -2029,10 +2029,11 @@ user_friendly_fixup (aarch64_inst *inst) } } -/* Decode INSN and fill in *INST the instruction information. */ +/* Decode INSN and fill in *INST the instruction information. Return zero + on success. */ -static int -disas_aarch64_insn (uint32_t insn, aarch64_inst *inst) +int +aarch64_decode_insn (aarch64_insn insn, aarch64_inst *inst) { const aarch64_opcode *opcode = aarch64_opcode_lookup (insn); @@ -2171,7 +2172,7 @@ print_insn_aarch64_word (bfd_vma pc, addresses, since the addend is not currently pc-relative. */ pc = 0; - ret = disas_aarch64_insn (word, &inst); + ret = aarch64_decode_insn (word, &inst); if (((word >> 21) & 0x3ff) == 1) { |