aboutsummaryrefslogtreecommitdiff
path: root/opcodes
diff options
context:
space:
mode:
authorPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>2020-09-28 15:41:23 +0100
committerNick Clifton <nickc@redhat.com>2020-09-28 15:41:23 +0100
commit3454861d897960237c852040ded04f70e1bda070 (patch)
treefde951ea4dfdb560153b9c8dac8d5bb133f87421 /opcodes
parent1ff8e4010580a425e5f4e7bd14471154b2ab33c9 (diff)
downloadgdb-3454861d897960237c852040ded04f70e1bda070.zip
gdb-3454861d897960237c852040ded04f70e1bda070.tar.gz
gdb-3454861d897960237c852040ded04f70e1bda070.tar.bz2
This patch introduces ETE (Embedded Trace Extension) system registers for the AArch64 architecture.
gas * testsuite/gas/aarch64/ete.d: New test. * testsuite/gas/aarch64/ete.s: New test. opcodes * aarch64-opc.c: Add ETE system registers TRCEXTINSELR<0-3> and TRCRSR.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/aarch64-opc.c6
2 files changed, 10 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 291c52e..e9dfb78 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,9 @@
2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+ * aarch64-opc.c: Add ETE system registers TRCEXTINSELR<0-3> and TRCRSR.
+
+2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
+
* aarch64-opc.c: Add TRBE system registers TRBIDR_EL1 , TRBBASER_EL1 ,
TRBLIMITR_EL1 , TRBMAR_EL1 , TRBPTR_EL1, TRBSR_EL1 and TRBTRG_EL1.
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index 1be8d21..83afb1f 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -4319,6 +4319,12 @@ const aarch64_sys_reg aarch64_sys_regs [] =
SR_CORE("trbsr_el1", CPENC (3,0,C9,C11,3), 0),
SR_CORE("trbtrg_el1", CPENC (3,0,C9,C11,6), 0),
+ SR_CORE ("trcextinselr0", CPENC (2,1,C0,C8,4), 0),
+ SR_CORE ("trcextinselr1", CPENC (2,1,C0,C9,4), 0),
+ SR_CORE ("trcextinselr2", CPENC (2,1,C0,C10,4), 0),
+ SR_CORE ("trcextinselr3", CPENC (2,1,C0,C11,4), 0),
+ SR_CORE ("trcrsr", CPENC (2,1,C0,C10,0), 0),
+
{ 0, CPENC (0,0,0,0,0), 0, 0 }
};