diff options
| author | Bernd Schmidt <bernds@codesourcery.com> | 2006-03-16 19:09:48 +0000 |
|---|---|---|
| committer | Bernd Schmidt <bernds@codesourcery.com> | 2006-03-16 19:09:48 +0000 |
| commit | 331f1cbe1ca41ca35f74a97739688f496241e0cd (patch) | |
| tree | b172dfdfb994dbb1b9eff369173ccdcaac707600 /opcodes | |
| parent | 2db51539bb51cbaeed0387ada9d44af59d156e37 (diff) | |
| download | gdb-331f1cbe1ca41ca35f74a97739688f496241e0cd.zip gdb-331f1cbe1ca41ca35f74a97739688f496241e0cd.tar.gz gdb-331f1cbe1ca41ca35f74a97739688f496241e0cd.tar.bz2 | |
* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
logic to identify halfword shifts.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/bfin-dis.c | 136 |
2 files changed, 32 insertions, 109 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 135cf20..ae0eb64 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com> + + * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the + logic to identify halfword shifts. + 2006-03-16 Paul Brook <paul@codesourcery.com> * arm-dis.c (arm_opcodes): Rename swi to svc. diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c index adeb7d0..0dc2922 100644 --- a/opcodes/bfin-dis.c +++ b/opcodes/bfin-dis.c @@ -4034,130 +4034,48 @@ decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf) int HLs = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask); - if (HLs == 0 && sop == 0 && sopcde == 0) - { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, ">>>"); - OUTS (outf, uimm4 (newimmag)); - } - else if (HLs == 1 && sop == 0 && sopcde == 0) + if (sop == 0 && sopcde == 0) { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, ">>>"); - OUTS (outf, uimm4 (newimmag)); - } - else if (HLs == 2 && sop == 0 && sopcde == 0) - { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, ">>>"); - OUTS (outf, uimm4 (newimmag)); - } - else if (HLs == 3 && sop == 0 && sopcde == 0) - { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, ">>>"); + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); + OUTS (outf, " = "); + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); + OUTS (outf, " >>> "); OUTS (outf, uimm4 (newimmag)); } - else if (HLs == 0 && sop == 1 && sopcde == 0) - { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, "<<"); - OUTS (outf, uimm4 (immag)); - OUTS (outf, "(S)"); - } - else if (HLs == 1 && sop == 1 && sopcde == 0) - { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, "<<"); - OUTS (outf, uimm4 (immag)); - OUTS (outf, "(S)"); - } - else if (HLs == 2 && sop == 1 && sopcde == 0) - { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, "<<"); - OUTS (outf, uimm4 (immag)); - OUTS (outf, "(S)"); - } - else if (HLs == 3 && sop == 1 && sopcde == 0) - { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, "<<"); - OUTS (outf, uimm4 (immag)); - OUTS (outf, "(S)"); - } - else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 0) + else if (sop == 1 && sopcde == 0 && bit8 == 0) { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, "<<"); + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); + OUTS (outf, " = "); + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); + OUTS (outf, " << "); OUTS (outf, uimm4 (immag)); + OUTS (outf, " (S)"); } - else if (HLs == 0 && sop == 2 && sopcde == 0 && bit8 == 1) - { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, ">>"); - OUTS (outf, uimm4 (newimmag)); - } - else if (HLs == 1 && sop == 2 && sopcde == 0) - { - OUTS (outf, dregs_lo (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, ">>"); - OUTS (outf, uimm4 (newimmag)); - } - else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 1) + else if (sop == 1 && sopcde == 0 && bit8 == 1) { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, ">>"); + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); + OUTS (outf, " = "); + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); + OUTS (outf, " >>> "); OUTS (outf, uimm4 (newimmag)); + OUTS (outf, " (S)"); } - else if (HLs == 2 && sop == 2 && sopcde == 0 && bit8 == 0) + else if (sop == 2 && sopcde == 0 && bit8 == 0) { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_lo (src1)); - OUTS (outf, "<<"); + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); + OUTS (outf, " = "); + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); + OUTS (outf, " << "); OUTS (outf, uimm4 (immag)); } - else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 1) + else if (sop == 2 && sopcde == 0 && bit8 == 1) { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, ">>"); + OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); + OUTS (outf, " = "); + OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); + OUTS (outf, " >> "); OUTS (outf, uimm4 (newimmag)); } - else if (HLs == 3 && sop == 2 && sopcde == 0 && bit8 == 0) - { - OUTS (outf, dregs_hi (dst0)); - OUTS (outf, "="); - OUTS (outf, dregs_hi (src1)); - OUTS (outf, "<<"); - OUTS (outf, uimm4 (immag)); - } else if (sop == 2 && sopcde == 3 && HLs == 1) { OUTS (outf, "A1= ROT A1 BY "); |