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authorPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>2021-11-17 19:56:09 +0000
committerPrzemyslaw Wirkus <przemyslaw.wirkus@arm.com>2021-11-17 19:56:42 +0000
commit1cad938de57a1577e5fe4b4afcabe889a8b9b9d7 (patch)
tree0a83cfe3b99989bb705595bb9bf0855553e25e15 /opcodes
parent7bb5f07c8aa5168009f1e7b6857a30f0ee5ad16a (diff)
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aarch64: [SME] Add ZERO instruction
This patch is adding ZERO (a list of 64-bit element ZA tiles) instruction. gas/ChangeLog: * config/tc-aarch64.c (parse_sme_list_of_64bit_tiles): New parser. (parse_operands): Handle OPND_SME_list_of_64bit_tiles. * testsuite/gas/aarch64/sme-4-illegal.d: New test. * testsuite/gas/aarch64/sme-4-illegal.l: New test. * testsuite/gas/aarch64/sme-4-illegal.s: New test. * testsuite/gas/aarch64/sme-4.d: New test. * testsuite/gas/aarch64/sme-4.s: New test. include/ChangeLog: * opcode/aarch64.h (enum aarch64_opnd): New operand AARCH64_OPND_SME_list_of_64bit_tiles. opcodes/ChangeLog: * aarch64-opc.c (print_sme_za_list): New printing function. (aarch64_print_operand): Handle OPND_SME_list_of_64bit_tiles. * aarch64-opc.h (enum aarch64_field_kind): New bitfield FLD_SME_zero_mask. * aarch64-tbl.h (struct aarch64_opcode): New ZERO instruction. aarch64-asm-2.c: Regenerate. aarch64-dis-2.c: Regenerate. aarch64-opc-2.c: Regenerate.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/aarch64-asm-2.c3
-rw-r--r--opcodes/aarch64-dis-2.c290
-rw-r--r--opcodes/aarch64-opc-2.c1
-rw-r--r--opcodes/aarch64-opc.c45
-rw-r--r--opcodes/aarch64-opc.h1
-rw-r--r--opcodes/aarch64-tbl.h4
6 files changed, 204 insertions, 140 deletions
diff --git a/opcodes/aarch64-asm-2.c b/opcodes/aarch64-asm-2.c
index eda943e..0e04842 100644
--- a/opcodes/aarch64-asm-2.c
+++ b/opcodes/aarch64-asm-2.c
@@ -675,7 +675,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 215:
+ case 216:
return aarch64_ins_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ins_reglist (self, info, code, inst, errors);
@@ -721,6 +721,7 @@ aarch64_insert_operand (const aarch64_operand *self,
case 188:
case 189:
case 214:
+ case 215:
return aarch64_ins_imm (self, info, code, inst, errors);
case 44:
case 45:
diff --git a/opcodes/aarch64-dis-2.c b/opcodes/aarch64-dis-2.c
index 6bde0f3..9dd9402 100644
--- a/opcodes/aarch64-dis-2.c
+++ b/opcodes/aarch64-dis-2.c
@@ -96,55 +96,66 @@ aarch64_opcode_lookup_1 (uint32_t word)
{
if (((word >> 17) & 0x1) == 0)
{
- if (((word >> 20) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000xx00xx0xxxxxxxxxxxxxxxxx
- mov. */
- return 2377;
- }
- else
+ if (((word >> 19) & 0x1) == 0)
{
- if (((word >> 16) & 0x1) == 0)
+ if (((word >> 20) & 0x1) == 0)
{
- if (((word >> 22) & 0x1) == 0)
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000x001xx00xxxxxxxxxxxxxxxx
- addha. */
- return 2348;
- }
- else
- {
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000x101xx00xxxxxxxxxxxxxxxx
- addha. */
- return 2349;
- }
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx000x0xxxxxxxxxxxxxxxxx
+ mov. */
+ return 2377;
}
else
{
- if (((word >> 22) & 0x1) == 0)
+ if (((word >> 16) & 0x1) == 0)
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000x001xx01xxxxxxxxxxxxxxxx
- addva. */
- return 2350;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x0010x00xxxxxxxxxxxxxxxx
+ addha. */
+ return 2348;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x1010x00xxxxxxxxxxxxxxxx
+ addha. */
+ return 2349;
+ }
}
else
{
- /* 33222222222211111111110000000000
- 10987654321098765432109876543210
- x1000000x101xx01xxxxxxxxxxxxxxxx
- addva. */
- return 2351;
+ if (((word >> 22) & 0x1) == 0)
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x0010x01xxxxxxxxxxxxxxxx
+ addva. */
+ return 2350;
+ }
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000x1010x01xxxxxxxxxxxxxxxx
+ addva. */
+ return 2351;
+ }
}
}
}
+ else
+ {
+ /* 33222222222211111111110000000000
+ 10987654321098765432109876543210
+ x1000000xx0x1x0xxxxxxxxxxxxxxxxx
+ zero. */
+ return 2380;
+ }
}
else
{
@@ -2753,7 +2764,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001000xxxxxxxxx00xxxxxxxxxx
stlurb. */
- return 2420;
+ return 2421;
}
else
{
@@ -2761,7 +2772,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2428;
+ return 2429;
}
}
else
@@ -2772,7 +2783,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001000xxxxxxxxx00xxxxxxxxxx
stlurh. */
- return 2424;
+ return 2425;
}
else
{
@@ -2780,7 +2791,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001000xxxxxxxxx00xxxxxxxxxx
stlur. */
- return 2431;
+ return 2432;
}
}
}
@@ -2860,7 +2871,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001010xxxxxxxxx00xxxxxxxxxx
ldapurb. */
- return 2421;
+ return 2422;
}
else
{
@@ -2868,7 +2879,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2429;
+ return 2430;
}
}
else
@@ -2879,7 +2890,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
01011001010xxxxxxxxx00xxxxxxxxxx
ldapurh. */
- return 2425;
+ return 2426;
}
else
{
@@ -2887,7 +2898,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11011001010xxxxxxxxx00xxxxxxxxxx
ldapur. */
- return 2432;
+ return 2433;
}
}
}
@@ -2970,7 +2981,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
00011001100xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2423;
+ return 2424;
}
else
{
@@ -2978,7 +2989,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
10011001100xxxxxxxxx00xxxxxxxxxx
ldapursw. */
- return 2430;
+ return 2431;
}
}
else
@@ -2987,7 +2998,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001100xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2427;
+ return 2428;
}
}
else
@@ -2998,7 +3009,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0011001110xxxxxxxxx00xxxxxxxxxx
ldapursb. */
- return 2422;
+ return 2423;
}
else
{
@@ -3006,7 +3017,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1011001110xxxxxxxxx00xxxxxxxxxx
ldapursh. */
- return 2426;
+ return 2427;
}
}
}
@@ -3492,7 +3503,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx0xx10xxxxxxxxxx
setf8. */
- return 2418;
+ return 2419;
}
else
{
@@ -3500,7 +3511,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010x00xxxxxx1xx10xxxxxxxxxx
setf16. */
- return 2419;
+ return 2420;
}
}
else
@@ -3646,7 +3657,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xxx11010000xxxxxxxxx01xxxxxxxxxx
rmif. */
- return 2417;
+ return 2418;
}
else
{
@@ -4695,7 +4706,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000110xxxxxxxxxx
usdot. */
- return 2437;
+ return 2438;
}
}
}
@@ -4769,7 +4780,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x01x1xxxxx000111xxxxxxxxxx
sudot. */
- return 2438;
+ return 2439;
}
}
}
@@ -7388,7 +7399,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x0xx0xxxxx011110xxxxxxxxxx
usdot. */
- return 2436;
+ return 2437;
}
}
}
@@ -9092,7 +9103,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0100xxx10101xxxxxxxxxxxxx
bfcvtnt. */
- return 2465;
+ return 2466;
}
}
else
@@ -9335,7 +9346,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxxx00xxxxxxxxxxxxx
ld1rob. */
- return 2441;
+ return 2442;
}
else
{
@@ -9343,7 +9354,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxxx00xxxxxxxxxxxxx
ld1roh. */
- return 2442;
+ return 2443;
}
}
else
@@ -9575,7 +9586,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx010xxxxxxxxxxxxx
bfdot. */
- return 2462;
+ return 2463;
}
else
{
@@ -9596,7 +9607,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx0xxxxxxxxxx
bfmlalb. */
- return 2469;
+ return 2470;
}
else
{
@@ -9604,7 +9615,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx010xx1xxxxxxxxxx
bfmlalt. */
- return 2468;
+ return 2469;
}
}
else
@@ -9659,7 +9670,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11001x0011xxxxx1x0xxxxxxxxxxxxx
bfdot. */
- return 2461;
+ return 2462;
}
else
{
@@ -9671,7 +9682,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx0xxxxxxxxxx
bfmlalb. */
- return 2467;
+ return 2468;
}
else
{
@@ -9679,7 +9690,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx1x0xx1xxxxxxxxxx
bfmlalt. */
- return 2466;
+ return 2467;
}
}
else
@@ -9730,7 +9741,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x00x1xxxxx001xxxxxxxxxxxxx
ld1rob. */
- return 2445;
+ return 2446;
}
else
{
@@ -9738,7 +9749,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x01x1xxxxx001xxxxxxxxxxxxx
ld1roh. */
- return 2446;
+ return 2447;
}
}
else
@@ -10097,7 +10108,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0101xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2439;
+ return 2440;
}
else
{
@@ -10130,7 +10141,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0011xxxxx111xxxxxxxxxxxxx
bfmmla. */
- return 2463;
+ return 2464;
}
else
{
@@ -10160,7 +10171,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x0111xxxxx111xxxxxxxxxxxxx
fmmla. */
- return 2440;
+ return 2441;
}
else
{
@@ -10289,7 +10300,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x00xxxxxxxxxx
zip1. */
- return 2449;
+ return 2450;
}
else
{
@@ -10299,7 +10310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000010xxxxxxxxxx
uzp1. */
- return 2451;
+ return 2452;
}
else
{
@@ -10307,7 +10318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000110xxxxxxxxxx
trn1. */
- return 2453;
+ return 2454;
}
}
}
@@ -10319,7 +10330,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000x01xxxxxxxxxx
zip2. */
- return 2450;
+ return 2451;
}
else
{
@@ -10329,7 +10340,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000011xxxxxxxxxx
uzp2. */
- return 2452;
+ return 2453;
}
else
{
@@ -10337,7 +10348,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000001x1101xxxxx000111xxxxxxxxxx
trn2. */
- return 2454;
+ return 2455;
}
}
}
@@ -11385,7 +11396,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1000xxxxx100110xxxxxxxxxx
smmla. */
- return 2433;
+ return 2434;
}
else
{
@@ -11393,7 +11404,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1100xxxxx100110xxxxxxxxxx
usmmla. */
- return 2435;
+ return 2436;
}
}
else
@@ -11402,7 +11413,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010001x1x10xxxxx100110xxxxxxxxxx
ummla. */
- return 2434;
+ return 2435;
}
}
}
@@ -12898,7 +12909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx000xxxxxxxxxxxxx
ld1row. */
- return 2443;
+ return 2444;
}
else
{
@@ -12906,7 +12917,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx000xxxxxxxxxxxxx
ld1rod. */
- return 2444;
+ return 2445;
}
}
}
@@ -13280,7 +13291,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x10x1xxxxx001xxxxxxxxxxxxx
ld1row. */
- return 2447;
+ return 2448;
}
else
{
@@ -13288,7 +13299,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
101001x11x1xxxxx001xxxxxxxxxxxxx
ld1rod. */
- return 2448;
+ return 2449;
}
}
}
@@ -14722,7 +14733,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
011001x110001x10101xxxxxxxxxxxxx
bfcvt. */
- return 2464;
+ return 2465;
}
}
else
@@ -16791,7 +16802,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1001xxxxxxxxxx
smmla. */
- return 2455;
+ return 2456;
}
}
}
@@ -16824,7 +16835,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0101xxxxxxxxxx
sdot. */
- return 2381;
+ return 2382;
}
}
else
@@ -16898,7 +16909,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x1011xxxxxxxxxx
usmmla. */
- return 2457;
+ return 2458;
}
}
}
@@ -16931,7 +16942,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
0x001110xx0xxxxx1x0111xxxxxxxxxx
usdot. */
- return 2458;
+ return 2459;
}
}
else
@@ -16978,7 +16989,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110000xxxxxxxxxxxxxxxxxxxxx
eor3. */
- return 2388;
+ return 2389;
}
else
{
@@ -16986,7 +16997,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110100xxxxxxxxxxxxxxxxxxxxx
xar. */
- return 2390;
+ return 2391;
}
}
else
@@ -16997,7 +17008,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx0xxxxxxxxxxxxxxx
sm3ss1. */
- return 2392;
+ return 2393;
}
else
{
@@ -17011,7 +17022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx00xxxxxxxxxx
sm3tt1a. */
- return 2393;
+ return 2394;
}
else
{
@@ -17019,7 +17030,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx00xxxxxxxxxx
sha512su0. */
- return 2386;
+ return 2387;
}
}
else
@@ -17028,7 +17039,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx10xxxxxxxxxx
sm3tt2a. */
- return 2395;
+ return 2396;
}
}
else
@@ -17041,7 +17052,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110010xxxxx1xxx01xxxxxxxxxx
sm3tt1b. */
- return 2394;
+ return 2395;
}
else
{
@@ -17049,7 +17060,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110110xxxxx1xxx01xxxxxxxxxx
sm4e. */
- return 2399;
+ return 2400;
}
}
else
@@ -17058,7 +17069,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110x10xxxxx1xxx11xxxxxxxxxx
sm3tt2b. */
- return 2396;
+ return 2397;
}
}
}
@@ -17239,7 +17250,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx100101xxxxxxxxxx
udot. */
- return 2380;
+ return 2381;
}
}
else
@@ -17270,7 +17281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx101x01xxxxxxxxxx
ummla. */
- return 2456;
+ return 2457;
}
else
{
@@ -17289,7 +17300,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101110xx0xxxxx1x1011xxxxxxxxxx
bfmmla. */
- return 2472;
+ return 2473;
}
else
{
@@ -17299,7 +17310,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx1011100x0xxxxx1x1111xxxxxxxxxx
bfdot. */
- return 2470;
+ return 2471;
}
else
{
@@ -17309,7 +17320,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x0xxxxx1x1111xxxxxxxxxx
bfmlalb. */
- return 2477;
+ return 2478;
}
else
{
@@ -17317,7 +17328,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x0xxxxx1x1111xxxxxxxxxx
bfmlalt. */
- return 2476;
+ return 2477;
}
}
}
@@ -17901,7 +17912,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
000011101x1xxxx1011010xxxxxxxxxx
bfcvtn. */
- return 2473;
+ return 2474;
}
else
{
@@ -17909,7 +17920,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
010011101x1xxxx1011010xxxxxxxxxx
bfcvtn2. */
- return 2474;
+ return 2475;
}
}
}
@@ -18227,7 +18238,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx0xxxxxxxxxxxxxxx
bcax. */
- return 2391;
+ return 2392;
}
}
else
@@ -18838,7 +18849,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx100000xxxxxxxxxx
sha512h. */
- return 2384;
+ return 2385;
}
}
}
@@ -18890,7 +18901,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
11001110xx1xxxxx110000xxxxxxxxxx
sm3partw1. */
- return 2397;
+ return 2398;
}
}
}
@@ -19133,7 +19144,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100010xxxxxxxxxx
sha512su1. */
- return 2387;
+ return 2388;
}
}
else
@@ -19209,7 +19220,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110010xxxxxxxxxx
sm4ekey. */
- return 2400;
+ return 2401;
}
}
else
@@ -20035,7 +20046,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100001xxxxxxxxxx
sha512h2. */
- return 2385;
+ return 2386;
}
}
else
@@ -20067,7 +20078,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x0011100x1xxxxx110001xxxxxxxxxx
sm3partw2. */
- return 2398;
+ return 2399;
}
}
else
@@ -20307,7 +20318,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
1x001110xx1xxxxx100011xxxxxxxxxx
rax1. */
- return 2389;
+ return 2390;
}
}
else
@@ -20339,7 +20350,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2403;
+ return 2404;
}
else
{
@@ -20347,7 +20358,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011100x1xxxxx110011xxxxxxxxxx
fmlal2. */
- return 2407;
+ return 2408;
}
}
}
@@ -20369,7 +20380,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x01011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2404;
+ return 2405;
}
else
{
@@ -20377,7 +20388,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x11011101x1xxxxx110011xxxxxxxxxx
fmlsl2. */
- return 2408;
+ return 2409;
}
}
}
@@ -20416,7 +20427,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2401;
+ return 2402;
}
else
{
@@ -20424,7 +20435,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011100x1xxxxx111011xxxxxxxxxx
fmlal. */
- return 2405;
+ return 2406;
}
}
else
@@ -20446,7 +20457,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x00011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2402;
+ return 2403;
}
else
{
@@ -20454,7 +20465,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x10011101x1xxxxx111011xxxxxxxxxx
fmlsl. */
- return 2406;
+ return 2407;
}
}
else
@@ -22262,7 +22273,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2409;
+ return 2410;
}
else
{
@@ -22270,7 +22281,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0000x0xxxxxxxxxx
fmlal. */
- return 2413;
+ return 2414;
}
}
else
@@ -22292,7 +22303,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2410;
+ return 2411;
}
else
{
@@ -22300,7 +22311,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1001111xxxxxxxx0100x0xxxxxxxxxx
fmlsl. */
- return 2414;
+ return 2415;
}
}
else
@@ -22806,7 +22817,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2411;
+ return 2412;
}
else
{
@@ -22814,7 +22825,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1000x0xxxxxxxxxx
fmlal2. */
- return 2415;
+ return 2416;
}
}
}
@@ -22836,7 +22847,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x0101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2412;
+ return 2413;
}
else
{
@@ -22844,7 +22855,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x1101111xxxxxxxx1100x0xxxxxxxxxx
fmlsl2. */
- return 2416;
+ return 2417;
}
}
}
@@ -22900,7 +22911,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx001111xxxxxxxx1110x0xxxxxxxxxx
sdot. */
- return 2383;
+ return 2384;
}
else
{
@@ -22908,7 +22919,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx101111xxxxxxxx1110x0xxxxxxxxxx
udot. */
- return 2382;
+ return 2383;
}
}
}
@@ -23011,7 +23022,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111100xxxxxx1111x0xxxxxxxxxx
sudot. */
- return 2460;
+ return 2461;
}
else
{
@@ -23019,7 +23030,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111110xxxxxx1111x0xxxxxxxxxx
usdot. */
- return 2459;
+ return 2460;
}
}
else
@@ -23030,7 +23041,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
xx00111101xxxxxx1111x0xxxxxxxxxx
bfdot. */
- return 2471;
+ return 2472;
}
else
{
@@ -23040,7 +23051,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x000111111xxxxxx1111x0xxxxxxxxxx
bfmlalb. */
- return 2479;
+ return 2480;
}
else
{
@@ -23048,7 +23059,7 @@ aarch64_opcode_lookup_1 (uint32_t word)
10987654321098765432109876543210
x100111111xxxxxx1111x0xxxxxxxxxx
bfmlalt. */
- return 2478;
+ return 2479;
}
}
}
@@ -23686,8 +23697,8 @@ aarch64_find_next_opcode (const aarch64_opcode *opcode)
case 824: return NULL; /* fsqrt --> NULL. */
case 832: value = 833; break; /* frintz --> frintz. */
case 833: return NULL; /* frintz --> NULL. */
- case 825: value = 2475; break; /* fcvt --> bfcvt. */
- case 2475: return NULL; /* bfcvt --> NULL. */
+ case 825: value = 2476; break; /* fcvt --> bfcvt. */
+ case 2476: return NULL; /* bfcvt --> NULL. */
case 834: value = 835; break; /* frinta --> frinta. */
case 835: return NULL; /* frinta --> NULL. */
case 836: value = 837; break; /* frintx --> frintx. */
@@ -24206,7 +24217,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 33:
case 34:
case 35:
- case 215:
+ case 216:
return aarch64_ext_reglane (self, info, code, inst, errors);
case 36:
return aarch64_ext_reglist (self, info, code, inst, errors);
@@ -24253,6 +24264,7 @@ aarch64_extract_operand (const aarch64_operand *self,
case 188:
case 189:
case 214:
+ case 215:
return aarch64_ext_imm (self, info, code, inst, errors);
case 44:
case 45:
diff --git a/opcodes/aarch64-opc-2.c b/opcodes/aarch64-opc-2.c
index e80cbf2..10880a0 100644
--- a/opcodes/aarch64-opc-2.c
+++ b/opcodes/aarch64-opc-2.c
@@ -238,6 +238,7 @@ const struct aarch64_operand aarch64_operands[] =
{AARCH64_OPND_CLASS_SVE_REG, "SME_ZA_HV_idx_src", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_10,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_5}, "an SME horizontal or vertical vector access register"},
{AARCH64_OPND_CLASS_SVE_REG, "SME_ZA_HV_idx_dest", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_size_10,FLD_SME_Q,FLD_SME_V,FLD_SME_Rv,FLD_imm4_2}, "an SME horizontal or vertical vector access register"},
{AARCH64_OPND_CLASS_PRED_REG, "SME_Pm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Pm}, "an SVE predicate register"},
+ {AARCH64_OPND_CLASS_SVE_REG, "SME_list_of_64bit_tiles", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_zero_mask}, "list of 64-bit ZA element tiles"},
{AARCH64_OPND_CLASS_IMMEDIATE, "TME_UIMM16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm16}, "a 16-bit unsigned immediate for TME tcancel"},
{AARCH64_OPND_CLASS_SIMD_ELEMENT, "SM3_IMM2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SM3_imm2}, "an indexed SM3 vector immediate"},
{AARCH64_OPND_CLASS_NIL, "", 0, {0}, "DUMMY"},
diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c
index b12bf3e..9f32eb5 100644
--- a/opcodes/aarch64-opc.c
+++ b/opcodes/aarch64-opc.c
@@ -329,6 +329,7 @@ const aarch64_field fields[] =
{ 15, 1 }, /* SME_V: (horizontal / vertical tiles), bit 15. */
{ 13, 2 }, /* SME_Rv: vector select register W12-W15, bits [14:13]. */
{ 13, 3 }, /* SME Pm second source scalable predicate register P0-P7. */
+ { 0, 8 }, /* SME_zero_mask: list of up to 8 tile names separated by commas [7:0]. */
{ 11, 2 }, /* rotate1: FCMLA immediate rotate. */
{ 13, 2 }, /* rotate2: Indexed element FCMLA immediate rotate. */
{ 12, 1 }, /* rotate3: FCADD immediate rotate. */
@@ -3139,6 +3140,46 @@ print_register_offset_address (char *buf, size_t size,
snprintf (buf, size, "[%s, %s%s]", base, offset, tb);
}
+/* Print ZA tiles from imm8 in ZERO instruction.
+
+ The preferred disassembly of this instruction uses the shortest list of tile
+ names that represent the encoded immediate mask.
+
+ For example:
+ * An all-ones immediate is disassembled as {ZA}.
+ * An all-zeros immediate is disassembled as an empty list { }.
+*/
+static void
+print_sme_za_list(char *buf, size_t size, int mask)
+{
+ const char* zan[] = { "za", "za0.h", "za1.h", "za0.s",
+ "za1.s", "za2.s", "za3.s", "za0.d",
+ "za1.d", "za2.d", "za3.d", "za4.d",
+ "za5.d", "za6.d", "za7.d", " " };
+ const int zan_v[] = { 0xff, 0x55, 0xaa, 0x11,
+ 0x22, 0x44, 0x88, 0x01,
+ 0x02, 0x04, 0x08, 0x10,
+ 0x20, 0x40, 0x80, 0x00 };
+ int i, k;
+ const int ZAN_SIZE = sizeof(zan) / sizeof(zan[0]);
+
+ k = snprintf (buf, size, "{");
+ for (i = 0; i < ZAN_SIZE; i++)
+ {
+ if ((mask & zan_v[i]) == zan_v[i])
+ {
+ mask &= ~zan_v[i];
+ if (k > 1)
+ k += snprintf (buf + k, size - k, ", %s", zan[i]);
+ else
+ k += snprintf (buf + k, size - k, "%s", zan[i]);
+ }
+ if (mask == 0)
+ break;
+ }
+ snprintf (buf + k, size - k, "}");
+}
+
/* Generate the string representation of the operand OPNDS[IDX] for OPCODE
in *BUF. The caller should pass in the maximum size of *BUF in SIZE.
PC, PCREL_P and ADDRESS are used to pass in and return information about
@@ -3370,6 +3411,10 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
opnd->za_tile_vector.index.imm);
break;
+ case AARCH64_OPND_SME_list_of_64bit_tiles:
+ print_sme_za_list (buf, size, opnd->reg.regno);
+ break;
+
case AARCH64_OPND_CRn:
case AARCH64_OPND_CRm:
snprintf (buf, size, "C%" PRIi64, opnd->imm.value);
diff --git a/opcodes/aarch64-opc.h b/opcodes/aarch64-opc.h
index 9c657df..62aad8b 100644
--- a/opcodes/aarch64-opc.h
+++ b/opcodes/aarch64-opc.h
@@ -158,6 +158,7 @@ enum aarch64_field_kind
FLD_SME_V,
FLD_SME_Rv,
FLD_SME_Pm,
+ FLD_SME_zero_mask,
FLD_rotate1,
FLD_rotate2,
FLD_rotate3,
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index 5307cda..9313220 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -5136,6 +5136,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
SME_INSN ("mova", 0xc0020000, 0xff3e0200, sme_misc, 0, OP3 (SVE_Zd, SVE_Pg3, SME_ZA_HV_idx_src), OP_SME_BHSDQ_PM_BHSDQ, 0, 0),
SME_INSN ("mova", 0xc0000000, 0xff3e0010, sme_misc, 0, OP3 (SME_ZA_HV_idx_dest, SVE_Pg3, SVE_Zn), OP_SME_BHSDQ_PM_BHSDQ, 0, 0),
+ SME_INSN ("zero", 0xc0080000, 0xffffff00, sme_misc, 0, OP1 (SME_list_of_64bit_tiles), {}, 0, 0),
+
/* SIMD Dot Product (optional in v8.2-A). */
DOT_INSN ("udot", 0x2e009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ),
DOT_INSN ("sdot", 0xe009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ),
@@ -5715,6 +5717,8 @@ const struct aarch64_opcode aarch64_opcode_table[] =
"an SME horizontal or vertical vector access register") \
Y(PRED_REG, regno, "SME_Pm", 0, F(FLD_SME_Pm), \
"an SVE predicate register") \
+ Y(SVE_REG, imm, "SME_list_of_64bit_tiles", 0, \
+ F(FLD_SME_zero_mask), "list of 64-bit ZA element tiles") \
Y(IMMEDIATE, imm, "TME_UIMM16", 0, F(FLD_imm16), \
"a 16-bit unsigned immediate for TME tcancel") \
Y(SIMD_ELEMENT, reglane, "SM3_IMM2", 0, F(FLD_SM3_imm2), \
generated by cgit v1.1 at 2024-09-07 06:17:25 +0000