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| author | J.T. Conklin <jtc@acorntoolworks.com> | 1997-01-24 20:14:26 +0000 |
|---|---|---|
| committer | J.T. Conklin <jtc@acorntoolworks.com> | 1997-01-24 20:14:26 +0000 |
| commit | 071ad7f0e0b2c5d80f3c5ff6c9e7aff19808eae1 (patch) | |
| tree | 9fee1d2fd73399557baa79e586a9d1eb1d8b04da /opcodes | |
| parent | ae0d7848d8ecefb58eccbccbf11a44bc9869e44a (diff) | |
| download | gdb-071ad7f0e0b2c5d80f3c5ff6c9e7aff19808eae1.zip gdb-071ad7f0e0b2c5d80f3c5ff6c9e7aff19808eae1.tar.gz gdb-071ad7f0e0b2c5d80f3c5ff6c9e7aff19808eae1.tar.bz2 | |
* m68k-opc.c (m68k_opcodes): Changed operand specifier for the
coldfire moveb instruction to not allow an address register as
destination. Although the documentation does not indicate that
this is invalid, experiments uncovered unexpected behavior.
Added a comment explaining the situation. Thanks to Andreas
Schwab for pointing this out to me.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 9 | ||||
| -rw-r--r-- | opcodes/m68k-opc.c | 19 |
2 files changed, 27 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 95e3fb2..82ca249 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,12 @@ +Fri Jan 24 12:08:21 1997 J.T. Conklin <jtc@cygnus.com> + + * m68k-opc.c (m68k_opcodes): Changed operand specifier for the + coldfire moveb instruction to not allow an address register as + destination. Although the documentation does not indicate that + this is invalid, experiments uncovered unexpected behavior. + Added a comment explaining the situation. Thanks to Andreas + Schwab for pointing this out to me. + start-sanitize-tic80 Wed Jan 22 20:13:51 1997 Fred Fish <fnf@cygnus.com> diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c index 6c5716a..4a9220f 100644 --- a/opcodes/m68k-opc.c +++ b/opcodes/m68k-opc.c @@ -1230,6 +1230,23 @@ const struct m68k_opcode m68k_opcodes[] = {"lsrl", one(0160210), one(0170770), "QdDs", m68000up | mcf5200 }, {"lsrl", one(0160250), one(0170770), "DdDs", m68000up | mcf5200 }, +/* NOTE: The mcf5200 family programmer's reference manual does not + indicate the byte form of the movea instruction is invalid (as it + is on 68000 family cpus). However, experiments on the 5202 yeild + unexpected results. The value is copied, but it is not sign extended + (as is done with movea.w) and the top three bytes in the address + register are not disturbed. I don't know if this is the intended + behavior --- it could be a hole in instruction decoding (Motorola + decided not to trap all invalid instructions for performance reasons) + --- but I suspect that it is not. + + I reported this to Motorola ISD Technical Communications Support, + which replied that other coldfire assemblers reject movea.b. For + this reason I've decided to not allow moveab. + + jtc@cygnus.com - 97/01/24 + */ + {"moveal", one(0020100), one(0170700), "*lAd", m68000up | mcf5200 }, {"moveaw", one(0030100), one(0170700), "*wAd", m68000up | mcf5200 }, @@ -1268,7 +1285,7 @@ const struct m68k_opcode m68k_opcodes[] = /* The move opcode can generate the movea and moveq instructions. */ {"moveb", one(0010000), one(0170000), ";b$d", m68000up }, -{"moveb", one(0010000), one(0170000), "ms%d", mcf5200 }, +{"moveb", one(0010000), one(0170000), "ms$d", mcf5200 }, {"moveb", one(0010000), one(0170000), "nspd", mcf5200 }, {"moveb", one(0010000), one(0170000), "obmd", mcf5200 }, |