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| author | David S. Miller <davem@redhat.com> | 2011-09-27 04:30:32 +0000 |
|---|---|---|
| committer | David S. Miller <davem@redhat.com> | 2011-09-27 04:30:32 +0000 |
| commit | 92a7795b59d61413c7df90cf615ec9c9d2977411 (patch) | |
| tree | b051438cdca59852d776b4fb66c8ebae845ef1f5 /opcodes | |
| parent | 79df06c40d5e4c0182d25075d463e861d7e8c930 (diff) | |
| download | gdb-92a7795b59d61413c7df90cf615ec9c9d2977411.zip gdb-92a7795b59d61413c7df90cf615ec9c9d2977411.tar.gz gdb-92a7795b59d61413c7df90cf615ec9c9d2977411.tar.bz2 | |
opcodes/
* sparc-opc.c (sparc_opcodes): Fix random instruction to write
to a float instead of an integer register.
gas/testsuite/
* gas/sparc/hpcvis3.s: Update to use float reg for random insn.
* gas/sparc/hpcvis3.d: Likewise.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/sparc-opc.c | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 67bfbdf..051f52a 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2011-09-27 David S. Miller <davem@davemloft.net> + + * sparc-opc.c (sparc_opcodes): Fix random instruction to write + to a float instead of an integer register. + 2011-09-26 David S. Miller <davem@davemloft.net> * sparc-opc.c (sparc_opcodes): Add integer multiply-add diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c index 6fbe025..a2096c5 100644 --- a/opcodes/sparc-opc.c +++ b/opcodes/sparc-opc.c @@ -1869,7 +1869,7 @@ SLCBCC("cbnefr", 15), { "fnumaddd", F3(2, 0x3f, 0)|OPF_LOW4(14), F3(~2, ~0x3f, 0)|OPF_LOW4(~14), "v,B,5,H", F_FLOAT|F_FJFMAU, v9b }, { "addxc", F3F(2, 0x36, 0x011), F3F(~2, ~0x36, ~0x011), "1,2,d", F_VIS3, v9b }, { "addxccc", F3F(2, 0x36, 0x013), F3F(~2, ~0x36, ~0x013), "1,2,d", F_VIS3, v9b }, -{ "random", F3F(2, 0x36, 0x015), F3F(~2, ~0x36, ~0x015), "d", F_RANDOM, v9b }, +{ "random", F3F(2, 0x36, 0x015), F3F(~2, ~0x36, ~0x015), "H", F_FLOAT|F_RANDOM, v9b }, { "umulxhi", F3F(2, 0x36, 0x016), F3F(~2, ~0x36, ~0x016), "1,2,d", F_VIS3, v9b }, { "lzd", F3F(2, 0x36, 0x017), F3F(~2, ~0x36, ~0x017), "2,d", F_VIS3, v9b }, { "cmask8", F3F(2, 0x36, 0x01b), F3F(~2, ~0x36, ~0x01b), "2", F_VIS3, v9b }, |