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authorIgor Tsimbalist <igor.v.tsimbalist@intel.com>2017-10-23 13:09:26 -0700
committerH.J. Lu <hjl.tools@gmail.com>2017-10-23 13:10:05 -0700
commit2739ef6db8e9a152f7b0ef8d012b394eb41a5dc5 (patch)
treefe3305d9885fc38323120d38b5e460d9050df487 /opcodes
parent66cae56016a12f7cbdc94be6f82c1cad1c59b521 (diff)
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Add missing ChangeLog entries
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog110
1 files changed, 110 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 7f21995..e47ede5 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -3,6 +3,116 @@
* i386-init.h: Regenerate
* i386-tbl.h: Likewise
+2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
+ * i386-dis.c (enum): Add PREFIX_EVEX_0F3854, PREFIX_EVEX_0F388F.
+ (enum): Add EVEX_W_0F3854_P_2.
+ * i386-dis-evex.h (evex_table): Updated.
+ * i386-gen.c (cpu_flag_init): Add CPU_AVX512_BITALG,
+ CPU_ANY_AVX512_BITALG_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
+ (cpu_flags): Add CpuAVX512_BITALG.
+ * i386-opc.h (enum): Add CpuAVX512_BITALG.
+ (i386_cpu_flags): Add cpuavx512_bitalg..
+ * i386-opc.tbl: Add Intel AVX512_BITALG instructions.
+ * i386-init.h: Regenerate.
+ * i386-tbl.h: Likewise.
+
+2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
+ * i386-dis.c (enum): Add PREFIX_EVEX_0F3850, PREFIX_EVEX_0F3851.
+ * i386-dis-evex.h (evex_table): Updated.
+ * i386-gen.c (cpu_flag_init): Add CPU_AVX512_VNNI,
+ CPU_ANY_AVX512_VNNI_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
+ (cpu_flags): Add CpuAVX512_VNNI.
+ * i386-opc.h (enum): Add CpuAVX512_VNNI.
+ (i386_cpu_flags): Add cpuavx512_vnni.
+ * i386-opc.tbl Add Intel AVX512_VNNI instructions.
+ * i386-init.h: Regenerate.
+ * i386-tbl.h: Likewise.
+
+2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
+ * i386-dis.c (enum): Add PREFIX_EVEX_0F3A44.
+ (enum): Remove VEX_LEN_0F3A44_P_2.
+ (vex_len_table): Ditto.
+ (enum): Remove VEX_W_0F3A44_P_2.
+ (vew_w_table): Ditto.
+ (prefix_table): Adjust instructions (see prefixes above).
+ * i386-dis-evex.h (evex_table):
+ Add new instructions (see prefixes above).
+ * i386-gen.c (cpu_flag_init): Add VPCLMULQDQ.
+ (bitfield_cpu_flags): Ditto.
+ * i386-opc.h (enum): Ditto.
+ (i386_cpu_flags): Ditto.
+ (CpuUnused): Comment out to avoid zero-width field problem.
+ * i386-opc.tbl (vpclmulqdq): New instruction.
+ * i386-init.h: Regenerate.
+ * i386-tbl.h: Ditto.
+
+2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
+ * i386-dis.c (enum): Add PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD,
+ PREFIX_EVEX_0F38DE, PREFIX_EVEX_0F38DF.
+ (enum): Remove VEX_LEN_0F38DC_P_2, VEX_LEN_0F38DD_P_2,
+ VEX_LEN_0F38DE_P_2, VEX_LEN_0F38DF_P_2.
+ (vex_len_table): Ditto.
+ (enum): Remove VEX_W_0F38DC_P_2, VEX_W_0F38DD_P_2,
+ VEX_W_0F38DE_P_2, VEX_W_0F38DF_P_2.
+ (vew_w_table): Ditto.
+ (prefix_table): Adjust instructions (see prefixes above).
+ * i386-dis-evex.h (evex_table):
+ Add new instructions (see prefixes above).
+ * i386-gen.c (cpu_flag_init): Add VAES.
+ (bitfield_cpu_flags): Ditto.
+ * i386-opc.h (enum): Ditto.
+ (i386_cpu_flags): Ditto.
+ * i386-opc.tbl (vaes{enc,dec}{last,}): New instructions.
+ * i386-init.h: Regenerate.
+ * i386-tbl.h: Ditto.
+
+2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
+ * i386-dis.c (enum): Add PREFIX_0F38CF, PREFIX_0F3ACE, PREFIX_0F3ACF,
+ PREFIX_VEX_0F38CF, PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF,
+ PREFIX_EVEX_0F38CF, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF.
+ (enum): Add VEX_W_0F38CF_P_2, VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2,
+ EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2.
+ (prefix_table): Updated (see prefixes above).
+ (three_byte_table): Likewise.
+ (vex_w_table): Likewise.
+ * i386-dis-evex.h: Likewise.
+ * i386-gen.c (cpu_flag_init): Add CPU_GFNI_FLAGS, CpuGFNI.
+ (cpu_flags): Add CpuGFNI.
+ * i386-opc.h (enum): Add CpuGFNI.
+ (i386_cpu_flags): Add cpugfni.
+ * i386-opc.tbl: Add Intel GFNI instructions.
+ * i386-init.h: Regenerate.
+ * i386-tbl.h: Likewise.
+
+2017-10-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
+
+ * i386-dis.c (enum): Add b_scalar_mode, w_scalar_mode.
+ Define EXbScalar and EXwScalar for OP_EX.
+ (enum): Add PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863,
+ PREFIX_EVEX_0F3870, PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3872,
+ PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
+ PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73.
+ (enum): Add EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2,
+ EVEX_W_0F3870_P_2, EVEX_W_0F3871_P_2, EVEX_W_0F3872_P_2,
+ EVEX_W_0F3873_P_2, EVEX_W_0F3A70_P_2, EVEX_W_0F3A71_P_2,
+ EVEX_W_0F3A72_P_2, EVEX_W_0F3A73_P_2.
+ (intel_operand_size): Handle b_scalar_mode and w_scalar_mode.
+ (OP_E_memory): Likewise.
+ * i386-dis-evex.h: Updated.
+ * i386-gen.c (cpu_flag_init): Add CPU_AVX512_VBMI2,
+ CPU_ANY_AVX512_VBMI2_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
+ (cpu_flags): Add CpuAVX512_VBMI2.
+ * i386-opc.h (enum): Add CpuAVX512_VBMI2.
+ (i386_cpu_flags): Add cpuavx512_vbmi2.
+ * i386-opc.tbl: Add Intel AVX512_VBMI2 instructions.
+ * i386-init.h: Regenerate.
+ * i386-tbl.h: Likewise.
+
2017-10-18 Eric Botcazou <ebotcazou@adacore.com>
* visium-dis.c (disassem_class1) <case 0>: Print the operands.