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author | Nick Clifton <nickc@redhat.com> | 2009-08-29 22:11:02 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2009-08-29 22:11:02 +0000 |
commit | d3ce72d070fa3a519388b0eca00d6cb45d337071 (patch) | |
tree | 104599ed64e14c9642bc50cde90b3ed942cf7653 /opcodes | |
parent | 0aec8eb1b5dae3bf88546abd22dbdffc7888b747 (diff) | |
download | gdb-d3ce72d070fa3a519388b0eca00d6cb45d337071.zip gdb-d3ce72d070fa3a519388b0eca00d6cb45d337071.tar.gz gdb-d3ce72d070fa3a519388b0eca00d6cb45d337071.tar.bz2 |
Updated sources to avoid using the identifier name "new", which is a
keyword in c++.
* bfd/aoutx.h (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol.
* bfd/coffgen.c (coff_make_empty_symbol)
(coff_bfd_make_debug_symbol): Rename variable new to new_symbol.
* bfd/cpu-ia64-opc.c (ext_reg, ins_imms_scaled): Rename variable
new to new_insn.
* bfd/doc/chew.c (newentry, add_intrinsic): Rename variable new to
new_d.
* bfd/ecoff.c (_bfd_ecoff_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/elf32-m68k.c (elf_m68k_get_got_entry_type): Rename argument
new to new_reloc.
* bfd/hash.c (bfd_hash_lookup): Rename variable new to new_string.
* bfd/ieee.c (ieee_make_empty_symbol): Rename variable new to
new_symbol.
* bfd/linker.c (bfd_new_link_order): Rename variable new to
new_lo.
* bfd/mach-o.c (bfd_mach_o_sizeof_headers): Rename variable new to
symbol.
* bfd/oasys.c (oasys_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/pdp11.c (NAME (aout, make_empty_symbol)): Rename variable
new to new_symbol_type.
* bfd/plugin.c (bfd_plugin_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/rs6000-core.c (CoreHdr, VmInfo): Rename union member new to
new_dump.
(read_hdr, rs6000coff_core_p)
(rs6000coff_core_file_matches_executable_p)
(rs6000coff_core_file_failing_command)
(rs6000coff_core_file_failing_signal): Updated function to use new
union member name.
* bfd/som.c (som_make_empty_symbol): Rename variable new to
new_symbol_type.
* bfd/syms.c (_bfd_generic_make_empty_symbol): Rename variable new
to new_symbol.
* bfd/tekhex.c (first_phase, tekhex_make_empty_symbol): Rename
variable new to new_symbol.
* binutils/nlmconv.c (main): Rename variable new to new_name.
* gas/config/tc-arm.c (insert_reg_alias): Rename variable new to
new_reg.
* gas/config/tc-dlx.c (parse_operand): Rename variable new to
new_pos.
* gas/config/tc-ia64.c (ia64_gen_real_reloc_type): Rename variable
new to newr.
* gas/config/tc-mcore.c (parse_exp, parse_imm): Rename variable
new to new_pointer.
* gas/config/tc-microblaze.c (parse_exp, parse_imm, check_got):
Change name from new to new_pointer.
* gas/config/tc-or32.c (parse_operand): Rename variable new to
new_pointer.
* gas/config/tc-pdp11.c (md_assemble): Rename variable new to
new_pointer.
* gas/config/tc-pj.c (alias): Change argument new to new_name.
* gas/config/tc-score.c (s3_build_score_ops_hsh): Rename variable
new to new_opcode. (s3_build_dependency_insn_hsh) Rename variable
new to new_i2n. (s3_convert): Rename variables old and new to
r_old and r_new.
* gas/config/tc-score7.c (s7_build_score_ops_hsh): Rename variable
new to new_opcode. (s7_build_dependency_insn_hsh): Rename variable
new to new_i2d. (s7_b32_relax_to_b16, s7_convert_frag): Rename
variables old and new to r_old and r_new.
* gas/config/tc-sh.c (parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-sh64.c (shmedia_parse_exp): Rename variable new to
new_pointer.
* gas/config/tc-tic4x.c (tic4x_operand_parse): Rename variable new
to new_pointer.
* gas/config/tc-z8k.c (parse_exp): Rename variable new to
new_pointer.
* gas/listing.c (listing_newline): Rename variable new to new_i.
* ld/ldexp.c (exp_intop, exp_bigintop, exp_relop, exp_binop)
(exp_trinop, exp_unop, exp_nameop, exp_assop): Rename variable new
to new_e.
* ld/ldfile.c (ldfile_add_library_path): Rename variable new to
new_dirs. (ldfile_add_arch): Rename variable new to new_arch.
* ld/ldlang.c (new_statement, lang_final, lang_add_wild)
(lang_target, lang_add_fill, lang_add_data, lang_add_assignment)
(lang_add_insert): Rename variable new to new_stmt. (new_afile):
Added missing cast. (lang_memory_region_lookup): Rename variable
new to new_region. (init_os): Rename variable new to
new_userdata. (lang_add_section): Rename variable new to
new_section. (ldlang_add_undef): Rename variable new to
new_undef. (realsymbol): Rename variable new to new_name.
* opcodes/z8kgen.c (internal, gas): Rename variable new to new_op.
Updated sources to avoid using the identifier name "template",
which is a keyword in c++.
* bfd/elf32-arm.c (struct stub_def): Rename member template to
template_sequence. (arm_build_one_stub,
find_stub_size_and_template, arm_size_one_stub, arm_map_one_stub):
Rename variable template to template_sequence.
* bfd/elfxx-ia64.c (elfNN_ia64_relax_br, elfNN_ia64_relax_brl):
Rename variable template to template_val.
* gas/config/tc-arm.c (struct asm_cond, struct asm_psr, struct
asm_barrier_opt): Change member template to
template_name. (md_begin): Update code to reflect new member
names.
* gas/config/tc-i386.c (struct templates, struct _i386_insn)
(match_template, cpu_flags_match, match_reg_size, match_mem_size)
(operand_size_match, md_begin, i386_print_statistics, pi)
(build_vex_prefix, md_assemble, parse_insn, optimize_imm)
(optimize_disp): Updated code to use new names. (parse_insn):
Added casts.
* gas/config/tc-ia64.c (dot_template, emit_one_bundle): Updated
code to use new names.
* gas/config/tc-score.c (struct s3_asm_opcode): Renamed member
template to template_name. (s3_parse_16_32_inst, s3_parse_48_inst,
s3_do_macro_ldst_label, s3_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-score7.c (struct s7_asm_opcode): Renamed member
template to template_name. (s7_parse_16_32_inst,
s7_do_macro_ldst_label, s7_build_score_ops_hsh): Update code to
use new names.
* gas/config/tc-tic30.c (md_begin, struct tic30_insn)
(md_assemble): Update code to use new names.
* gas/config/tc-tic54x.c (struct _tic54x_insn, md_begin)
(optimize_insn, tic54x_parse_insn, next_line_shows_parallel):
Update code to use new names.
* include/opcode/tic30.h (template): Rename type template to
insn_template. Updated code to use new name.
* include/opcode/tic54x.h (template): Rename type template to
insn_template.
* opcodes/cris-dis.c (bytes_to_skip): Update code to use new name.
* opcodes/i386-dis.c (putop): Update code to use new name.
* opcodes/i386-gen.c (process_i386_opcodes): Update code to use
new name.
* opcodes/i386-opc.h (struct template): Rename struct template to
insn_template. Update code accordingly.
* opcodes/i386-tbl.h (i386_optab): Update type to use new name.
* opcodes/ia64-dis.c (print_insn_ia64): Rename variable template
to template_val.
* opcodes/tic30-dis.c (struct instruction, get_tic30_instruction):
Update code to use new name.
* opcodes/tic54x-dis.c (has_lkaddr, get_insn_size)
(print_parallel_instruction, print_insn_tic54x, tic54x_get_insn):
Update code to use new name.
* opcodes/tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab):
Update type to new name.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 20 | ||||
-rw-r--r-- | opcodes/cris-dis.c | 6 | ||||
-rw-r--r-- | opcodes/i386-dis.c | 4 | ||||
-rw-r--r-- | opcodes/i386-gen.c | 2 | ||||
-rw-r--r-- | opcodes/i386-opc.h | 6 | ||||
-rw-r--r-- | opcodes/i386-tbl.h | 2 | ||||
-rw-r--r-- | opcodes/ia64-dis.c | 12 | ||||
-rw-r--r-- | opcodes/tic30-dis.c | 6 | ||||
-rw-r--r-- | opcodes/tic54x-dis.c | 24 | ||||
-rw-r--r-- | opcodes/tic54x-opc.c | 6 | ||||
-rw-r--r-- | opcodes/z8kgen.c | 32 |
11 files changed, 70 insertions, 50 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 692ea0b..96c3036 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,23 @@ +2009-08-29 Martin Thuresson <martin@mtme.org> + + * cris-dis.c (bytes_to_skip): Update code to use new name. + * i386-dis.c (putop): Update code to use new name. + * i386-gen.c (process_i386_opcodes): Update code to use + new name. + * i386-opc.h (struct template): Rename struct template to + insn_template. Update code accordingly. + * i386-tbl.h (i386_optab): Update type to use new name. + * ia64-dis.c (print_insn_ia64): Rename variable template + to template_val. + * tic30-dis.c (struct instruction, get_tic30_instruction): + Update code to use new name. + * tic54x-dis.c (has_lkaddr, get_insn_size) + (print_parallel_instruction, print_insn_tic54x, tic54x_get_insn): + Update code to use new name. + * tic54x-opc.c (tic54x_unknown_opcode, tic54x_optab): + Update type to new name. + * z8kgen.c (internal, gas): Rename variable new to new_op. + 2009-08-28 H.J. Lu <hongjiu.lu@intel.com> * Makefile.am (COMPILE_FOR_BUILD): Remove BUILD_CPPFLAGS. diff --git a/opcodes/cris-dis.c b/opcodes/cris-dis.c index 01e69ca..876ac17 100644 --- a/opcodes/cris-dis.c +++ b/opcodes/cris-dis.c @@ -660,17 +660,17 @@ bytes_to_skip (unsigned int insn, { /* Each insn is a word plus "immediate" operands. */ unsigned to_skip = 2; - const char *template = matchedp->args; + const char *template_name = (const char *) matchedp->args; const char *s; - for (s = template; *s; s++) + for (s = template_name; *s; s++) if ((*s == 's' || *s == 'N' || *s == 'Y') && (insn & 0x400) && (insn & 15) == 15 && prefix_matchedp == NULL) { /* Immediate via [pc+], so we have to check the size of the operand. */ - int mode_size = 1 << ((insn >> 4) & (*template == 'z' ? 1 : 3)); + int mode_size = 1 << ((insn >> 4) & (*template_name == 'z' ? 1 : 3)); if (matchedp->imm_oprnd_size == SIZE_FIX_32) to_skip += 4; diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index 18c0c3b..8c36e23 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -10184,7 +10184,7 @@ OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) /* Capital letters in template are macros. */ static int -putop (const char *template, int sizeflag) +putop (const char *in_template, int sizeflag) { const char *p; int alt = 0; @@ -10198,7 +10198,7 @@ putop (const char *template, int sizeflag) else \ abort (); - for (p = template; *p; p++) + for (p = in_template; *p; p++) { switch (*p) { diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 9c94e78f..fb1c78e 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -876,7 +876,7 @@ process_i386_opcodes (FILE *table) xcalloc, free); fprintf (table, "\n/* i386 opcode table. */\n\n"); - fprintf (table, "const template i386_optab[] =\n{\n"); + fprintf (table, "const insn_template i386_optab[] =\n{\n"); /* Put everything on opcode array. */ while (!feof (fp)) diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index d7828f3..2dd8eed 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -524,7 +524,7 @@ typedef union i386_operand_type unsigned int array[OTNumOfUints]; } i386_operand_type; -typedef struct template +typedef struct insn_template { /* instruction name sans width suffix ("mov" for movl insns) */ char *name; @@ -566,9 +566,9 @@ typedef struct template either a register or an immediate operand. */ i386_operand_type operand_types[MAX_OPERANDS]; } -template; +insn_template; -extern const template i386_optab[]; +extern const insn_template i386_optab[]; /* these are for register name --> number & type hash lookup */ typedef struct diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h index 0a0c099..aa24c53 100644 --- a/opcodes/i386-tbl.h +++ b/opcodes/i386-tbl.h @@ -21,7 +21,7 @@ /* i386 opcode table. */ -const template i386_optab[] = +const insn_template i386_optab[] = { { "mov", 2, 0xa0, None, 1, { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, diff --git a/opcodes/ia64-dis.c b/opcodes/ia64-dis.c index bd71456..c7b7210 100644 --- a/opcodes/ia64-dis.c +++ b/opcodes/ia64-dis.c @@ -68,7 +68,7 @@ unit_to_type (ia64_insn opcode, enum ia64_unit unit) int print_insn_ia64 (bfd_vma memaddr, struct disassemble_info *info) { - ia64_insn t0, t1, slot[3], template, s_bit, insn; + ia64_insn t0, t1, slot[3], template_val, s_bit, insn; int slotnum, j, status, need_comma, retval, slot_multiplier; const struct ia64_operand *odesc; const struct ia64_opcode *idesc; @@ -100,20 +100,20 @@ print_insn_ia64 (bfd_vma memaddr, struct disassemble_info *info) t0 = bfd_getl64 (bundle); t1 = bfd_getl64 (bundle + 8); s_bit = t0 & 1; - template = (t0 >> 1) & 0xf; + template_val = (t0 >> 1) & 0xf; slot[0] = (t0 >> 5) & 0x1ffffffffffLL; slot[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18); slot[2] = (t1 >> 23) & 0x1ffffffffffLL; - tname = ia64_templ_desc[template].name; + tname = ia64_templ_desc[template_val].name; if (slotnum == 0) (*info->fprintf_func) (info->stream, "[%s] ", tname); else (*info->fprintf_func) (info->stream, " "); - unit = ia64_templ_desc[template].exec_unit[slotnum]; + unit = ia64_templ_desc[template_val].exec_unit[slotnum]; - if (template == 2 && slotnum == 1) + if (template_val == 2 && slotnum == 1) { /* skip L slot in MLI template: */ slotnum = 2; @@ -303,7 +303,7 @@ print_insn_ia64 (bfd_vma memaddr, struct disassemble_info *info) need_comma = 0; } } - if (slotnum + 1 == ia64_templ_desc[template].group_boundary + if (slotnum + 1 == ia64_templ_desc[template_val].group_boundary || ((slotnum == 2) && s_bit)) (*info->fprintf_func) (info->stream, ";;"); diff --git a/opcodes/tic30-dis.c b/opcodes/tic30-dis.c index 2e3271b..c5fafd8 100644 --- a/opcodes/tic30-dis.c +++ b/opcodes/tic30-dis.c @@ -64,7 +64,7 @@ static unsigned int _pc; struct instruction { int type; - template *tm; + insn_template *tm; partemplate *ptm; }; @@ -78,7 +78,7 @@ get_tic30_instruction (unsigned long insn_word, struct instruction *insn) case THREE_OPERAND: insn->type = NORMAL_INSN; { - template *current_optab = (template *) tic30_optab; + insn_template *current_optab = (insn_template *) tic30_optab; for (; current_optab < tic30_optab_end; current_optab++) { @@ -145,7 +145,7 @@ get_tic30_instruction (unsigned long insn_word, struct instruction *insn) case BRANCHES: insn->type = NORMAL_INSN; { - template *current_optab = (template *) tic30_optab; + insn_template *current_optab = (insn_template *) tic30_optab; for (; current_optab < tic30_optab_end; current_optab++) { diff --git a/opcodes/tic54x-dis.c b/opcodes/tic54x-dis.c index 0b6e7b4..9e337b1 100644 --- a/opcodes/tic54x-dis.c +++ b/opcodes/tic54x-dis.c @@ -27,14 +27,14 @@ #include "opcode/tic54x.h" #include "coff/tic54x.h" -static int has_lkaddr (unsigned short, const template *); -static int get_insn_size (unsigned short, const template *); +static int has_lkaddr (unsigned short, const insn_template *); +static int get_insn_size (unsigned short, const insn_template *); static int print_instruction (disassemble_info *, bfd_vma, unsigned short, const char *, const enum optype [], int, int); static int print_parallel_instruction (disassemble_info *, bfd_vma, - unsigned short, - const template *, int); + unsigned short, + const insn_template *, int); static int sprint_dual_address (disassemble_info *,char [], unsigned short); static int sprint_indirect_address (disassemble_info *,char [], @@ -51,7 +51,7 @@ print_insn_tic54x (bfd_vma memaddr, disassemble_info *info) bfd_byte opbuf[2]; unsigned short opcode; int status, size; - const template* tm; + const insn_template* tm; status = (*info->read_memory_func) (memaddr, opbuf, 2, info); if (status != 0) @@ -86,7 +86,7 @@ print_insn_tic54x (bfd_vma memaddr, disassemble_info *info) } static int -has_lkaddr (unsigned short memdata, const template *tm) +has_lkaddr (unsigned short memdata, const insn_template *tm) { return (IS_LKADDR (memdata) && (OPTYPE (tm->operand_types[0]) == OP_Smem @@ -99,11 +99,11 @@ has_lkaddr (unsigned short memdata, const template *tm) /* always returns 1 (whether an insn template was found) since we provide an "unknown instruction" template */ -const template* -tic54x_get_insn (disassemble_info *info, bfd_vma addr, +const insn_template* +tic54x_get_insn (disassemble_info *info, bfd_vma addr, unsigned short memdata, int *size) { - const template *tm = NULL; + const insn_template *tm = NULL; for (tm = tic54x_optab; tm->name; tm++) { @@ -135,7 +135,7 @@ tic54x_get_insn (disassemble_info *info, bfd_vma addr, } } } - for (tm = (template *) tic54x_paroptab; tm->name; tm++) + for (tm = (insn_template *) tic54x_paroptab; tm->name; tm++) { if (tm->opcode == (memdata & tm->mask)) { @@ -149,7 +149,7 @@ tic54x_get_insn (disassemble_info *info, bfd_vma addr, } static int -get_insn_size (unsigned short memdata, const template *insn) +get_insn_size (unsigned short memdata, const insn_template *insn) { int size; @@ -472,7 +472,7 @@ print_parallel_instruction (info, memaddr, opcode, ptm, size) disassemble_info *info; bfd_vma memaddr; unsigned short opcode; - const template *ptm; + const insn_template *ptm; int size; { print_instruction (info, memaddr, opcode, diff --git a/opcodes/tic54x-opc.c b/opcodes/tic54x-opc.c index 6372fec..91cea99 100644 --- a/opcodes/tic54x-opc.c +++ b/opcodes/tic54x-opc.c @@ -231,9 +231,9 @@ const char *misc_symbols[] = { #define ZPAR 0,{OP_None} #define REST 0,0,ZPAR #define XREST ZPAR -const template tic54x_unknown_opcode = +const insn_template tic54x_unknown_opcode = { "???", 1,0,0,0x0000, 0x0000, {0}, 0, REST}; -const template tic54x_optab[] = { +const insn_template tic54x_optab[] = { /* these must precede bc/bcd, cc/ccd to avoid misinterpretation */ { "fb", 2,1,1,0xF880, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_NR, REST}, { "fbd", 2,1,1,0xFA80, 0xFF80, {OP_xpmad}, B_BRANCH|FL_FAR|FL_DELAY|FL_NR, REST}, @@ -465,7 +465,7 @@ const template tic54x_optab[] = { }; /* assume all parallel instructions have at least three operands */ -const template tic54x_paroptab[] = { +const insn_template tic54x_paroptab[] = { { "ld",1,1,2,0xA800, 0xFE00, {OP_Xmem,OP_DST}, FL_PAR,0,0, "mac", {OP_Ymem,OPT|OP_RND},}, { "ld",1,1,2,0xAA00, 0xFE00, {OP_Xmem,OP_DST}, FL_PAR,0,0, diff --git a/opcodes/z8kgen.c b/opcodes/z8kgen.c index 9fb7de2..2012bc4 100644 --- a/opcodes/z8kgen.c +++ b/opcodes/z8kgen.c @@ -904,14 +904,14 @@ static void internal (void) { int c = count (); - struct op *new = xmalloc (sizeof (struct op) * c); + struct op *new_op = xmalloc (sizeof (struct op) * c); struct op *p = opt; - memcpy (new, p, c * sizeof (struct op)); + memcpy (new_op, p, c * sizeof (struct op)); /* Sort all names in table alphabetically. */ - qsort (new, c, sizeof (struct op), (int (*)(const void *, const void *))func); + qsort (new_op, c, sizeof (struct op), (int (*)(const void *, const void *))func); - p = new; + p = new_op; while (p->flags && p->flags[0] != '*') { /* If there are any @rs, sub the ssss into a ssn0, (rs), (ssn0). */ @@ -960,12 +960,12 @@ gas (void) struct op *p = opt; int idx = -1; char *oldname = ""; - struct op *new = xmalloc (sizeof (struct op) * c); + struct op *new_op = xmalloc (sizeof (struct op) * c); - memcpy (new, p, c * sizeof (struct op)); + memcpy (new_op, p, c * sizeof (struct op)); /* Sort all names in table alphabetically. */ - qsort (new, c, sizeof (struct op), (int (*)(const void *, const void *)) func); + qsort (new_op, c, sizeof (struct op), (int (*)(const void *, const void *)) func); printf ("/* DO NOT EDIT! -*- buffer-read-only: t -*-\n"); printf (" This file is automatically generated by z8kgen. */\n\n"); @@ -1279,19 +1279,19 @@ gas (void) printf ("#ifdef DEFINE_TABLE\n"); printf ("const opcode_entry_type z8k_table[] = {\n"); - while (new->flags && new->flags[0]) + while (new_op->flags && new_op->flags[0]) { int nargs; int length; - printf ("\n/* %s *** %s */\n", new->bits, new->name); + printf ("\n/* %s *** %s */\n", new_op->bits, new_op->name); printf ("{\n"); printf ("#ifdef NICENAMES\n"); - printf ("\"%s\",%d,%d,", new->name, new->type, new->cycles); + printf ("\"%s\",%d,%d,", new_op->name, new_op->type, new_op->cycles); { int answer = 0; - char *p = new->flags; + char *p = new_op->flags; while (*p) { @@ -1306,20 +1306,20 @@ gas (void) printf ("#endif\n"); - nargs = chewname (&new->name); + nargs = chewname (&new_op->name); printf ("\n\t"); - chewbits (new->bits, &length); + chewbits (new_op->bits, &length); length /= 2; if (length & 1) abort(); - if (strcmp (oldname, new->name) != 0) + if (strcmp (oldname, new_op->name) != 0) idx++; printf (",%d,%d,%d", nargs, length, idx); - oldname = new->name; + oldname = new_op->name; printf ("},\n"); - new++; + new_op++; } printf ("\n/* end marker */\n"); printf ("{\n#ifdef NICENAMES\nNULL,0,0,\n0,\n#endif\n"); |