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authorDJ Delorie <dj@redhat.com>2009-09-02 02:10:36 +0000
committerDJ Delorie <dj@redhat.com>2009-09-02 02:10:36 +0000
commit053160522650e3e1d8d4d49bc03f6f54a144fefc (patch)
treeefddeea1affb470c90ce9e6848b8c209ce0c7490 /opcodes/mep-opc.c
parentc9e78e0c8b7954b657bf0432a18b9e4e197dabb3 (diff)
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[cgen]
* cpu/mep.opc (parse_signed16_range): Mark as potentially unused. (parse_unsigned16_range): Likewise. (mep_cgen_insn_supported_asm): Make BSR12 check dependent on VLIW isa. [opcodes] * mep-asm.c: Regenerate. * mep-desc.c: Regenerate. * mep-opc.c: Regenerate.
Diffstat (limited to 'opcodes/mep-opc.c')
-rw-r--r--opcodes/mep-opc.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/opcodes/mep-opc.c b/opcodes/mep-opc.c
index 584e520..0191a60 100644
--- a/opcodes/mep-opc.c
+++ b/opcodes/mep-opc.c
@@ -167,11 +167,13 @@ mep_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
int
mep_cgen_insn_supported_asm (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
{
+#ifdef ISA_EXT_COP1_64
/* If we're assembling VLIW packets, ignore the 12-bit BSR as we
can't relax that. The 24-bit BSR is matched instead. */
if (insn->base->num == MEP_INSN_BSR12
&& cgen_bitset_contains (cd->isas, ISA_EXT_COP1_64))
return 0;
+#endif
return mep_cgen_insn_supported (cd, insn);
}