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author | Alan Modra <amodra@gmail.com> | 2019-12-18 15:37:44 +1030 |
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committer | Alan Modra <amodra@gmail.com> | 2019-12-18 18:38:13 +1030 |
commit | 2480b6fa946bb2d2dc993b1c4a83a8e1258a75e8 (patch) | |
tree | ce542aad0a4875a62960e77e23c4729b92d87da4 /opcodes/mcore-dis.c | |
parent | 4a422785822ec9302f681c8fbc6ba2cc35231b09 (diff) | |
download | gdb-2480b6fa946bb2d2dc993b1c4a83a8e1258a75e8.zip gdb-2480b6fa946bb2d2dc993b1c4a83a8e1258a75e8.tar.gz gdb-2480b6fa946bb2d2dc993b1c4a83a8e1258a75e8.tar.bz2 |
More signed overflow fixes
The arc fix in create_map avoiding signed overflow by casting an
unsigned char to unsigned int before shifting, shows one of the
dangers of blinding doing that. The problem in this case was that the
variable storing the value, newAuxRegister->address, was a long.
Using the unsigned cast meant that the 32-bit value was zero extended
when long is 64 bits. Previously we had a sign extension. Net result
was that comparisons in arcExtMap_auxRegName didn't match. Of course,
I could have cast the 32-bit unsigned value back to signed before
storing in a long, but it's neater to just use an unsigned int for the
address.
opcodes/
* alpha-opc.c (OP): Avoid signed overflow.
* arm-dis.c (print_insn): Likewise.
* mcore-dis.c (print_insn_mcore): Likewise.
* pj-dis.c (get_int): Likewise.
* ppc-opc.c (EBD15, EBD15BI): Likewise.
* score7-dis.c (s7_print_insn): Likewise.
* tic30-dis.c (print_insn_tic30): Likewise.
* v850-opc.c (insert_SELID): Likewise.
* vax-dis.c (print_insn_vax): Likewise.
* arc-ext.c (create_map): Likewise.
(struct ExtAuxRegister): Make "address" field unsigned int.
(arcExtMap_auxRegName): Pass unsigned address.
(dump_ARC_extmap): Adjust.
* arc-ext.h (arcExtMap_auxRegName): Update prototype.
Diffstat (limited to 'opcodes/mcore-dis.c')
-rw-r--r-- | opcodes/mcore-dis.c | 57 |
1 files changed, 26 insertions, 31 deletions
diff --git a/opcodes/mcore-dis.c b/opcodes/mcore-dis.c index 5c0eb08..5b3acb8 100644 --- a/opcodes/mcore-dis.c +++ b/opcodes/mcore-dis.c @@ -196,18 +196,14 @@ print_insn_mcore (bfd_vma memaddr, case BR: { - long val = inst & 0x3FF; + uint32_t val = ((inst & 0x3FF) ^ 0x400) - 0x400; - if (inst & 0x400) - val |= 0xFFFFFC00; - - (*print_func) (stream, "\t0x%lx", (long)(memaddr + 2 + (val << 1))); + val = memaddr + 2 + (val << 1); + (*print_func) (stream, "\t0x%x", val); if (strcmp (mcore_table[i].name, "bsr") == 0) { /* For bsr, we'll try to get a symbol for the target. */ - val = memaddr + 2 + (val << 1); - if (info->print_address_func && val != 0) { (*print_func) (stream, "\t// "); @@ -219,19 +215,18 @@ print_insn_mcore (bfd_vma memaddr, case BL: { - long val; - val = (inst & 0x000F); - (*print_func) (stream, "\t%s, 0x%lx", + uint32_t val = inst & 0x000F; + (*print_func) (stream, "\t%s, 0x%x", grname[(inst >> 4) & 0xF], - (long) (memaddr - (val << 1))); + (uint32_t) (memaddr - (val << 1))); } break; case LR: { - unsigned long val; + uint32_t val; - val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC; + val = (memaddr + 2 + ((inst & 0xFF) << 2)) & ~3; /* We are not reading an instruction, so allow reads to extend beyond the next symbol. */ @@ -244,27 +239,27 @@ print_insn_mcore (bfd_vma memaddr, } if (info->endian == BFD_ENDIAN_LITTLE) - val = (ibytes[3] << 24) | (ibytes[2] << 16) - | (ibytes[1] << 8) | (ibytes[0]); + val = (((unsigned) ibytes[3] << 24) | (ibytes[2] << 16) + | (ibytes[1] << 8) | (ibytes[0])); else - val = (ibytes[0] << 24) | (ibytes[1] << 16) - | (ibytes[2] << 8) | (ibytes[3]); + val = (((unsigned) ibytes[0] << 24) | (ibytes[1] << 16) + | (ibytes[2] << 8) | (ibytes[3])); /* Removed [] around literal value to match ABI syntax 12/95. */ - (*print_func) (stream, "\t%s, 0x%lX", grname[(inst >> 8) & 0xF], val); + (*print_func) (stream, "\t%s, 0x%X", grname[(inst >> 8) & 0xF], val); if (val == 0) - (*print_func) (stream, "\t// from address pool at 0x%lx", - (long) (memaddr + 2 - + ((inst & 0xFF) << 2)) & 0xFFFFFFFC); + (*print_func) (stream, "\t// from address pool at 0x%x", + (uint32_t) (memaddr + 2 + + ((inst & 0xFF) << 2)) & ~3); } break; case LJ: { - unsigned long val; + uint32_t val; - val = (memaddr + 2 + ((inst & 0xFF) << 2)) & 0xFFFFFFFC; + val = (memaddr + 2 + ((inst & 0xFF) << 2)) & ~3; /* We are not reading an instruction, so allow reads to extend beyond the next symbol. */ @@ -277,14 +272,14 @@ print_insn_mcore (bfd_vma memaddr, } if (info->endian == BFD_ENDIAN_LITTLE) - val = (ibytes[3] << 24) | (ibytes[2] << 16) - | (ibytes[1] << 8) | (ibytes[0]); + val = (((unsigned) ibytes[3] << 24) | (ibytes[2] << 16) + | (ibytes[1] << 8) | (ibytes[0])); else - val = (ibytes[0] << 24) | (ibytes[1] << 16) - | (ibytes[2] << 8) | (ibytes[3]); + val = (((unsigned) ibytes[0] << 24) | (ibytes[1] << 16) + | (ibytes[2] << 8) | (ibytes[3])); /* Removed [] around literal value to match ABI syntax 12/95. */ - (*print_func) (stream, "\t0x%lX", val); + (*print_func) (stream, "\t0x%X", val); /* For jmpi/jsri, we'll try to get a symbol for the target. */ if (info->print_address_func && val != 0) { @@ -293,9 +288,9 @@ print_insn_mcore (bfd_vma memaddr, } else { - (*print_func) (stream, "\t// from address pool at 0x%lx", - (long) (memaddr + 2 - + ((inst & 0xFF) << 2)) & 0xFFFFFFFC); + (*print_func) (stream, "\t// from address pool at 0x%x", + (uint32_t) (memaddr + 2 + + ((inst & 0xFF) << 2)) & ~3); } } break; |