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authorDoug Evans <dje@google.com>2010-02-12 03:25:49 +0000
committerDoug Evans <dje@google.com>2010-02-12 03:25:49 +0000
commit37ec92403b4d32b349d239339a1b829cef29f2a2 (patch)
tree7a53f01cc0efe810b7576e46353f8f342d091b21 /opcodes/m32r-desc.c
parent114dfbe13efea1a1405dbcf5d9254e59d309382f (diff)
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* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
* frv-desc.c, * frv-desc.h, * frv-opc.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c, * mep-desc.c, * mep-desc.h, * mep-opc.c, * mt-desc.c, * mt-desc.h, * mt-opc.c, * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c, * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c, * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
Diffstat (limited to 'opcodes/m32r-desc.c')
-rw-r--r--opcodes/m32r-desc.c26
1 files changed, 1 insertions, 25 deletions
diff --git a/opcodes/m32r-desc.c b/opcodes/m32r-desc.c
index cb19d62..0aa757f 100644
--- a/opcodes/m32r-desc.c
+++ b/opcodes/m32r-desc.c
@@ -227,11 +227,7 @@ CGEN_KEYWORD m32r_cgen_opval_h_accums =
/* The hardware table. */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
#define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
const CGEN_HW_ENTRY m32r_cgen_hw_table[] =
{
@@ -261,11 +257,7 @@ const CGEN_HW_ENTRY m32r_cgen_hw_table[] =
/* The instruction field table. */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
#define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
const CGEN_IFLD m32r_cgen_ifld_table[] =
{
@@ -314,16 +306,8 @@ const CGEN_IFLD m32r_cgen_ifld_table[] =
/* The operand table. */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
#define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
#define OPERAND(op) M32R_OPERAND_##op
-#else
-#define OPERAND(op) M32R_OPERAND_/**/op
-#endif
const CGEN_OPERAND m32r_cgen_operand_table[] =
{
@@ -451,11 +435,7 @@ const CGEN_OPERAND m32r_cgen_operand_table[] =
/* The instruction table. */
#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
#define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
static const CGEN_IBASE m32r_cgen_insn_table[MAX_INSNS] =
{
@@ -1410,11 +1390,7 @@ m32r_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
CGEN_CPU_OPEN_END: terminates arguments
??? Simultaneous multiple isas might not make sense, but it's not (yet)
- precluded.
-
- ??? We only support ISO C stdargs here, not K&R.
- Laziness, plus experiment to see if anything requires K&R - eventually
- K&R will no longer be supported - e.g. GDB is currently trying this. */
+ precluded. */
CGEN_CPU_DESC
m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)