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| author | Alan Modra <amodra@gmail.com> | 2019-12-11 16:45:14 +1030 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2019-12-11 21:14:19 +1030 |
| commit | 1d61b032265e69317f42e8019e072506f11890c5 (patch) | |
| tree | 226c023afd93046735bb928dc67d6490f8466e97 /opcodes/m32c-ibld.c | |
| parent | 13c9c48599ebc8ad2f3a1fb9f672740219cd3841 (diff) | |
| download | gdb-1d61b032265e69317f42e8019e072506f11890c5.zip gdb-1d61b032265e69317f42e8019e072506f11890c5.tar.gz gdb-1d61b032265e69317f42e8019e072506f11890c5.tar.bz2 | |
Remove more shifts for sign/zero extension
cpu/
* epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
* lm32.cpu (f-branch, f-vall): Likewise.
* m32.cpu (f-lab-8-16): Likewise.
opcodes/
* arc-dis.c (BITS): Don't truncate high bits with shifts.
* nios2-dis.c (nios2_print_insn_arg): Don't sign extend with shifts.
* tic54x-dis.c (print_instruction): Likewise.
* tilegx-opc.c (parse_insn_tilegx): Likewise.
* tilepro-opc.c (parse_insn_tilepro): Likewise.
* visium-dis.c (disassem_class0): Likewise.
* pdp11-dis.c (sign_extend): Likewise.
(SIGN_BITS): Delete.
* epiphany-ibld.c: Regenerate.
* lm32-ibld.c: Regenerate.
* m32c-ibld.c: Regenerate.
Diffstat (limited to 'opcodes/m32c-ibld.c')
| -rw-r--r-- | opcodes/m32c-ibld.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/m32c-ibld.c b/opcodes/m32c-ibld.c index 29c9411..8473e17 100644 --- a/opcodes/m32c-ibld.c +++ b/opcodes/m32c-ibld.c @@ -1489,7 +1489,7 @@ m32c_cgen_insert_operand (CGEN_CPU_DESC cd, case M32C_OPERAND_LAB_8_16 : { long value = fields->f_lab_8_16; - value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65535))) >> (8)))); + value = ((((((((value) - (((pc) + (1))))) & (255))) << (8))) | (((USI) (((((value) - (((pc) + (1))))) & (65280))) >> (8)))); errmsg = insert_normal (cd, value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, buffer); } break; @@ -2654,7 +2654,7 @@ m32c_cgen_extract_operand (CGEN_CPU_DESC cd, { long value; length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGN_OPT)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 8, 16, 32, total_length, pc, & value); - value = ((((((USI) (((value) & (65535))) >> (8))) | (((SI) (((((value) & (255))) << (24))) >> (16))))) + (((pc) + (1)))); + value = ((((((((((USI) (((value) & (65280))) >> (8))) | (((((value) & (255))) << (8))))) ^ (32768))) - (32768))) + (((pc) + (1)))); fields->f_lab_8_16 = value; } break; |