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author | Nelson Chu <nelson.chu@sifive.com> | 2021-10-27 18:54:41 +0800 |
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committer | Nelson Chu <nelson.chu@sifive.com> | 2021-10-27 21:22:26 +0800 |
commit | 437e2ff1ad8a1d5f20ebd27af2f04e1a1bcb48a7 (patch) | |
tree | 1927f533f9650a3bd1662aa4d2c4c5d781339f40 /opcodes/epiphany-dis.c | |
parent | 2b677209fe127b44c1920779a6fca2598c66c1d3 (diff) | |
download | gdb-437e2ff1ad8a1d5f20ebd27af2f04e1a1bcb48a7.zip gdb-437e2ff1ad8a1d5f20ebd27af2f04e1a1bcb48a7.tar.gz gdb-437e2ff1ad8a1d5f20ebd27af2f04e1a1bcb48a7.tar.bz2 |
RISC-V: Tidy riscv assembler and disassembler.
Tidy the gas/config/tc-riscv.c and opcodes/riscv-dis.c, to prepare for
moving the released extensions (including released vendor extensions)
from integration branch back to mainline.
* Added parts of missing comments.
* Updated md_show_usage.
* For validate_riscv_insn, riscv_ip and print_insn_args, unify the
following pointer names,
- oparg: pointed to the parsed operand defined in the riscv_opcodes.
- asarg: pointed to the parsed operand from assembly.
- opargStart: recorded the parsed operand name from riscv_opcodes.
- asargStart: recorded the parsed operand name from assembly.
gas/
* config/tc-riscv.c: Added parts of missind comments and updated
the md_show_usage.
(riscv_multi_subset_supports): Tidy codes.
(validate_riscv_insn): Unify the pointer names, oparg, asarg,
opargStart and asargStart, to prepare for moving the released
extensions from integration branch back to mainline.
(riscv_ip): Likewise.
(macro_build): Added fmtStart, also used to prepare for moving
released extensions.
(md_show_usage): Added missing descriptions for new options.
opcodes/
* riscv-dis.c (print_insn_args): Unify the pointer names,
oparg and opargStart, to prepare for moving the released
extensions from integration branch back to mainline.
Diffstat (limited to 'opcodes/epiphany-dis.c')
0 files changed, 0 insertions, 0 deletions