diff options
| author | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:09 +0100 |
|---|---|---|
| committer | Richard Sandiford <richard.sandiford@arm.com> | 2023-03-30 11:09:09 +0100 |
| commit | 1d1060427db0fe4332d5ae34487789d57e873b5c (patch) | |
| tree | a95e9f2fa3a7d34fa20cf206fe563439377e334a /opcodes/aarch64-asm.c | |
| parent | 2f4e3a2c823f7a51630253cd8a8681203b86664b (diff) | |
| download | gdb-1d1060427db0fe4332d5ae34487789d57e873b5c.zip gdb-1d1060427db0fe4332d5ae34487789d57e873b5c.tar.gz gdb-1d1060427db0fe4332d5ae34487789d57e873b5c.tar.bz2 | |
aarch64: Regularise FLD_* suffixes
Some FLD_imm* suffixes used a counting scheme such as FLD_immN,
FLD_immN_2, FLD_immN_3, etc., while others used the lsb as the
suffix. The latter seems more mnemonic, and was a big help
in doing the SME2 work.
Similarly, the _10 suffix on FLD_SME_size_10 was nonobvious.
Presumably it indicated a 2-bit field, but it actually starts
in bit 22.
Diffstat (limited to 'opcodes/aarch64-asm.c')
| -rw-r--r-- | opcodes/aarch64-asm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index 73ee15a..7351c24 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -120,7 +120,7 @@ aarch64_ins_reglane (const aarch64_operand *self, const aarch64_opnd_info *info, /* index2 for e.g. INS <Vd>.<Ts>[<index1>], <Vn>.<Ts>[<index2>]. */ assert (info->idx == 1); /* Vn */ aarch64_insn value = info->reglane.index << pos; - insert_field (FLD_imm4, code, value, 0); + insert_field (FLD_imm4_11, code, value, 0); } else { @@ -962,7 +962,7 @@ aarch64_ins_reg_shifted (const aarch64_operand *self ATTRIBUTE_UNUSED, insert_field (FLD_shift, code, aarch64_get_operand_modifier_value (info->shifter.kind), 0); /* imm6 */ - insert_field (FLD_imm6, code, info->shifter.amount, 0); + insert_field (FLD_imm6_10, code, info->shifter.amount, 0); return true; } |