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authorWANG Xuerui <git@xen0n.name>2022-07-27 19:07:57 +0800
committerliuzhensong <liuzhensong@loongson.cn>2022-08-01 15:57:32 +0800
commit20f2e2686c79a5ac951f0cc283f385c16bda5d50 (patch)
treef3a9565eb2351df9305505f103df549576db42d8 /ld
parent3f6e97039ec6f476b6fe09768f4b89722ffef10f (diff)
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opcodes: LoongArch: add "ret" instruction to reduce typing
This syntactic sugar is present in both classical and emerging architectures, like Alpha, SPARC and RISC-V, and assembler macros doing the same thing can already be found in the wild e.g. [1], proving the feature's popularity. It's better to provide support directly in the assembler so downstream users wouldn't have to re-invent this over and over again. [1]: https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/unix/sysv/linux/loongarch/sysdep.h;h=c586df819cd90;hb=HEAD#l28
Diffstat (limited to 'ld')
-rw-r--r--ld/testsuite/ld-loongarch-elf/jmp_op.d1
-rw-r--r--ld/testsuite/ld-loongarch-elf/jmp_op.s1
2 files changed, 2 insertions, 0 deletions
diff --git a/ld/testsuite/ld-loongarch-elf/jmp_op.d b/ld/testsuite/ld-loongarch-elf/jmp_op.d
index b10390f..218c13f 100644
--- a/ld/testsuite/ld-loongarch-elf/jmp_op.d
+++ b/ld/testsuite/ld-loongarch-elf/jmp_op.d
@@ -28,3 +28,4 @@ Disassembly of section .text:
[ ]+48:[ ]+6bffb8a4[ ]+[ ]+bltu[ ]+\$a1, \$a0, -72\(0x3ffb8\)[ ]+# 0x0
[ ]+4c:[ ]+6fffb485[ ]+[ ]+bgeu[ ]+\$a0, \$a1, -76\(0x3ffb4\)[ ]+# 0x0
[ ]+50:[ ]+6fffb0a4[ ]+[ ]+bgeu[ ]+\$a1, \$a0, -80\(0x3ffb0\)[ ]+# 0x0
+[ ]+54:[ ]+4c000020[ ]+[ ]+jirl[ ]+\$zero, \$ra, 0
diff --git a/ld/testsuite/ld-loongarch-elf/jmp_op.s b/ld/testsuite/ld-loongarch-elf/jmp_op.s
index 1deb165..56f9867 100644
--- a/ld/testsuite/ld-loongarch-elf/jmp_op.s
+++ b/ld/testsuite/ld-loongarch-elf/jmp_op.s
@@ -20,3 +20,4 @@ bltu $r4,$r5,.L1
bgtu $r4,$r5,.L1
bgeu $r4,$r5,.L1
bleu $r4,$r5,.L1
+ret