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| author | Alan Modra <amodra@gmail.com> | 2020-07-03 15:29:13 +0930 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2020-07-03 17:15:16 +0930 |
| commit | b657622c3ecd810064f17f279b0a56648b4dc2d6 (patch) | |
| tree | 084f31e5e3f95a98c8a77d717205865bace3c6b0 /ld/testsuite/ld-arm | |
| parent | 6d2f9adc6709572e9ef70f11961819e27b918568 (diff) | |
| download | gdb-b657622c3ecd810064f17f279b0a56648b4dc2d6.zip gdb-b657622c3ecd810064f17f279b0a56648b4dc2d6.tar.gz gdb-b657622c3ecd810064f17f279b0a56648b4dc2d6.tar.bz2 | |
Re: Change readelf's display of symbol names
Fixes some fallout from git commit 0942c7ab94e5.
PR 26028
gas/
* testsuite/gas/ia64/unwind-ilp32.d: Add -T to readelf options.
gold/
* testsuite/Makefile.am (file_in_many_sections.stdout): Add -W
to readelf options.
* testsuite/Makefile.in: Regenerate.
ld/
* testsuite/ld-arm/arm-elf.exp (vxworks1): Pass --wide to readelf
when dumping relocs.
* testsuite/ld-i386/i386.exp (vxworks1): Likewise.
* testsuite/ld-sh/sh-vxworks.exp (vxworks1): Likewise.
* testsuite/ld-sparc/sparc.exp (vxworks1): Likewise.
* testsuite/ld-arm/vxworks1.rd: Adjust to suit.
* testsuite/ld-i386/vxworks1.rd: Adjust.
* testsuite/ld-sh/vxworks1.rd: Adjust.
* testsuite/ld-sparc/vxworks1.rd: Adjust.
Diffstat (limited to 'ld/testsuite/ld-arm')
| -rw-r--r-- | ld/testsuite/ld-arm/arm-elf.exp | 2 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/vxworks1.rd | 26 |
2 files changed, 14 insertions, 14 deletions
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp index 1289317..0b47d63 100644 --- a/ld/testsuite/ld-arm/arm-elf.exp +++ b/ld/testsuite/ld-arm/arm-elf.exp @@ -30,7 +30,7 @@ if {[istarget "arm-*-vxworks"]} { {"VxWorks executable test 1 (dynamic)" "tmpdir/libvxworks1.so -Tvxworks1.ld --hash-style=sysv -q --force-dynamic" "" "" {vxworks1.s} - {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}} + {{readelf {--relocs --wide} vxworks1.rd} {objdump -dr vxworks1.dd}} "vxworks1"} {"VxWorks executable test 2 (dynamic)" \ "-Tvxworks1.ld --hash-style=sysv -q --force-dynamic" "" diff --git a/ld/testsuite/ld-arm/vxworks1.rd b/ld/testsuite/ld-arm/vxworks1.rd index 8c55059..aefcd04 100644 --- a/ld/testsuite/ld-arm/vxworks1.rd +++ b/ld/testsuite/ld-arm/vxworks1.rd @@ -1,19 +1,19 @@ Relocation section '\.rela\.plt' at offset .* contains 2 entries: - Offset Info Type Sym\.Value Sym\. Name \+ Addend -0008140c .*16 R_ARM_JUMP_SLOT 000..... sglobal \+ 0 -00081410 .*16 R_ARM_JUMP_SLOT 000..... foo \+ 0 + Offset +Info +Type +Sym.* +0008140c +.*16 R_ARM_JUMP_SLOT +000..... +sglobal \+ 0 +00081410 +.*16 R_ARM_JUMP_SLOT +000..... +foo \+ 0 Relocation section '\.rela\.text' at offset .* contains 3 entries: - Offset Info Type Sym.Value Sym. Name \+ Addend -00080c00 .*01 R_ARM_PC24 00080800 \.plt \+ 20 -00080c04 .*01 R_ARM_PC24 000..... sexternal - 8 -00080c08 .*01 R_ARM_PC24 00080800 \.plt \+ 8 + Offset +Info +Type +Sym.* +00080c00 +.*01 R_ARM_PC24 +00080800 +\.plt \+ 20 +00080c04 +.*01 R_ARM_PC24 +000..... +sexternal - 8 +00080c08 +.*01 R_ARM_PC24 +00080800 +\.plt \+ 8 Relocation section '\.rela\.plt\.unloaded' at offset .* contains 5 entries: - Offset Info Type Sym\.Value Sym\. Name \+ Addend -0008080c .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ 0 -00080818 .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ c -0008140c .*02 R_ARM_ABS32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 0 -00080830 .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ 10 -00081410 .*02 R_ARM_ABS32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 0 + Offset +Info +Type +Sym.* +0008080c +.*02 R_ARM_ABS32 +00081400 +_GLOBAL_OFFSET_TABLE_ \+ 0 +00080818 +.*02 R_ARM_ABS32 +00081400 +_GLOBAL_OFFSET_TABLE_ \+ c +0008140c +.*02 R_ARM_ABS32 +00080800 +_PROCEDURE_LINKAGE_TABLE_ \+ 0 +00080830 +.*02 R_ARM_ABS32 +00081400 +_GLOBAL_OFFSET_TABLE_ \+ 10 +00081410 +.*02 R_ARM_ABS32 +00080800 +_PROCEDURE_LINKAGE_TABLE_ \+ 0 |