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| author | Jose E. Marchesi <jose.marchesi@oracle.com> | 2023-07-21 19:47:49 +0200 |
|---|---|---|
| committer | Jose E. Marchesi <jose.marchesi@oracle.com> | 2023-07-21 20:00:30 +0200 |
| commit | c24fd9547fb6836af022c99470dfdb13fa9f90fe (patch) | |
| tree | 7267743504eb02a63dc11928aa08d80936a203c4 /include | |
| parent | 2f3dbc5fb5e781fc17d8f68f9c960a993f06d801 (diff) | |
| download | gdb-c24fd9547fb6836af022c99470dfdb13fa9f90fe.zip gdb-c24fd9547fb6836af022c99470dfdb13fa9f90fe.tar.gz gdb-c24fd9547fb6836af022c99470dfdb13fa9f90fe.tar.bz2 | |
bpf: opcodes, gas: support for signed load V4 instructions
This commit adds the signed load to register (ldxs*) instructions
introduced in the BPF ISA version 4, including opcodes and assembler
tests.
Tested in bpf-unknown-none.
include/ChangeLog:
2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com>
* opcode/bpf.h (enum bpf_insn_id): Add entries for signed load
instructions.
(BPF_MODE_SMEM): Define.
opcodes/ChangeLog:
2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf-opc.c (bpf_opcodes): Add entries for LDXS{B,W,H,DW}
instructions.
gas/ChangeLog:
2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com>
* testsuite/gas/bpf/mem.s: Add signed load instructions.
* testsuite/gas/bpf/mem-pseudoc.s: Likewise.
* testsuite/gas/bpf/mem.d: Likewise.
* testsuite/gas/bpf/mem-pseudoc.d: Likewise.
* testsuite/gas/bpf/mem-be.d: Likewise.
* doc/c-bpf.texi (BPF Instructions): Document the signed load
instructions.
Diffstat (limited to 'include')
| -rw-r--r-- | include/ChangeLog | 6 | ||||
| -rw-r--r-- | include/opcode/bpf.h | 3 |
2 files changed, 9 insertions, 0 deletions
diff --git a/include/ChangeLog b/include/ChangeLog index 5872f28..ccf1661 100644 --- a/include/ChangeLog +++ b/include/ChangeLog @@ -1,5 +1,11 @@ 2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com> + * opcode/bpf.h (enum bpf_insn_id): Add entries for signed load + instructions. + (BPF_MODE_SMEM): Define. + +2023-07-21 Jose E. Marchesi <jose.marchesi@oracle.com> + * opcode/bpf.h (BPF_OFFSET16_MOVS8): Define. (BPF_OFFSET16_MOVS16): Likewise. (BPF_OFFSET16_MOVS32): Likewise. diff --git a/include/opcode/bpf.h b/include/opcode/bpf.h index 48f06c2..a491df6 100644 --- a/include/opcode/bpf.h +++ b/include/opcode/bpf.h @@ -112,6 +112,7 @@ typedef uint64_t bpf_insn_word; #define BPF_MODE_IND ((uint64_t)0x40 << 56) #define BPF_MODE_MEM ((uint64_t)0x60 << 56) #define BPF_MODE_ATOMIC ((uint64_t)0xc0 << 56) +#define BPF_MODE_SMEM ((uint64_t)0x80 << 56) #define BPF_SIZE_W ((uint64_t)0x00 << 56) #define BPF_SIZE_H ((uint64_t)0x08 << 56) @@ -186,6 +187,8 @@ enum bpf_insn_id BPF_INSN_LDINDB, BPF_INSN_LDINDH, BPF_INSN_LDINDW, BPF_INSN_LDINDDW, /* Generic load instructions (to register.) */ BPF_INSN_LDXB, BPF_INSN_LDXH, BPF_INSN_LDXW, BPF_INSN_LDXDW, + /* Generic signed load instructions. */ + BPF_INSN_LDXSB, BPF_INSN_LDXSH, BPF_INSN_LDXSW, BPF_INSN_LDXSDW, /* Generic store instructions (from register.) */ BPF_INSN_STXBR, BPF_INSN_STXHR, BPF_INSN_STXWR, BPF_INSN_STXDWR, BPF_INSN_STXBI, BPF_INSN_STXHI, BPF_INSN_STXWI, BPF_INSN_STXDWI, |